diff options
| author | Andres Vahter <[email protected]> | 2024-04-10 10:30:24 +0300 |
|---|---|---|
| committer | Andres Vahter <[email protected]> | 2024-04-10 10:33:15 +0300 |
| commit | 68b1a840c6350f0c158ef17887a801808dc01f33 (patch) | |
| tree | 64336aeda4893f6b21de313064345aed9e5e5db8 | |
| parent | fd802ffdfd5611b9a4e0a967a7a13fd6f8159fa3 (diff) | |
stm32 adc: remove DelayNs
| -rw-r--r-- | embassy-stm32/src/adc/f1.rs | 19 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/f3.rs | 17 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v1.rs | 23 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v2.rs | 11 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v3.rs | 24 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v4.rs | 17 |
6 files changed, 70 insertions, 41 deletions
diff --git a/embassy-stm32/src/adc/f1.rs b/embassy-stm32/src/adc/f1.rs index 2dbce8043..dd4b3489b 100644 --- a/embassy-stm32/src/adc/f1.rs +++ b/embassy-stm32/src/adc/f1.rs | |||
| @@ -3,7 +3,6 @@ use core::marker::PhantomData; | |||
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use embassy_hal_internal::into_ref; | 5 | use embassy_hal_internal::into_ref; |
| 6 | use embedded_hal_1::delay::DelayNs; | ||
| 7 | 6 | ||
| 8 | use crate::adc::{Adc, AdcPin, Instance, SampleTime}; | 7 | use crate::adc::{Adc, AdcPin, Instance, SampleTime}; |
| 9 | use crate::time::Hertz; | 8 | use crate::time::Hertz; |
| @@ -48,14 +47,18 @@ impl<T: Instance> super::SealedAdcPin<T> for Temperature { | |||
| 48 | } | 47 | } |
| 49 | 48 | ||
| 50 | impl<'d, T: Instance> Adc<'d, T> { | 49 | impl<'d, T: Instance> Adc<'d, T> { |
| 51 | pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayNs) -> Self { | 50 | pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self { |
| 52 | into_ref!(adc); | 51 | into_ref!(adc); |
| 53 | T::enable_and_reset(); | 52 | T::enable_and_reset(); |
| 54 | T::regs().cr2().modify(|reg| reg.set_adon(true)); | 53 | T::regs().cr2().modify(|reg| reg.set_adon(true)); |
| 55 | 54 | ||
| 56 | // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) | 55 | // 11.4: Before starting a calibration, the ADC must have been in power-on state (ADON bit = ‘1’) |
| 57 | // for at least two ADC clock cycles | 56 | // for at least two ADC clock cycles. |
| 58 | delay.delay_us((1_000_000 * 2) / Self::freq().0 + 1); | 57 | let us = (1_000_000 * 2) / Self::freq().0 + 1; |
| 58 | #[cfg(time)] | ||
| 59 | embassy_time::block_for(embassy_time::Duration::from_micros(us)); | ||
| 60 | #[cfg(not(time))] | ||
| 61 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); | ||
| 59 | 62 | ||
| 60 | // Reset calibration | 63 | // Reset calibration |
| 61 | T::regs().cr2().modify(|reg| reg.set_rstcal(true)); | 64 | T::regs().cr2().modify(|reg| reg.set_rstcal(true)); |
| @@ -70,7 +73,11 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 70 | } | 73 | } |
| 71 | 74 | ||
| 72 | // One cycle after calibration | 75 | // One cycle after calibration |
| 73 | delay.delay_us((1_000_000) / Self::freq().0 + 1); | 76 | let us = (1_000_000 * 1) / Self::freq().0 + 1; |
| 77 | #[cfg(time)] | ||
| 78 | embassy_time::block_for(embassy_time::Duration::from_micros(us)); | ||
| 79 | #[cfg(not(time))] | ||
| 80 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); | ||
| 74 | 81 | ||
| 75 | Self { | 82 | Self { |
| 76 | adc, | 83 | adc, |
| @@ -95,7 +102,7 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 95 | } | 102 | } |
| 96 | } | 103 | } |
| 97 | 104 | ||
| 98 | pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { | 105 | pub fn enable_vref(&self) -> Vref { |
| 99 | T::regs().cr2().modify(|reg| { | 106 | T::regs().cr2().modify(|reg| { |
| 100 | reg.set_tsvrefe(true); | 107 | reg.set_tsvrefe(true); |
| 101 | }); | 108 | }); |
diff --git a/embassy-stm32/src/adc/f3.rs b/embassy-stm32/src/adc/f3.rs index 4ffbe5bf1..1a62b7707 100644 --- a/embassy-stm32/src/adc/f3.rs +++ b/embassy-stm32/src/adc/f3.rs | |||
| @@ -3,7 +3,6 @@ use core::marker::PhantomData; | |||
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use embassy_hal_internal::into_ref; | 5 | use embassy_hal_internal::into_ref; |
| 6 | use embedded_hal_1::delay::DelayNs; | ||
| 7 | 6 | ||
| 8 | use crate::adc::{Adc, AdcPin, Instance, SampleTime}; | 7 | use crate::adc::{Adc, AdcPin, Instance, SampleTime}; |
| 9 | use crate::interrupt::typelevel::Interrupt; | 8 | use crate::interrupt::typelevel::Interrupt; |
| @@ -58,7 +57,6 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 58 | pub fn new( | 57 | pub fn new( |
| 59 | adc: impl Peripheral<P = T> + 'd, | 58 | adc: impl Peripheral<P = T> + 'd, |
| 60 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 59 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 61 | delay: &mut impl DelayNs, | ||
| 62 | ) -> Self { | 60 | ) -> Self { |
| 63 | use crate::pac::adc::vals; | 61 | use crate::pac::adc::vals; |
| 64 | 62 | ||
| @@ -71,7 +69,10 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 71 | T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED)); | 69 | T::regs().cr().modify(|w| w.set_advregen(vals::Advregen::ENABLED)); |
| 72 | 70 | ||
| 73 | // Wait for the regulator to stabilize | 71 | // Wait for the regulator to stabilize |
| 74 | delay.delay_us(10); | 72 | #[cfg(time)] |
| 73 | embassy_time::block_for(embassy_time::Duration::from_micros(10)); | ||
| 74 | #[cfg(not(time))] | ||
| 75 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); | ||
| 75 | 76 | ||
| 76 | assert!(!T::regs().cr().read().aden()); | 77 | assert!(!T::regs().cr().read().aden()); |
| 77 | 78 | ||
| @@ -81,8 +82,12 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 81 | 82 | ||
| 82 | while T::regs().cr().read().adcal() {} | 83 | while T::regs().cr().read().adcal() {} |
| 83 | 84 | ||
| 84 | // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223) | 85 | // Wait more than 4 clock cycles after adcal is cleared (RM0364 p. 223). |
| 85 | delay.delay_us(1 + (6 * 1_000_000 / Self::freq().0)); | 86 | let us = (1_000_000 * 4) / Self::freq().0 + 1; |
| 87 | #[cfg(time)] | ||
| 88 | embassy_time::block_for(embassy_time::Duration::from_micros(us)); | ||
| 89 | #[cfg(not(time))] | ||
| 90 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / (1000_000 / us)); | ||
| 86 | 91 | ||
| 87 | // Enable the adc | 92 | // Enable the adc |
| 88 | T::regs().cr().modify(|w| w.set_aden(true)); | 93 | T::regs().cr().modify(|w| w.set_aden(true)); |
| @@ -117,7 +122,7 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 117 | } | 122 | } |
| 118 | } | 123 | } |
| 119 | 124 | ||
| 120 | pub fn enable_vref(&self, _delay: &mut impl DelayNs) -> Vref { | 125 | pub fn enable_vref(&self) -> Vref { |
| 121 | T::common_regs().ccr().modify(|w| w.set_vrefen(true)); | 126 | T::common_regs().ccr().modify(|w| w.set_vrefen(true)); |
| 122 | 127 | ||
| 123 | Vref {} | 128 | Vref {} |
diff --git a/embassy-stm32/src/adc/v1.rs b/embassy-stm32/src/adc/v1.rs index 3099b47d1..960990c39 100644 --- a/embassy-stm32/src/adc/v1.rs +++ b/embassy-stm32/src/adc/v1.rs | |||
| @@ -3,7 +3,6 @@ use core::marker::PhantomData; | |||
| 3 | use core::task::Poll; | 3 | use core::task::Poll; |
| 4 | 4 | ||
| 5 | use embassy_hal_internal::into_ref; | 5 | use embassy_hal_internal::into_ref; |
| 6 | use embedded_hal_1::delay::DelayNs; | ||
| 7 | #[cfg(adc_l0)] | 6 | #[cfg(adc_l0)] |
| 8 | use stm32_metapac::adc::vals::Ckmode; | 7 | use stm32_metapac::adc::vals::Ckmode; |
| 9 | 8 | ||
| @@ -65,7 +64,6 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 65 | pub fn new( | 64 | pub fn new( |
| 66 | adc: impl Peripheral<P = T> + 'd, | 65 | adc: impl Peripheral<P = T> + 'd, |
| 67 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, | 66 | _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd, |
| 68 | delay: &mut impl DelayNs, | ||
| 69 | ) -> Self { | 67 | ) -> Self { |
| 70 | into_ref!(adc); | 68 | into_ref!(adc); |
| 71 | T::enable_and_reset(); | 69 | T::enable_and_reset(); |
| @@ -74,7 +72,10 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 74 | // | 72 | // |
| 75 | // Table 57. ADC characteristics | 73 | // Table 57. ADC characteristics |
| 76 | // tstab = 14 * 1/fadc | 74 | // tstab = 14 * 1/fadc |
| 77 | delay.delay_us(1); | 75 | #[cfg(time)] |
| 76 | embassy_time::block_for(embassy_time::Duration::from_micros(1)); | ||
| 77 | #[cfg(not(time))] | ||
| 78 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); | ||
| 78 | 79 | ||
| 79 | // set default PCKL/2 on L0s because HSI is disabled in the default clock config | 80 | // set default PCKL/2 on L0s because HSI is disabled in the default clock config |
| 80 | #[cfg(adc_l0)] | 81 | #[cfg(adc_l0)] |
| @@ -114,7 +115,7 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 114 | } | 115 | } |
| 115 | 116 | ||
| 116 | #[cfg(not(adc_l0))] | 117 | #[cfg(not(adc_l0))] |
| 117 | pub fn enable_vbat(&self, _delay: &mut impl DelayNs) -> Vbat { | 118 | pub fn enable_vbat(&self) -> Vbat { |
| 118 | // SMP must be ≥ 56 ADC clock cycles when using HSI14. | 119 | // SMP must be ≥ 56 ADC clock cycles when using HSI14. |
| 119 | // | 120 | // |
| 120 | // 6.3.20 Vbat monitoring characteristics | 121 | // 6.3.20 Vbat monitoring characteristics |
| @@ -123,22 +124,28 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 123 | Vbat | 124 | Vbat |
| 124 | } | 125 | } |
| 125 | 126 | ||
| 126 | pub fn enable_vref(&self, delay: &mut impl DelayNs) -> Vref { | 127 | pub fn enable_vref(&self) -> Vref { |
| 127 | // Table 28. Embedded internal reference voltage | 128 | // Table 28. Embedded internal reference voltage |
| 128 | // tstart = 10μs | 129 | // tstart = 10μs |
| 129 | T::regs().ccr().modify(|reg| reg.set_vrefen(true)); | 130 | T::regs().ccr().modify(|reg| reg.set_vrefen(true)); |
| 130 | delay.delay_us(10); | 131 | #[cfg(time)] |
| 132 | embassy_time::block_for(embassy_time::Duration::from_micros(10)); | ||
| 133 | #[cfg(not(time))] | ||
| 134 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); | ||
| 131 | Vref | 135 | Vref |
| 132 | } | 136 | } |
| 133 | 137 | ||
| 134 | pub fn enable_temperature(&self, delay: &mut impl DelayNs) -> Temperature { | 138 | pub fn enable_temperature(&self) -> Temperature { |
| 135 | // SMP must be ≥ 56 ADC clock cycles when using HSI14. | 139 | // SMP must be ≥ 56 ADC clock cycles when using HSI14. |
| 136 | // | 140 | // |
| 137 | // 6.3.19 Temperature sensor characteristics | 141 | // 6.3.19 Temperature sensor characteristics |
| 138 | // tstart ≤ 10μs | 142 | // tstart ≤ 10μs |
| 139 | // ts_temp ≥ 4μs | 143 | // ts_temp ≥ 4μs |
| 140 | T::regs().ccr().modify(|reg| reg.set_tsen(true)); | 144 | T::regs().ccr().modify(|reg| reg.set_tsen(true)); |
| 141 | delay.delay_us(10); | 145 | #[cfg(time)] |
| 146 | embassy_time::block_for(embassy_time::Duration::from_micros(10)); | ||
| 147 | #[cfg(not(time))] | ||
| 148 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); | ||
| 142 | Temperature | 149 | Temperature |
| 143 | } | 150 | } |
| 144 | 151 | ||
diff --git a/embassy-stm32/src/adc/v2.rs b/embassy-stm32/src/adc/v2.rs index 21782cf89..1ac119508 100644 --- a/embassy-stm32/src/adc/v2.rs +++ b/embassy-stm32/src/adc/v2.rs | |||
| @@ -1,5 +1,4 @@ | |||
| 1 | use embassy_hal_internal::into_ref; | 1 | use embassy_hal_internal::into_ref; |
| 2 | use embedded_hal_1::delay::DelayNs; | ||
| 3 | 2 | ||
| 4 | use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; | 3 | use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; |
| 5 | use crate::peripherals::ADC1; | 4 | use crate::peripherals::ADC1; |
| @@ -11,9 +10,6 @@ pub const VREF_DEFAULT_MV: u32 = 3300; | |||
| 11 | /// VREF voltage used for factory calibration of VREFINTCAL register. | 10 | /// VREF voltage used for factory calibration of VREFINTCAL register. |
| 12 | pub const VREF_CALIB_MV: u32 = 3300; | 11 | pub const VREF_CALIB_MV: u32 = 3300; |
| 13 | 12 | ||
| 14 | /// ADC turn-on time | ||
| 15 | pub const ADC_POWERUP_TIME_US: u32 = 3; | ||
| 16 | |||
| 17 | pub struct VrefInt; | 13 | pub struct VrefInt; |
| 18 | impl AdcPin<ADC1> for VrefInt {} | 14 | impl AdcPin<ADC1> for VrefInt {} |
| 19 | impl super::SealedAdcPin<ADC1> for VrefInt { | 15 | impl super::SealedAdcPin<ADC1> for VrefInt { |
| @@ -97,7 +93,7 @@ impl<'d, T> Adc<'d, T> | |||
| 97 | where | 93 | where |
| 98 | T: Instance, | 94 | T: Instance, |
| 99 | { | 95 | { |
| 100 | pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayNs) -> Self { | 96 | pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self { |
| 101 | into_ref!(adc); | 97 | into_ref!(adc); |
| 102 | T::enable_and_reset(); | 98 | T::enable_and_reset(); |
| 103 | 99 | ||
| @@ -107,7 +103,10 @@ where | |||
| 107 | reg.set_adon(true); | 103 | reg.set_adon(true); |
| 108 | }); | 104 | }); |
| 109 | 105 | ||
| 110 | delay.delay_us(ADC_POWERUP_TIME_US); | 106 | #[cfg(time)] |
| 107 | embassy_time::block_for(embassy_time::Duration::from_micros(5)); | ||
| 108 | #[cfg(not(time))] | ||
| 109 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 200_000); | ||
| 111 | 110 | ||
| 112 | Self { | 111 | Self { |
| 113 | adc, | 112 | adc, |
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index ba01e71fd..a5e09646a 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs | |||
| @@ -1,6 +1,5 @@ | |||
| 1 | use cfg_if::cfg_if; | 1 | use cfg_if::cfg_if; |
| 2 | use embassy_hal_internal::into_ref; | 2 | use embassy_hal_internal::into_ref; |
| 3 | use embedded_hal_1::delay::DelayNs; | ||
| 4 | 3 | ||
| 5 | use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; | 4 | use crate::adc::{Adc, AdcPin, Instance, Resolution, SampleTime}; |
| 6 | use crate::Peripheral; | 5 | use crate::Peripheral; |
| @@ -74,7 +73,7 @@ cfg_if! { | |||
| 74 | } | 73 | } |
| 75 | 74 | ||
| 76 | impl<'d, T: Instance> Adc<'d, T> { | 75 | impl<'d, T: Instance> Adc<'d, T> { |
| 77 | pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayNs) -> Self { | 76 | pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self { |
| 78 | into_ref!(adc); | 77 | into_ref!(adc); |
| 79 | T::enable_and_reset(); | 78 | T::enable_and_reset(); |
| 80 | T::regs().cr().modify(|reg| { | 79 | T::regs().cr().modify(|reg| { |
| @@ -88,7 +87,10 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 88 | reg.set_chselrmod(false); | 87 | reg.set_chselrmod(false); |
| 89 | }); | 88 | }); |
| 90 | 89 | ||
| 91 | delay.delay_us(20); | 90 | #[cfg(time)] |
| 91 | embassy_time::block_for(embassy_time::Duration::from_micros(20)); | ||
| 92 | #[cfg(not(time))] | ||
| 93 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); | ||
| 92 | 94 | ||
| 93 | T::regs().cr().modify(|reg| { | 95 | T::regs().cr().modify(|reg| { |
| 94 | reg.set_adcal(true); | 96 | reg.set_adcal(true); |
| @@ -98,7 +100,10 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 98 | // spin | 100 | // spin |
| 99 | } | 101 | } |
| 100 | 102 | ||
| 101 | delay.delay_us(1); | 103 | #[cfg(time)] |
| 104 | embassy_time::block_for(embassy_time::Duration::from_micros(1)); | ||
| 105 | #[cfg(not(time))] | ||
| 106 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); | ||
| 102 | 107 | ||
| 103 | Self { | 108 | Self { |
| 104 | adc, | 109 | adc, |
| @@ -106,7 +111,7 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 106 | } | 111 | } |
| 107 | } | 112 | } |
| 108 | 113 | ||
| 109 | pub fn enable_vrefint(&self, delay: &mut impl DelayNs) -> VrefInt { | 114 | pub fn enable_vrefint(&self) -> VrefInt { |
| 110 | #[cfg(not(adc_g0))] | 115 | #[cfg(not(adc_g0))] |
| 111 | T::common_regs().ccr().modify(|reg| { | 116 | T::common_regs().ccr().modify(|reg| { |
| 112 | reg.set_vrefen(true); | 117 | reg.set_vrefen(true); |
| @@ -117,10 +122,11 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 117 | }); | 122 | }); |
| 118 | 123 | ||
| 119 | // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us | 124 | // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us |
| 120 | // to stabilize the internal voltage reference, we wait a little more. | 125 | // to stabilize the internal voltage reference. |
| 121 | // TODO: delay 15us | 126 | #[cfg(time)] |
| 122 | //cortex_m::asm::delay(20_000_000); | 127 | embassy_time::block_for(embassy_time::Duration::from_micros(20)); |
| 123 | delay.delay_us(15); | 128 | #[cfg(not(time))] |
| 129 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 50_000); | ||
| 124 | 130 | ||
| 125 | VrefInt {} | 131 | VrefInt {} |
| 126 | } | 132 | } |
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 4320de714..018104dd6 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs | |||
| @@ -1,4 +1,3 @@ | |||
| 1 | use embedded_hal_1::delay::DelayNs; | ||
| 2 | #[allow(unused)] | 1 | #[allow(unused)] |
| 3 | use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; | 2 | use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel}; |
| 4 | use pac::adccommon::vals::Presc; | 3 | use pac::adccommon::vals::Presc; |
| @@ -129,7 +128,7 @@ impl Prescaler { | |||
| 129 | 128 | ||
| 130 | impl<'d, T: Instance> Adc<'d, T> { | 129 | impl<'d, T: Instance> Adc<'d, T> { |
| 131 | /// Create a new ADC driver. | 130 | /// Create a new ADC driver. |
| 132 | pub fn new(adc: impl Peripheral<P = T> + 'd, delay: &mut impl DelayNs) -> Self { | 131 | pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self { |
| 133 | embassy_hal_internal::into_ref!(adc); | 132 | embassy_hal_internal::into_ref!(adc); |
| 134 | T::enable_and_reset(); | 133 | T::enable_and_reset(); |
| 135 | 134 | ||
| @@ -161,11 +160,14 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 161 | adc, | 160 | adc, |
| 162 | sample_time: SampleTime::from_bits(0), | 161 | sample_time: SampleTime::from_bits(0), |
| 163 | }; | 162 | }; |
| 164 | s.power_up(delay); | 163 | s.power_up(); |
| 165 | s.configure_differential_inputs(); | 164 | s.configure_differential_inputs(); |
| 166 | 165 | ||
| 167 | s.calibrate(); | 166 | s.calibrate(); |
| 168 | delay.delay_us(1); | 167 | #[cfg(time)] |
| 168 | embassy_time::block_for(embassy_time::Duration::from_micros(1)); | ||
| 169 | #[cfg(not(time))] | ||
| 170 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 1000_000); | ||
| 169 | 171 | ||
| 170 | s.enable(); | 172 | s.enable(); |
| 171 | s.configure(); | 173 | s.configure(); |
| @@ -173,13 +175,16 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 173 | s | 175 | s |
| 174 | } | 176 | } |
| 175 | 177 | ||
| 176 | fn power_up(&mut self, delay: &mut impl DelayNs) { | 178 | fn power_up(&mut self) { |
| 177 | T::regs().cr().modify(|reg| { | 179 | T::regs().cr().modify(|reg| { |
| 178 | reg.set_deeppwd(false); | 180 | reg.set_deeppwd(false); |
| 179 | reg.set_advregen(true); | 181 | reg.set_advregen(true); |
| 180 | }); | 182 | }); |
| 181 | 183 | ||
| 182 | delay.delay_us(10); | 184 | #[cfg(time)] |
| 185 | embassy_time::block_for(embassy_time::Duration::from_micros(10)); | ||
| 186 | #[cfg(not(time))] | ||
| 187 | cortex_m::asm::delay(unsafe { crate::rcc::get_freqs() }.sys.unwrap().0 / 100_000); | ||
| 183 | } | 188 | } |
| 184 | 189 | ||
| 185 | fn configure_differential_inputs(&mut self) { | 190 | fn configure_differential_inputs(&mut self) { |
