diff options
| author | Ulf Lilleengen <[email protected]> | 2021-06-11 16:21:51 +0200 |
|---|---|---|
| committer | Ulf Lilleengen <[email protected]> | 2021-06-11 16:21:51 +0200 |
| commit | 6c7fd3e3c4f54cc8b882086d3973180dd84c95c2 (patch) | |
| tree | 6de42662453576332a55879fd6aad49038c99acf | |
| parent | 8dd3ddd228076b49948189f6b95b64dcf131631e (diff) | |
Refactor
| -rw-r--r-- | stm32-metapac/gen/src/lib.rs | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/stm32-metapac/gen/src/lib.rs b/stm32-metapac/gen/src/lib.rs index ea06e308c..399840c5b 100644 --- a/stm32-metapac/gen/src/lib.rs +++ b/stm32-metapac/gen/src/lib.rs | |||
| @@ -268,10 +268,20 @@ pub fn gen(options: Options) { | |||
| 268 | } | 268 | } |
| 269 | 269 | ||
| 270 | if let Some(rcc) = &rcc { | 270 | if let Some(rcc) = &rcc { |
| 271 | let mut generate_rcc_peripheral = |clock_prefix| { | 271 | let clock_prefix: Option<&str> = if let Some(clock) = &p.clock { |
| 272 | Some(clock) | ||
| 273 | } else if name.starts_with("TIM") { | ||
| 274 | // Not all peripherals like timers the clock hint due to insufficient information from | ||
| 275 | // chip definition. If clock is not specified, the first matching register with the | ||
| 276 | // expected field will be used. | ||
| 277 | Some("") | ||
| 278 | } else { | ||
| 279 | None | ||
| 280 | }; | ||
| 281 | |||
| 282 | if let Some(clock_prefix) = clock_prefix { | ||
| 272 | // Workaround for clock registers being split on some chip families. Assume fields are | 283 | // Workaround for clock registers being split on some chip families. Assume fields are |
| 273 | // named after peripheral and look for first field matching and use that register. | 284 | // named after peripheral and look for first field matching and use that register. |
| 274 | |||
| 275 | let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); | 285 | let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); |
| 276 | let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); | 286 | let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); |
| 277 | 287 | ||
| @@ -295,15 +305,6 @@ pub fn gen(options: Options) { | |||
| 295 | println!("Unable to find enable and reset register for {}", name) | 305 | println!("Unable to find enable and reset register for {}", name) |
| 296 | } | 306 | } |
| 297 | } | 307 | } |
| 298 | }; | ||
| 299 | |||
| 300 | if let Some(clock) = &p.clock { | ||
| 301 | generate_rcc_peripheral(clock); | ||
| 302 | } else if name.starts_with("TIM") { | ||
| 303 | // Not all peripherals like timers the clock hint due to insufficient information from | ||
| 304 | // chip definition. If clock is not specified, the first matching register with the | ||
| 305 | // expected field will be used. | ||
| 306 | generate_rcc_peripheral(""); | ||
| 307 | } | 308 | } |
| 308 | } | 309 | } |
| 309 | } | 310 | } |
