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authorDario Nieuwenhuis <[email protected]>2021-03-18 20:35:21 +0100
committerGitHub <[email protected]>2021-03-18 20:35:21 +0100
commit6eb0522102c0a808b245b16e7498527464355c04 (patch)
tree864f04ab2e440e322f3a6f2ebf7b73381e71864f
parent4b2fdd450e70270f346f302829fa493a67fe3ce1 (diff)
parent1908141c867e72c19bddad13388e455bfb2f03bd (diff)
Merge pull request #82 from xoviat/c-exti
cleanup exti and remove static mut
-rw-r--r--embassy-stm32f4-examples/src/bin/exti.rs7
-rw-r--r--embassy-stm32f4/src/exti.rs66
-rw-r--r--embassy-stm32l0/src/exti.rs244
3 files changed, 147 insertions, 170 deletions
diff --git a/embassy-stm32f4-examples/src/bin/exti.rs b/embassy-stm32f4-examples/src/bin/exti.rs
index 0c6561cda..2201189eb 100644
--- a/embassy-stm32f4-examples/src/bin/exti.rs
+++ b/embassy-stm32f4-examples/src/bin/exti.rs
@@ -13,22 +13,19 @@ use cortex_m_rt::entry;
13use embassy::executor::{task, Executor}; 13use embassy::executor::{task, Executor};
14use embassy::traits::gpio::*; 14use embassy::traits::gpio::*;
15use embassy::util::Forever; 15use embassy::util::Forever;
16use embassy_stm32f4::exti; 16use embassy_stm32f4::exti::ExtiPin;
17use embassy_stm32f4::interrupt; 17use embassy_stm32f4::interrupt;
18use futures::pin_mut; 18use futures::pin_mut;
19use stm32f4xx_hal::prelude::*; 19use stm32f4xx_hal::prelude::*;
20use stm32f4xx_hal::stm32; 20use stm32f4xx_hal::stm32;
21 21
22static EXTI: Forever<exti::ExtiManager> = Forever::new();
23
24#[task] 22#[task]
25async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) { 23async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
26 let gpioa = dp.GPIOA.split(); 24 let gpioa = dp.GPIOA.split();
27 25
28 let button = gpioa.pa0.into_pull_up_input(); 26 let button = gpioa.pa0.into_pull_up_input();
29 27
30 let exti = EXTI.put(exti::ExtiManager::new(dp.EXTI, dp.SYSCFG.constrain())); 28 let pin = ExtiPin::new(button, interrupt::take!(EXTI0));
31 let pin = exti.new_pin(button, interrupt::take!(EXTI0));
32 pin_mut!(pin); 29 pin_mut!(pin);
33 30
34 info!("Starting loop"); 31 info!("Starting loop");
diff --git a/embassy-stm32f4/src/exti.rs b/embassy-stm32f4/src/exti.rs
index 660e3be33..9df021634 100644
--- a/embassy-stm32f4/src/exti.rs
+++ b/embassy-stm32f4/src/exti.rs
@@ -1,48 +1,38 @@
1use core::cell::UnsafeCell;
1use core::future::Future; 2use core::future::Future;
2use core::mem; 3use core::mem;
3use core::pin::Pin; 4use core::pin::Pin;
5use cortex_m;
4 6
5use embassy::traits::gpio::{WaitForFallingEdge, WaitForRisingEdge}; 7use embassy::traits::gpio::{WaitForFallingEdge, WaitForRisingEdge};
6use embassy::util::InterruptFuture; 8use embassy::util::InterruptFuture;
7 9
8use crate::hal::gpio; 10use crate::hal::gpio;
9use crate::hal::gpio::{Edge, ExtiPin as HalExtiPin}; 11use crate::hal::gpio::Edge;
10use crate::hal::syscfg::SysCfg; 12use crate::hal::syscfg::SysCfg;
11use crate::pac::EXTI; 13use crate::pac::EXTI;
12use embedded_hal::digital::v2 as digital; 14use embedded_hal::digital::v2 as digital;
13 15
14use crate::interrupt; 16use crate::interrupt;
15 17
16pub struct ExtiManager { 18pub struct ExtiPin<T: gpio::ExtiPin + WithInterrupt> {
17 syscfg: SysCfg, 19 pin: T,
20 interrupt: T::Interrupt,
18} 21}
19 22
20impl<'a> ExtiManager { 23impl<T: gpio::ExtiPin + WithInterrupt> ExtiPin<T> {
21 pub fn new(_exti: EXTI, syscfg: SysCfg) -> Self { 24 pub fn new(mut pin: T, interrupt: T::Interrupt) -> Self {
22 Self { syscfg } 25 let mut syscfg: SysCfg = unsafe { mem::transmute(()) };
23 }
24 26
25 pub fn new_pin<T>(&'static mut self, mut pin: T, interrupt: T::Interrupt) -> ExtiPin<T> 27 cortex_m::interrupt::free(|_| {
26 where 28 pin.make_interrupt_source(&mut syscfg);
27 T: HalExtiPin + WithInterrupt, 29 });
28 {
29 pin.make_interrupt_source(&mut self.syscfg);
30 30
31 ExtiPin { 31 Self { pin, interrupt }
32 pin,
33 interrupt,
34 _mgr: self,
35 }
36 } 32 }
37} 33}
38 34
39pub struct ExtiPin<T: HalExtiPin + WithInterrupt> { 35impl<T: gpio::ExtiPin + WithInterrupt + digital::OutputPin> digital::OutputPin for ExtiPin<T> {
40 pin: T,
41 interrupt: T::Interrupt,
42 _mgr: &'static ExtiManager,
43}
44
45impl<T: HalExtiPin + WithInterrupt + digital::OutputPin> digital::OutputPin for ExtiPin<T> {
46 type Error = T::Error; 36 type Error = T::Error;
47 37
48 fn set_low(&mut self) -> Result<(), Self::Error> { 38 fn set_low(&mut self) -> Result<(), Self::Error> {
@@ -54,7 +44,7 @@ impl<T: HalExtiPin + WithInterrupt + digital::OutputPin> digital::OutputPin for
54 } 44 }
55} 45}
56 46
57impl<T: HalExtiPin + WithInterrupt + digital::StatefulOutputPin> digital::StatefulOutputPin 47impl<T: gpio::ExtiPin + WithInterrupt + digital::StatefulOutputPin> digital::StatefulOutputPin
58 for ExtiPin<T> 48 for ExtiPin<T>
59{ 49{
60 fn is_set_low(&self) -> Result<bool, Self::Error> { 50 fn is_set_low(&self) -> Result<bool, Self::Error> {
@@ -66,7 +56,7 @@ impl<T: HalExtiPin + WithInterrupt + digital::StatefulOutputPin> digital::Statef
66 } 56 }
67} 57}
68 58
69impl<T: HalExtiPin + WithInterrupt + digital::ToggleableOutputPin> digital::ToggleableOutputPin 59impl<T: gpio::ExtiPin + WithInterrupt + digital::ToggleableOutputPin> digital::ToggleableOutputPin
70 for ExtiPin<T> 60 for ExtiPin<T>
71{ 61{
72 type Error = T::Error; 62 type Error = T::Error;
@@ -76,7 +66,7 @@ impl<T: HalExtiPin + WithInterrupt + digital::ToggleableOutputPin> digital::Togg
76 } 66 }
77} 67}
78 68
79impl<T: HalExtiPin + WithInterrupt + digital::InputPin> digital::InputPin for ExtiPin<T> { 69impl<T: gpio::ExtiPin + WithInterrupt + digital::InputPin> digital::InputPin for ExtiPin<T> {
80 type Error = T::Error; 70 type Error = T::Error;
81 71
82 fn is_high(&self) -> Result<bool, Self::Error> { 72 fn is_high(&self) -> Result<bool, Self::Error> {
@@ -99,7 +89,7 @@ impl<T: HalExtiPin + WithInterrupt + digital::InputPin> digital::InputPin for Ex
99 EXTI15_10_IRQn EXTI15_10_IRQHandler Handler for pins connected to line 10 to 15 89 EXTI15_10_IRQn EXTI15_10_IRQHandler Handler for pins connected to line 10 to 15
100*/ 90*/
101 91
102impl<T: HalExtiPin + WithInterrupt + 'static> WaitForRisingEdge for ExtiPin<T> { 92impl<T: gpio::ExtiPin + WithInterrupt + 'static> WaitForRisingEdge for ExtiPin<T> {
103 type Future<'a> = impl Future<Output = ()> + 'a; 93 type Future<'a> = impl Future<Output = ()> + 'a;
104 94
105 fn wait_for_rising_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> { 95 fn wait_for_rising_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
@@ -108,10 +98,13 @@ impl<T: HalExtiPin + WithInterrupt + 'static> WaitForRisingEdge for ExtiPin<T> {
108 s.pin.clear_interrupt_pending_bit(); 98 s.pin.clear_interrupt_pending_bit();
109 async move { 99 async move {
110 let fut = InterruptFuture::new(&mut s.interrupt); 100 let fut = InterruptFuture::new(&mut s.interrupt);
111 let mut exti: EXTI = unsafe { mem::transmute(()) }; 101 let pin = &mut s.pin;
102 cortex_m::interrupt::free(|_| {
103 let mut exti: EXTI = unsafe { mem::transmute(()) };
112 104
113 s.pin.trigger_on_edge(&mut exti, Edge::RISING); 105 pin.trigger_on_edge(&mut exti, Edge::RISING);
114 s.pin.enable_interrupt(&mut exti); 106 pin.enable_interrupt(&mut exti);
107 });
115 fut.await; 108 fut.await;
116 109
117 s.pin.clear_interrupt_pending_bit(); 110 s.pin.clear_interrupt_pending_bit();
@@ -119,7 +112,7 @@ impl<T: HalExtiPin + WithInterrupt + 'static> WaitForRisingEdge for ExtiPin<T> {
119 } 112 }
120} 113}
121 114
122impl<T: HalExtiPin + WithInterrupt + 'static> WaitForFallingEdge for ExtiPin<T> { 115impl<T: gpio::ExtiPin + WithInterrupt + 'static> WaitForFallingEdge for ExtiPin<T> {
123 type Future<'a> = impl Future<Output = ()> + 'a; 116 type Future<'a> = impl Future<Output = ()> + 'a;
124 117
125 fn wait_for_falling_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> { 118 fn wait_for_falling_edge<'a>(self: Pin<&'a mut Self>) -> Self::Future<'a> {
@@ -128,10 +121,13 @@ impl<T: HalExtiPin + WithInterrupt + 'static> WaitForFallingEdge for ExtiPin<T>
128 s.pin.clear_interrupt_pending_bit(); 121 s.pin.clear_interrupt_pending_bit();
129 async move { 122 async move {
130 let fut = InterruptFuture::new(&mut s.interrupt); 123 let fut = InterruptFuture::new(&mut s.interrupt);
131 let mut exti: EXTI = unsafe { mem::transmute(()) }; 124 let pin = &mut s.pin;
125 cortex_m::interrupt::free(|_| {
126 let mut exti: EXTI = unsafe { mem::transmute(()) };
132 127
133 s.pin.trigger_on_edge(&mut exti, Edge::FALLING); 128 pin.trigger_on_edge(&mut exti, Edge::FALLING);
134 s.pin.enable_interrupt(&mut exti); 129 pin.enable_interrupt(&mut exti);
130 });
135 fut.await; 131 fut.await;
136 132
137 s.pin.clear_interrupt_pending_bit(); 133 s.pin.clear_interrupt_pending_bit();
diff --git a/embassy-stm32l0/src/exti.rs b/embassy-stm32l0/src/exti.rs
index c93d213ef..32c56c490 100644
--- a/embassy-stm32l0/src/exti.rs
+++ b/embassy-stm32l0/src/exti.rs
@@ -13,34 +13,16 @@ use crate::hal::{
13use crate::interrupt; 13use crate::interrupt;
14use crate::pac::EXTI; 14use crate::pac::EXTI;
15 15
16pub struct ExtiManager {
17 syscfg: SYSCFG,
18}
19
20impl<'a> ExtiManager {
21 pub fn new(_exti: Exti, syscfg: SYSCFG) -> Self {
22 Self { syscfg }
23 }
24
25 pub fn new_pin<T>(&'static mut self, pin: T, interrupt: T::Interrupt) -> ExtiPin<T>
26 where
27 T: PinWithInterrupt,
28 {
29 ExtiPin {
30 pin,
31 interrupt,
32 mgr: self,
33 }
34 }
35}
36
37pub struct ExtiPin<T: PinWithInterrupt> { 16pub struct ExtiPin<T: PinWithInterrupt> {
38 pin: T, 17 pin: T,
39 interrupt: T::Interrupt, 18 interrupt: T::Interrupt,
40 mgr: &'static ExtiManager,
41} 19}
42 20
43impl<T: PinWithInterrupt + 'static> ExtiPin<T> { 21impl<T: PinWithInterrupt + 'static> ExtiPin<T> {
22 pub fn new(pin: T, interrupt: T::Interrupt) -> ExtiPin<T> {
23 ExtiPin { pin, interrupt }
24 }
25
44 fn wait_for_edge<'a>( 26 fn wait_for_edge<'a>(
45 self: Pin<&'a mut Self>, 27 self: Pin<&'a mut Self>,
46 edge: TriggerEdge, 28 edge: TriggerEdge,
@@ -57,10 +39,9 @@ impl<T: PinWithInterrupt + 'static> ExtiPin<T> {
57 let fut = InterruptFuture::new(&mut s.interrupt); 39 let fut = InterruptFuture::new(&mut s.interrupt);
58 40
59 let port = s.pin.port(); 41 let port = s.pin.port();
60 let syscfg = &s.mgr.syscfg as *const _ as *mut SYSCFG;
61 cortex_m::interrupt::free(|_| { 42 cortex_m::interrupt::free(|_| {
62 let syscfg = unsafe { &mut *syscfg }; 43 let mut syscfg: SYSCFG = unsafe { mem::transmute(()) };
63 exti.listen_gpio(syscfg, port, line, edge); 44 exti.listen_gpio(&mut syscfg, port, line, edge);
64 }); 45 });
65 46
66 fut.await; 47 fut.await;
@@ -105,11 +86,13 @@ pub trait PinWithInterrupt: private::Sealed {
105} 86}
106 87
107macro_rules! exti { 88macro_rules! exti {
108 ($($PER:ident => ($set:ident, $pin:ident),)+) => { 89 ($set:ident, [
90 $($INT:ident => $pin:ident,)+
91 ]) => {
109 $( 92 $(
110 impl<T> private::Sealed for gpio::$set::$pin<T> {} 93 impl<T> private::Sealed for gpio::$set::$pin<T> {}
111 impl<T> PinWithInterrupt for gpio::$set::$pin<T> { 94 impl<T> PinWithInterrupt for gpio::$set::$pin<T> {
112 type Interrupt = interrupt::$PER; 95 type Interrupt = interrupt::$INT;
113 fn port(&self) -> gpio::Port { 96 fn port(&self) -> gpio::Port {
114 self.port() 97 self.port()
115 } 98 }
@@ -118,107 +101,108 @@ macro_rules! exti {
118 } 101 }
119 } 102 }
120 )+ 103 )+
121 }
122}
123 104
124exti! { 105 };
125 EXTI0_1 => (gpioa, PA0), 106}
126 EXTI0_1 => (gpioa, PA1), 107
127 EXTI2_3 => (gpioa, PA2), 108exti!(gpioa, [
128 EXTI2_3 => (gpioa, PA3), 109 EXTI0_1 => PA0,
129 EXTI4_15 => (gpioa, PA4), 110 EXTI0_1 => PA1,
130 EXTI4_15 => (gpioa, PA5), 111 EXTI2_3 => PA2,
131 EXTI4_15 => (gpioa, PA6), 112 EXTI2_3 => PA3,
132 EXTI4_15 => (gpioa, PA7), 113 EXTI4_15 => PA4,
133 EXTI4_15 => (gpioa, PA8), 114 EXTI4_15 => PA5,
134 EXTI4_15 => (gpioa, PA9), 115 EXTI4_15 => PA6,
135 EXTI4_15 => (gpioa, PA10), 116 EXTI4_15 => PA7,
136 EXTI4_15 => (gpioa, PA11), 117 EXTI4_15 => PA8,
137 EXTI4_15 => (gpioa, PA12), 118 EXTI4_15 => PA9,
138 EXTI4_15 => (gpioa, PA13), 119 EXTI4_15 => PA10,
139 EXTI4_15 => (gpioa, PA14), 120 EXTI4_15 => PA11,
140 EXTI4_15 => (gpioa, PA15), 121 EXTI4_15 => PA12,
141} 122 EXTI4_15 => PA13,
142 123 EXTI4_15 => PA14,
143exti! { 124 EXTI4_15 => PA15,
144 EXTI0_1 => (gpiob, PB0), 125]);
145 EXTI0_1 => (gpiob, PB1), 126
146 EXTI2_3 => (gpiob, PB2), 127exti!(gpiob, [
147 EXTI2_3 => (gpiob, PB3), 128 EXTI0_1 => PB0,
148 EXTI4_15 => (gpiob, PB4), 129 EXTI0_1 => PB1,
149 EXTI4_15 => (gpiob, PB5), 130 EXTI2_3 => PB2,
150 EXTI4_15 => (gpiob, PB6), 131 EXTI2_3 => PB3,
151 EXTI4_15 => (gpiob, PB7), 132 EXTI4_15 => PB4,
152 EXTI4_15 => (gpiob, PB8), 133 EXTI4_15 => PB5,
153 EXTI4_15 => (gpiob, PB9), 134 EXTI4_15 => PB6,
154 EXTI4_15 => (gpiob, PB10), 135 EXTI4_15 => PB7,
155 EXTI4_15 => (gpiob, PB11), 136 EXTI4_15 => PB8,
156 EXTI4_15 => (gpiob, PB12), 137 EXTI4_15 => PB9,
157 EXTI4_15 => (gpiob, PB13), 138 EXTI4_15 => PB10,
158 EXTI4_15 => (gpiob, PB14), 139 EXTI4_15 => PB11,
159 EXTI4_15 => (gpiob, PB15), 140 EXTI4_15 => PB12,
160} 141 EXTI4_15 => PB13,
161 142 EXTI4_15 => PB14,
162exti! { 143 EXTI4_15 => PB15,
163 EXTI0_1 => (gpioc, PC0), 144]);
164 EXTI0_1 => (gpioc, PC1), 145
165 EXTI2_3 => (gpioc, PC2), 146exti!(gpioc, [
166 EXTI2_3 => (gpioc, PC3), 147 EXTI0_1 => PC0,
167 EXTI4_15 => (gpioc, PC4), 148 EXTI0_1 => PC1,
168 EXTI4_15 => (gpioc, PC5), 149 EXTI2_3 => PC2,
169 EXTI4_15 => (gpioc, PC6), 150 EXTI2_3 => PC3,
170 EXTI4_15 => (gpioc, PC7), 151 EXTI4_15 => PC4,
171 EXTI4_15 => (gpioc, PC8), 152 EXTI4_15 => PC5,
172 EXTI4_15 => (gpioc, PC9), 153 EXTI4_15 => PC6,
173 EXTI4_15 => (gpioc, PC10), 154 EXTI4_15 => PC7,
174 EXTI4_15 => (gpioc, PC11), 155 EXTI4_15 => PC8,
175 EXTI4_15 => (gpioc, PC12), 156 EXTI4_15 => PC9,
176 EXTI4_15 => (gpioc, PC13), 157 EXTI4_15 => PC10,
177 EXTI4_15 => (gpioc, PC14), 158 EXTI4_15 => PC11,
178 EXTI4_15 => (gpioc, PC15), 159 EXTI4_15 => PC12,
179} 160 EXTI4_15 => PC13,
180 161 EXTI4_15 => PC14,
181exti! { 162 EXTI4_15 => PC15,
182 EXTI0_1 => (gpiod, PD0), 163]);
183 EXTI0_1 => (gpiod, PD1), 164
184 EXTI2_3 => (gpiod, PD2), 165exti!(gpiod, [
185 EXTI2_3 => (gpiod, PD3), 166 EXTI0_1 => PD0,
186 EXTI4_15 => (gpiod, PD4), 167 EXTI0_1 => PD1,
187 EXTI4_15 => (gpiod, PD5), 168 EXTI2_3 => PD2,
188 EXTI4_15 => (gpiod, PD6), 169 EXTI2_3 => PD3,
189 EXTI4_15 => (gpiod, PD7), 170 EXTI4_15 => PD4,
190 EXTI4_15 => (gpiod, PD8), 171 EXTI4_15 => PD5,
191 EXTI4_15 => (gpiod, PD9), 172 EXTI4_15 => PD6,
192 EXTI4_15 => (gpiod, PD10), 173 EXTI4_15 => PD7,
193 EXTI4_15 => (gpiod, PD11), 174 EXTI4_15 => PD8,
194 EXTI4_15 => (gpiod, PD12), 175 EXTI4_15 => PD9,
195 EXTI4_15 => (gpiod, PD13), 176 EXTI4_15 => PD10,
196 EXTI4_15 => (gpiod, PD14), 177 EXTI4_15 => PD11,
197 EXTI4_15 => (gpiod, PD15), 178 EXTI4_15 => PD12,
198} 179 EXTI4_15 => PD13,
199 180 EXTI4_15 => PD14,
200exti! { 181 EXTI4_15 => PD15,
201 EXTI0_1 => (gpioe, PE0), 182]);
202 EXTI0_1 => (gpioe, PE1), 183
203 EXTI2_3 => (gpioe, PE2), 184exti!(gpioe, [
204 EXTI2_3 => (gpioe, PE3), 185 EXTI0_1 => PE0,
205 EXTI4_15 => (gpioe, PE4), 186 EXTI0_1 => PE1,
206 EXTI4_15 => (gpioe, PE5), 187 EXTI2_3 => PE2,
207 EXTI4_15 => (gpioe, PE6), 188 EXTI2_3 => PE3,
208 EXTI4_15 => (gpioe, PE7), 189 EXTI4_15 => PE4,
209 EXTI4_15 => (gpioe, PE8), 190 EXTI4_15 => PE5,
210 EXTI4_15 => (gpioe, PE9), 191 EXTI4_15 => PE6,
211 EXTI4_15 => (gpioe, PE10), 192 EXTI4_15 => PE7,
212 EXTI4_15 => (gpioe, PE11), 193 EXTI4_15 => PE8,
213 EXTI4_15 => (gpioe, PE12), 194 EXTI4_15 => PE9,
214 EXTI4_15 => (gpioe, PE13), 195 EXTI4_15 => PE10,
215 EXTI4_15 => (gpioe, PE14), 196 EXTI4_15 => PE11,
216 EXTI4_15 => (gpioe, PE15), 197 EXTI4_15 => PE12,
217} 198 EXTI4_15 => PE13,
218 199 EXTI4_15 => PE14,
219exti! { 200 EXTI4_15 => PE15,
220 EXTI0_1 => (gpioh, PH0), 201]);
221 EXTI0_1 => (gpioh, PH1), 202
222 EXTI4_15 => (gpioh, PH9), 203exti!(gpioh, [
223 EXTI4_15 => (gpioh, PH10), 204 EXTI0_1 => PH0,
224} 205 EXTI0_1 => PH1,
206 EXTI4_15 => PH9,
207 EXTI4_15 => PH10,
208]);