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authorDario Nieuwenhuis <[email protected]>2022-08-17 14:44:18 +0200
committerDario Nieuwenhuis <[email protected]>2022-08-17 14:44:18 +0200
commit72cd015c1ad107003e56ffcec3441b43066e4bda (patch)
tree1c36b092d473dbca2742e7d0e7fd259360e6b9bf
parent13b1ca1eb65ddf969526fd71841145ad9a0502f8 (diff)
stm32/sdmmc: remove cast no longer allowed on latest nightly due to nonexhaustive enum.
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs9
1 files changed, 8 insertions, 1 deletions
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index 1de4b2aa6..3ad31ec87 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -999,10 +999,17 @@ impl SdmmcInner {
999 fn clkcr_set_clkdiv(&self, freq: u32, width: BusWidth, ker_ck: Hertz, clock: &mut Hertz) -> Result<(), Error> { 999 fn clkcr_set_clkdiv(&self, freq: u32, width: BusWidth, ker_ck: Hertz, clock: &mut Hertz) -> Result<(), Error> {
1000 let regs = self.0; 1000 let regs = self.0;
1001 1001
1002 let width_u32 = match width {
1003 BusWidth::One => 1u32,
1004 BusWidth::Four => 4u32,
1005 BusWidth::Eight => 8u32,
1006 _ => panic!("Invalid Bus Width"),
1007 };
1008
1002 let (clkdiv, new_clock) = clk_div(ker_ck, freq)?; 1009 let (clkdiv, new_clock) = clk_div(ker_ck, freq)?;
1003 // Enforce AHB and SDMMC_CK clock relation. See RM0433 Rev 7 1010 // Enforce AHB and SDMMC_CK clock relation. See RM0433 Rev 7
1004 // Section 55.5.8 1011 // Section 55.5.8
1005 let sdmmc_bus_bandwidth = new_clock.0 * (width as u32); 1012 let sdmmc_bus_bandwidth = new_clock.0 * width_u32;
1006 assert!(ker_ck.0 > 3 * sdmmc_bus_bandwidth / 32); 1013 assert!(ker_ck.0 > 3 * sdmmc_bus_bandwidth / 32);
1007 *clock = new_clock; 1014 *clock = new_clock;
1008 1015