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authorDario Nieuwenhuis <[email protected]>2023-12-19 15:20:15 +0000
committerGitHub <[email protected]>2023-12-19 15:20:15 +0000
commit7d9a76da009595eb761c6fcfe4ada1dfa8f583ae (patch)
tree0ed65607e21e515ef12e821d95b81f8d00496517
parentc995732b0e08b3157aa8886da2e5ce4a36af6e93 (diff)
parent3e2e109437d8f5f4bcdd59dac5fe9f3a7bf9f047 (diff)
Merge pull request #2313 from eZioPan/update-metapac6
match up with "DMA cleanup" metapac change
-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/src/dma/bdma.rs20
-rw-r--r--embassy-stm32/src/dma/dma.rs27
3 files changed, 20 insertions, 31 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 4a7a2f2c9..7f2cf6bfb 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -58,7 +58,7 @@ rand_core = "0.6.3"
58sdio-host = "0.5.0" 58sdio-host = "0.5.0"
59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true } 59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
60critical-section = "1.1" 60critical-section = "1.1"
61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-91cee0d1fdcb4e447b65a09756b506f4af91b7e2" } 61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2234f380f51d16d0398b8e547088b33ea623cc7c" }
62vcell = "0.1.3" 62vcell = "0.1.3"
63bxcan = "0.7.0" 63bxcan = "0.7.0"
64nb = "1.0.0" 64nb = "1.0.0"
@@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
76[build-dependencies] 76[build-dependencies]
77proc-macro2 = "1.0.36" 77proc-macro2 = "1.0.36"
78quote = "1.0.15" 78quote = "1.0.15"
79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-91cee0d1fdcb4e447b65a09756b506f4af91b7e2", default-features = false, features = ["metadata"]} 79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2234f380f51d16d0398b8e547088b33ea623cc7c", default-features = false, features = ["metadata"]}
80 80
81 81
82[features] 82[features]
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index 5102330c0..2f37b1edf 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -303,20 +303,14 @@ impl<'a, C: Channel> Transfer<'a, C> {
303 ch.cr().write(|w| { 303 ch.cr().write(|w| {
304 w.set_psize(data_size.into()); 304 w.set_psize(data_size.into());
305 w.set_msize(data_size.into()); 305 w.set_msize(data_size.into());
306 if incr_mem { 306 w.set_minc(incr_mem);
307 w.set_minc(vals::Inc::ENABLED);
308 } else {
309 w.set_minc(vals::Inc::DISABLED);
310 }
311 w.set_dir(dir.into()); 307 w.set_dir(dir.into());
312 w.set_teie(true); 308 w.set_teie(true);
313 w.set_tcie(options.complete_transfer_ir); 309 w.set_tcie(options.complete_transfer_ir);
314 w.set_htie(options.half_transfer_ir); 310 w.set_htie(options.half_transfer_ir);
311 w.set_circ(options.circular);
315 if options.circular { 312 if options.circular {
316 w.set_circ(vals::Circ::ENABLED);
317 debug!("Setting circular mode"); 313 debug!("Setting circular mode");
318 } else {
319 w.set_circ(vals::Circ::DISABLED);
320 } 314 }
321 w.set_pl(vals::Pl::VERYHIGH); 315 w.set_pl(vals::Pl::VERYHIGH);
322 w.set_en(true); 316 w.set_en(true);
@@ -352,7 +346,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
352 pub fn is_running(&mut self) -> bool { 346 pub fn is_running(&mut self) -> bool {
353 let ch = self.channel.regs().ch(self.channel.num()); 347 let ch = self.channel.regs().ch(self.channel.num());
354 let en = ch.cr().read().en(); 348 let en = ch.cr().read().en();
355 let circular = ch.cr().read().circ() == vals::Circ::ENABLED; 349 let circular = ch.cr().read().circ();
356 let tcif = STATE.complete_count[self.channel.index()].load(Ordering::Acquire) != 0; 350 let tcif = STATE.complete_count[self.channel.index()].load(Ordering::Acquire) != 0;
357 en && (circular || !tcif) 351 en && (circular || !tcif)
358 } 352 }
@@ -467,12 +461,12 @@ impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
467 let mut w = regs::Cr(0); 461 let mut w = regs::Cr(0);
468 w.set_psize(data_size.into()); 462 w.set_psize(data_size.into());
469 w.set_msize(data_size.into()); 463 w.set_msize(data_size.into());
470 w.set_minc(vals::Inc::ENABLED); 464 w.set_minc(true);
471 w.set_dir(dir.into()); 465 w.set_dir(dir.into());
472 w.set_teie(true); 466 w.set_teie(true);
473 w.set_htie(true); 467 w.set_htie(true);
474 w.set_tcie(true); 468 w.set_tcie(true);
475 w.set_circ(vals::Circ::ENABLED); 469 w.set_circ(true);
476 w.set_pl(vals::Pl::VERYHIGH); 470 w.set_pl(vals::Pl::VERYHIGH);
477 w.set_en(true); 471 w.set_en(true);
478 472
@@ -625,12 +619,12 @@ impl<'a, C: Channel, W: Word> WritableRingBuffer<'a, C, W> {
625 let mut w = regs::Cr(0); 619 let mut w = regs::Cr(0);
626 w.set_psize(data_size.into()); 620 w.set_psize(data_size.into());
627 w.set_msize(data_size.into()); 621 w.set_msize(data_size.into());
628 w.set_minc(vals::Inc::ENABLED); 622 w.set_minc(true);
629 w.set_dir(dir.into()); 623 w.set_dir(dir.into());
630 w.set_teie(true); 624 w.set_teie(true);
631 w.set_htie(true); 625 w.set_htie(true);
632 w.set_tcie(true); 626 w.set_tcie(true);
633 w.set_circ(vals::Circ::ENABLED); 627 w.set_circ(true);
634 w.set_pl(vals::Pl::VERYHIGH); 628 w.set_pl(vals::Pl::VERYHIGH);
635 w.set_en(true); 629 w.set_en(true);
636 630
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 64e492c10..9b47ca5c3 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -382,18 +382,13 @@ impl<'a, C: Channel> Transfer<'a, C> {
382 w.set_msize(data_size.into()); 382 w.set_msize(data_size.into());
383 w.set_psize(data_size.into()); 383 w.set_psize(data_size.into());
384 w.set_pl(vals::Pl::VERYHIGH); 384 w.set_pl(vals::Pl::VERYHIGH);
385 w.set_minc(match incr_mem { 385 w.set_minc(incr_mem);
386 true => vals::Inc::INCREMENTED, 386 w.set_pinc(false);
387 false => vals::Inc::FIXED,
388 });
389 w.set_pinc(vals::Inc::FIXED);
390 w.set_teie(true); 387 w.set_teie(true);
391 w.set_tcie(options.complete_transfer_ir); 388 w.set_tcie(options.complete_transfer_ir);
389 w.set_circ(options.circular);
392 if options.circular { 390 if options.circular {
393 w.set_circ(vals::Circ::ENABLED);
394 debug!("Setting circular mode"); 391 debug!("Setting circular mode");
395 } else {
396 w.set_circ(vals::Circ::DISABLED);
397 } 392 }
398 #[cfg(dma_v1)] 393 #[cfg(dma_v1)]
399 w.set_trbuff(true); 394 w.set_trbuff(true);
@@ -545,8 +540,8 @@ impl<'a, C: Channel, W: Word> DoubleBuffered<'a, C, W> {
545 w.set_msize(data_size.into()); 540 w.set_msize(data_size.into());
546 w.set_psize(data_size.into()); 541 w.set_psize(data_size.into());
547 w.set_pl(vals::Pl::VERYHIGH); 542 w.set_pl(vals::Pl::VERYHIGH);
548 w.set_minc(vals::Inc::INCREMENTED); 543 w.set_minc(true);
549 w.set_pinc(vals::Inc::FIXED); 544 w.set_pinc(false);
550 w.set_teie(true); 545 w.set_teie(true);
551 w.set_tcie(true); 546 w.set_tcie(true);
552 #[cfg(dma_v1)] 547 #[cfg(dma_v1)]
@@ -703,12 +698,12 @@ impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
703 w.set_msize(data_size.into()); 698 w.set_msize(data_size.into());
704 w.set_psize(data_size.into()); 699 w.set_psize(data_size.into());
705 w.set_pl(vals::Pl::VERYHIGH); 700 w.set_pl(vals::Pl::VERYHIGH);
706 w.set_minc(vals::Inc::INCREMENTED); 701 w.set_minc(true);
707 w.set_pinc(vals::Inc::FIXED); 702 w.set_pinc(false);
708 w.set_teie(true); 703 w.set_teie(true);
709 w.set_htie(options.half_transfer_ir); 704 w.set_htie(options.half_transfer_ir);
710 w.set_tcie(true); 705 w.set_tcie(true);
711 w.set_circ(vals::Circ::ENABLED); 706 w.set_circ(true);
712 #[cfg(dma_v1)] 707 #[cfg(dma_v1)]
713 w.set_trbuff(true); 708 w.set_trbuff(true);
714 #[cfg(dma_v2)] 709 #[cfg(dma_v2)]
@@ -878,12 +873,12 @@ impl<'a, C: Channel, W: Word> WritableRingBuffer<'a, C, W> {
878 w.set_msize(data_size.into()); 873 w.set_msize(data_size.into());
879 w.set_psize(data_size.into()); 874 w.set_psize(data_size.into());
880 w.set_pl(vals::Pl::VERYHIGH); 875 w.set_pl(vals::Pl::VERYHIGH);
881 w.set_minc(vals::Inc::INCREMENTED); 876 w.set_minc(true);
882 w.set_pinc(vals::Inc::FIXED); 877 w.set_pinc(false);
883 w.set_teie(true); 878 w.set_teie(true);
884 w.set_htie(options.half_transfer_ir); 879 w.set_htie(options.half_transfer_ir);
885 w.set_tcie(true); 880 w.set_tcie(true);
886 w.set_circ(vals::Circ::ENABLED); 881 w.set_circ(true);
887 #[cfg(dma_v1)] 882 #[cfg(dma_v1)]
888 w.set_trbuff(true); 883 w.set_trbuff(true);
889 #[cfg(dma_v2)] 884 #[cfg(dma_v2)]