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authorDario Nieuwenhuis <[email protected]>2020-12-29 15:20:42 +0100
committerDario Nieuwenhuis <[email protected]>2020-12-29 15:20:42 +0100
commit7dc81faa4ec46074c3500a868df18e0d123f0ba6 (patch)
tree8229727035f1aa26a9477fa702f02dd53592dd99
parentaf5454fbfec6232074c79ef571b2135dc7253d45 (diff)
Declare irqs for each nrf chip
-rw-r--r--embassy-nrf/src/interrupt.rs244
1 files changed, 201 insertions, 43 deletions
diff --git a/embassy-nrf/src/interrupt.rs b/embassy-nrf/src/interrupt.rs
index 3afded553..90b568573 100644
--- a/embassy-nrf/src/interrupt.rs
+++ b/embassy-nrf/src/interrupt.rs
@@ -78,46 +78,204 @@ where
78 } 78 }
79} 79}
80 80
81declare!(POWER_CLOCK); 81#[cfg(feature = "52810")]
82declare!(RADIO); 82mod irqs {
83declare!(UARTE0_UART0); 83 use super::*;
84declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); 84 declare!(POWER_CLOCK);
85declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); 85 declare!(RADIO);
86declare!(NFCT); 86 declare!(UARTE0_UART0);
87declare!(GPIOTE); 87 declare!(TWIM0_TWIS0_TWI0);
88declare!(SAADC); 88 declare!(SPIM0_SPIS0_SPI0);
89declare!(TIMER0); 89 declare!(GPIOTE);
90declare!(TIMER1); 90 declare!(SAADC);
91declare!(TIMER2); 91 declare!(TIMER0);
92declare!(RTC0); 92 declare!(TIMER1);
93declare!(TEMP); 93 declare!(TIMER2);
94declare!(RNG); 94 declare!(RTC0);
95declare!(ECB); 95 declare!(TEMP);
96declare!(CCM_AAR); 96 declare!(RNG);
97declare!(WDT); 97 declare!(ECB);
98declare!(RTC1); 98 declare!(CCM_AAR);
99declare!(QDEC); 99 declare!(WDT);
100declare!(COMP_LPCOMP); 100 declare!(RTC1);
101declare!(SWI0_EGU0); 101 declare!(QDEC);
102declare!(SWI1_EGU1); 102 declare!(COMP);
103declare!(SWI2_EGU2); 103 declare!(SWI0_EGU0);
104declare!(SWI3_EGU3); 104 declare!(SWI1_EGU1);
105declare!(SWI4_EGU4); 105 declare!(SWI2);
106declare!(SWI5_EGU5); 106 declare!(SWI3);
107declare!(TIMER3); 107 declare!(SWI4);
108declare!(TIMER4); 108 declare!(SWI5);
109declare!(PWM0); 109 declare!(PWM0);
110declare!(PDM); 110 declare!(PDM);
111declare!(MWU); 111}
112declare!(PWM1); 112
113declare!(PWM2); 113#[cfg(feature = "52811")]
114declare!(SPIM2_SPIS2_SPI2); 114mod irqs {
115declare!(RTC2); 115 use super::*;
116declare!(I2S); 116 declare!(POWER_CLOCK);
117declare!(FPU); 117 declare!(RADIO);
118declare!(USBD); 118 declare!(UARTE0_UART0);
119declare!(UARTE1); 119 declare!(TWIM0_TWIS0_TWI0_SPIM1_SPIS1_SPI1);
120declare!(QSPI); 120 declare!(SPIM0_SPIS0_SPI0);
121declare!(CRYPTOCELL); 121 declare!(GPIOTE);
122declare!(PWM3); 122 declare!(SAADC);
123declare!(SPIM3); 123 declare!(TIMER0);
124 declare!(TIMER1);
125 declare!(TIMER2);
126 declare!(RTC0);
127 declare!(TEMP);
128 declare!(RNG);
129 declare!(ECB);
130 declare!(CCM_AAR);
131 declare!(WDT);
132 declare!(RTC1);
133 declare!(QDEC);
134 declare!(COMP);
135 declare!(SWI0_EGU0);
136 declare!(SWI1_EGU1);
137 declare!(SWI2);
138 declare!(SWI3);
139 declare!(SWI4);
140 declare!(SWI5);
141 declare!(PWM0);
142 declare!(PDM);
143}
144
145#[cfg(feature = "52832")]
146mod irqs {
147 use super::*;
148 declare!(POWER_CLOCK);
149 declare!(RADIO);
150 declare!(UARTE0_UART0);
151 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
152 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
153 declare!(NFCT);
154 declare!(GPIOTE);
155 declare!(SAADC);
156 declare!(TIMER0);
157 declare!(TIMER1);
158 declare!(TIMER2);
159 declare!(RTC0);
160 declare!(TEMP);
161 declare!(RNG);
162 declare!(ECB);
163 declare!(CCM_AAR);
164 declare!(WDT);
165 declare!(RTC1);
166 declare!(QDEC);
167 declare!(COMP_LPCOMP);
168 declare!(SWI0_EGU0);
169 declare!(SWI1_EGU1);
170 declare!(SWI2_EGU2);
171 declare!(SWI3_EGU3);
172 declare!(SWI4_EGU4);
173 declare!(SWI5_EGU5);
174 declare!(TIMER3);
175 declare!(TIMER4);
176 declare!(PWM0);
177 declare!(PDM);
178 declare!(MWU);
179 declare!(PWM1);
180 declare!(PWM2);
181 declare!(SPIM2_SPIS2_SPI2);
182 declare!(RTC2);
183 declare!(I2S);
184 declare!(FPU);
185}
186
187#[cfg(feature = "52833")]
188mod irqs {
189 use super::*;
190 declare!(POWER_CLOCK);
191 declare!(RADIO);
192 declare!(UARTE0_UART0);
193 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
194 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
195 declare!(NFCT);
196 declare!(GPIOTE);
197 declare!(SAADC);
198 declare!(TIMER0);
199 declare!(TIMER1);
200 declare!(TIMER2);
201 declare!(RTC0);
202 declare!(TEMP);
203 declare!(RNG);
204 declare!(ECB);
205 declare!(CCM_AAR);
206 declare!(WDT);
207 declare!(RTC1);
208 declare!(QDEC);
209 declare!(COMP_LPCOMP);
210 declare!(SWI0_EGU0);
211 declare!(SWI1_EGU1);
212 declare!(SWI2_EGU2);
213 declare!(SWI3_EGU3);
214 declare!(SWI4_EGU4);
215 declare!(SWI5_EGU5);
216 declare!(TIMER3);
217 declare!(TIMER4);
218 declare!(PWM0);
219 declare!(PDM);
220 declare!(MWU);
221 declare!(PWM1);
222 declare!(PWM2);
223 declare!(SPIM2_SPIS2_SPI2);
224 declare!(RTC2);
225 declare!(I2S);
226 declare!(FPU);
227 declare!(USBD);
228 declare!(UARTE1);
229 declare!(PWM3);
230 declare!(SPIM3);
231}
232
233#[cfg(feature = "52840")]
234mod irqs {
235 use super::*;
236 declare!(POWER_CLOCK);
237 declare!(RADIO);
238 declare!(UARTE0_UART0);
239 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
240 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
241 declare!(NFCT);
242 declare!(GPIOTE);
243 declare!(SAADC);
244 declare!(TIMER0);
245 declare!(TIMER1);
246 declare!(TIMER2);
247 declare!(RTC0);
248 declare!(TEMP);
249 declare!(RNG);
250 declare!(ECB);
251 declare!(CCM_AAR);
252 declare!(WDT);
253 declare!(RTC1);
254 declare!(QDEC);
255 declare!(COMP_LPCOMP);
256 declare!(SWI0_EGU0);
257 declare!(SWI1_EGU1);
258 declare!(SWI2_EGU2);
259 declare!(SWI3_EGU3);
260 declare!(SWI4_EGU4);
261 declare!(SWI5_EGU5);
262 declare!(TIMER3);
263 declare!(TIMER4);
264 declare!(PWM0);
265 declare!(PDM);
266 declare!(MWU);
267 declare!(PWM1);
268 declare!(PWM2);
269 declare!(SPIM2_SPIS2_SPI2);
270 declare!(RTC2);
271 declare!(I2S);
272 declare!(FPU);
273 declare!(USBD);
274 declare!(UARTE1);
275 declare!(QSPI);
276 declare!(CRYPTOCELL);
277 declare!(PWM3);
278 declare!(SPIM3);
279}
280
281pub use irqs::*;