diff options
| author | Andelf <[email protected]> | 2024-04-08 01:23:49 +0800 |
|---|---|---|
| committer | Andelf <[email protected]> | 2024-04-08 01:23:49 +0800 |
| commit | 803b76df86ed5eadfa3e0150bc5a3b129ae1f7c6 (patch) | |
| tree | 9f941ddc886d8bdfa98fdbc78a26d7796066ce4a | |
| parent | 328cb99068c3b75489969406dceddc7783882df1 (diff) | |
Fix crash caused by using higher MSI on STM32WL
| -rw-r--r-- | embassy-stm32/src/rcc/l.rs | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 9079ddd41..d40ea0c53 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs | |||
| @@ -157,6 +157,13 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 157 | while RCC.cfgr().read().sws() != Sysclk::MSI {} | 157 | while RCC.cfgr().read().sws() != Sysclk::MSI {} |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | #[cfg(stm32wl)] | ||
| 161 | { | ||
| 162 | // Set max latency | ||
| 163 | FLASH.acr().modify(|w| w.set_prften(true)); | ||
| 164 | FLASH.acr().modify(|w| w.set_latency(2)); | ||
| 165 | } | ||
| 166 | |||
| 160 | // Set voltage scale | 167 | // Set voltage scale |
| 161 | #[cfg(any(stm32l0, stm32l1))] | 168 | #[cfg(any(stm32l0, stm32l1))] |
| 162 | { | 169 | { |