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authorPeter Gibson <[email protected]>2023-06-14 11:56:44 +1000
committerPeter Gibson <[email protected]>2023-06-15 13:24:49 +1000
commit837950cd7440460f0e1f89e1ab9607f1a9d656ab (patch)
treea44bbe846dd6000822091b2c2f519c5e9fc0a591
parent64e3310e64ea31923980418e654f07c9a862e54c (diff)
ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne
-rw-r--r--embassy-stm32/src/usart/buffered.rs37
1 files changed, 21 insertions, 16 deletions
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 613da5674..f55123e1d 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -21,27 +21,32 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt
21 // RX 21 // RX
22 unsafe { 22 unsafe {
23 let sr = sr(r).read(); 23 let sr = sr(r).read();
24 // Reading DR clears the rxne, error and idle interrupt flags on v1.
25 let dr = if sr.ore() || sr.idle() || sr.rxne() {
26 Some(rdr(r).read_volatile())
27 }
28 else {
29 None
30 };
24 clear_interrupt_flags(r, sr); 31 clear_interrupt_flags(r, sr);
25 32
33 if sr.pe() {
34 warn!("Parity error");
35 }
36 if sr.fe() {
37 warn!("Framing error");
38 }
39 if sr.ne() {
40 warn!("Noise error");
41 }
42 if sr.ore() {
43 warn!("Overrun error");
44 }
26 if sr.rxne() { 45 if sr.rxne() {
27 if sr.pe() {
28 warn!("Parity error");
29 }
30 if sr.fe() {
31 warn!("Framing error");
32 }
33 if sr.ne() {
34 warn!("Noise error");
35 }
36 if sr.ore() {
37 warn!("Overrun error");
38 }
39
40 let mut rx_writer = state.rx_buf.writer(); 46 let mut rx_writer = state.rx_buf.writer();
41 let buf = rx_writer.push_slice(); 47 let buf = rx_writer.push_slice();
42 if !buf.is_empty() { 48 if !buf.is_empty() {
43 // This read also clears the error and idle interrupt flags on v1. 49 buf[0] = dr.unwrap();
44 buf[0] = rdr(r).read_volatile();
45 rx_writer.push_done(1); 50 rx_writer.push_done(1);
46 } else { 51 } else {
47 // FIXME: Should we disable any further RX interrupts when the buffer becomes full. 52 // FIXME: Should we disable any further RX interrupts when the buffer becomes full.
@@ -54,7 +59,7 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt
54 59
55 if sr.idle() { 60 if sr.idle() {
56 state.rx_waker.wake(); 61 state.rx_waker.wake();
57 }; 62 }
58 } 63 }
59 64
60 // TX 65 // TX