diff options
| author | Daniel Nilsson <[email protected]> | 2025-11-14 11:15:42 +0100 |
|---|---|---|
| committer | Daniel Nilsson <[email protected]> | 2025-11-14 11:15:42 +0100 |
| commit | 842ee9bef98975d2a874a425983cfad59610a963 (patch) | |
| tree | ec5b191f1be548d9037a6fb60f3eaba91298393c | |
| parent | 7ddee557405bbd11a2915818044b508158aa149f (diff) | |
undoing channel split
| -rw-r--r-- | embassy-stm32/src/adc/v3.rs | 154 |
1 files changed, 50 insertions, 104 deletions
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index c77a1d4f5..c65357aff 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs | |||
| @@ -11,10 +11,9 @@ pub use pac::adc::vals::{Ovsr, Ovss, Presc}; | |||
| 11 | 11 | ||
| 12 | #[allow(unused_imports)] | 12 | #[allow(unused_imports)] |
| 13 | use super::SealedAdcChannel; | 13 | use super::SealedAdcChannel; |
| 14 | #[allow(unused_imports)] | ||
| 15 | use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us}; | 14 | use super::{Adc, Averaging, Instance, Resolution, SampleTime, Temperature, Vbat, VrefInt, blocking_delay_us}; |
| 16 | use crate::adc::ConversionMode; | 15 | use crate::adc::ConversionMode; |
| 17 | use crate::{Peri, pac, peripherals, rcc}; | 16 | use crate::{Peri, pac, rcc}; |
| 18 | 17 | ||
| 19 | /// Default VREF voltage used for sample conversion to millivolts. | 18 | /// Default VREF voltage used for sample conversion to millivolts. |
| 20 | pub const VREF_DEFAULT_MV: u32 = 3300; | 19 | pub const VREF_DEFAULT_MV: u32 = 3300; |
| @@ -490,22 +489,6 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 490 | s | 489 | s |
| 491 | } | 490 | } |
| 492 | 491 | ||
| 493 | #[cfg(any(adc_g0, adc_u0))] | ||
| 494 | pub fn enable_vbat(&self) -> Vbat { | ||
| 495 | T::regs().ccr().modify(|reg| { | ||
| 496 | reg.set_vbaten(true); | ||
| 497 | }); | ||
| 498 | |||
| 499 | Vbat {} | ||
| 500 | } | ||
| 501 | |||
| 502 | #[cfg(any(adc_g0, adc_u0))] | ||
| 503 | pub fn disable_vbat(&self) { | ||
| 504 | T::regs().ccr().modify(|reg| { | ||
| 505 | reg.set_vbaten(false); | ||
| 506 | }); | ||
| 507 | } | ||
| 508 | |||
| 509 | #[cfg(adc_g0)] | 492 | #[cfg(adc_g0)] |
| 510 | /// Initialize ADC with explicit clock for the analog ADC | 493 | /// Initialize ADC with explicit clock for the analog ADC |
| 511 | pub fn new_with_clock(adc: Peri<'d, T>, clock: Clock) -> Self { | 494 | pub fn new_with_clock(adc: Peri<'d, T>, clock: Clock) -> Self { |
| @@ -542,124 +525,87 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 542 | Self { adc } | 525 | Self { adc } |
| 543 | } | 526 | } |
| 544 | 527 | ||
| 545 | /* | 528 | pub fn enable_vrefint(&self) -> VrefInt { |
| 546 | /// Convert a raw sample from the `Temperature` to deg C | 529 | #[cfg(not(any(adc_g0, adc_u0)))] |
| 547 | pub fn to_degrees_centigrade(sample: u16) -> f32 { | 530 | T::common_regs().ccr().modify(|reg| { |
| 548 | (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32) | 531 | reg.set_vrefen(true); |
| 549 | * (sample as f32 - VtempCal30::get().read() as f32) | 532 | }); |
| 550 | + 30.0 | 533 | #[cfg(any(adc_g0, adc_u0))] |
| 551 | } | 534 | T::regs().ccr().modify(|reg| { |
| 552 | */ | 535 | reg.set_vrefen(true); |
| 553 | } | 536 | }); |
| 554 | 537 | ||
| 555 | #[cfg(not(any(adc_g0, adc_u0, stm32wb)))] | 538 | // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us |
| 556 | impl<'d> Adc<'d, peripherals::ADC2> { | 539 | // to stabilize the internal voltage reference. |
| 557 | pub fn enable_vbat(&self) -> Vbat { | 540 | blocking_delay_us(15); |
| 558 | cfg_if! { | ||
| 559 | if #[cfg(any(adc_h5, adc_h7rs))] { | ||
| 560 | pac::ADC12_COMMON.ccr().modify(|reg| { | ||
| 561 | reg.set_vbaten(true); | ||
| 562 | }); | ||
| 563 | } else if #[cfg(stm32l4)] { | ||
| 564 | pac::ADC123_COMMON.ccr().modify(|reg| { | ||
| 565 | reg.set_ch18sel(true); | ||
| 566 | }); | ||
| 567 | } else { | ||
| 568 | pac::ADC12_COMMON.ccr().modify(|reg| { | ||
| 569 | reg.set_ch18sel(true); | ||
| 570 | }); | ||
| 571 | } | ||
| 572 | } | ||
| 573 | 541 | ||
| 574 | Vbat {} | 542 | VrefInt {} |
| 575 | } | 543 | } |
| 576 | 544 | ||
| 577 | pub fn disable_vbat(&self) { | 545 | pub fn enable_temperature(&self) -> Temperature { |
| 578 | cfg_if! { | 546 | cfg_if! { |
| 579 | if #[cfg(any(adc_h5, adc_h7rs))] { | 547 | if #[cfg(any(adc_g0, adc_u0))] { |
| 580 | pac::ADC12_COMMON.ccr().modify(|reg| { | 548 | T::regs().ccr().modify(|reg| { |
| 581 | reg.set_vbaten(false); | 549 | reg.set_tsen(true); |
| 582 | }); | 550 | }); |
| 583 | } else if #[cfg(stm32l4)] { | 551 | } else if #[cfg(any(adc_h5, adc_h7rs))] { |
| 584 | pac::ADC123_COMMON.ccr().modify(|reg| { | 552 | T::common_regs().ccr().modify(|reg| { |
| 585 | reg.set_ch18sel(false); | 553 | reg.set_tsen(true); |
| 586 | }); | 554 | }); |
| 587 | } else { | 555 | } else { |
| 588 | pac::ADC12_COMMON.ccr().modify(|reg| { | 556 | T::common_regs().ccr().modify(|reg| { |
| 589 | reg.set_ch18sel(false); | 557 | reg.set_ch17sel(true); |
| 590 | }); | 558 | }); |
| 591 | } | 559 | } |
| 592 | } | 560 | } |
| 593 | } | ||
| 594 | |||
| 595 | #[cfg(any(adc_h5, adc_h7rs))] | ||
| 596 | pub fn enable_vddcore(&self) -> VddCore { | ||
| 597 | pac::ADC2.or().modify(|reg| { | ||
| 598 | reg.set_op0(true); | ||
| 599 | }); | ||
| 600 | 561 | ||
| 601 | VddCore {} | 562 | Temperature {} |
| 602 | } | 563 | } |
| 603 | } | ||
| 604 | 564 | ||
| 605 | impl<'d> Adc<'d, peripherals::ADC1> { | 565 | pub fn enable_vbat(&self) -> Vbat { |
| 606 | pub fn enable_vrefint(&self) -> VrefInt { | ||
| 607 | cfg_if! { | 566 | cfg_if! { |
| 608 | if #[cfg(any(adc_h5, adc_h7rs))] { | 567 | if #[cfg(any(adc_g0, adc_u0))] { |
| 609 | pac::ADC12_COMMON.ccr().modify(|reg| { | 568 | T::regs().ccr().modify(|reg| { |
| 610 | reg.set_vrefen(true); | 569 | reg.set_vbaten(true); |
| 611 | }); | ||
| 612 | } else if #[cfg(any(adc_g0, adc_u0))] { | ||
| 613 | pac::ADC1.ccr().modify(|reg| { | ||
| 614 | reg.set_vrefen(true); | ||
| 615 | }); | 570 | }); |
| 616 | } else if #[cfg(stm32l4)] { | 571 | } else if #[cfg(any(adc_h5, adc_h7rs))] { |
| 617 | pac::ADC123_COMMON.ccr().modify(|reg| { | 572 | T::common_regs().ccr().modify(|reg| { |
| 618 | reg.set_vrefen(true); | 573 | reg.set_vbaten(true); |
| 619 | }); | 574 | }); |
| 620 | } else { | 575 | } else { |
| 621 | pac::ADC1_COMMON.ccr().modify(|reg| { | 576 | T::common_regs().ccr().modify(|reg| { |
| 622 | reg.set_vrefen(true); | 577 | reg.set_ch18sel(true); |
| 623 | }); | 578 | }); |
| 624 | } | 579 | } |
| 625 | } | 580 | } |
| 626 | 581 | ||
| 627 | // "Table 24. Embedded internal voltage reference" states that it takes a maximum of 12 us | 582 | Vbat {} |
| 628 | // to stabilize the internal voltage reference. | ||
| 629 | blocking_delay_us(15); | ||
| 630 | |||
| 631 | VrefInt {} | ||
| 632 | } | 583 | } |
| 633 | 584 | ||
| 634 | pub fn enable_temperature(&self) -> Temperature { | 585 | pub fn disable_vbat(&self) { |
| 635 | cfg_if! { | 586 | cfg_if! { |
| 636 | if #[cfg(any(adc_g0, adc_u0))] { | 587 | if #[cfg(any(adc_g0, adc_u0))] { |
| 637 | pac::ADC1.ccr().modify(|reg| { | 588 | T::regs().ccr().modify(|reg| { |
| 638 | reg.set_tsen(true); | 589 | reg.set_vbaten(false); |
| 639 | }); | 590 | }); |
| 640 | |||
| 641 | Temperature {} | ||
| 642 | } else if #[cfg(any(adc_h5, adc_h7rs))] { | 591 | } else if #[cfg(any(adc_h5, adc_h7rs))] { |
| 643 | pac::ADC12_COMMON.ccr().modify(|reg| { | 592 | T::common_regs().ccr().modify(|reg| { |
| 644 | reg.set_tsen(true); | 593 | reg.set_vbaten(false); |
| 645 | }); | ||
| 646 | |||
| 647 | Temperature {} | ||
| 648 | } else if #[cfg(stm32wb)] { | ||
| 649 | todo!(); | ||
| 650 | } else if #[cfg(stm32l4)] { | ||
| 651 | pac::ADC123_COMMON.ccr().modify(|reg| { | ||
| 652 | reg.set_ch17sel(true); | ||
| 653 | }); | 594 | }); |
| 654 | |||
| 655 | Temperature {} | ||
| 656 | } else { | 595 | } else { |
| 657 | pac::ADC12_COMMON.ccr().modify(|reg| { | 596 | T::common_regs().ccr().modify(|reg| { |
| 658 | reg.set_ch17sel(true); | 597 | reg.set_ch18sel(false); |
| 659 | }); | 598 | }); |
| 660 | |||
| 661 | Temperature {} | ||
| 662 | } | 599 | } |
| 663 | } | 600 | } |
| 664 | } | 601 | } |
| 602 | |||
| 603 | /* | ||
| 604 | /// Convert a raw sample from the `Temperature` to deg C | ||
| 605 | pub fn to_degrees_centigrade(sample: u16) -> f32 { | ||
| 606 | (130.0 - 30.0) / (VtempCal130::get().read() as f32 - VtempCal30::get().read() as f32) | ||
| 607 | * (sample as f32 - VtempCal30::get().read() as f32) | ||
| 608 | + 30.0 | ||
| 609 | } | ||
| 610 | */ | ||
| 665 | } | 611 | } |
