Add presence check for OTG_HS peripheral on STM32H7R/S series

2 files changed, 10 insertions, 8 deletions

diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 19cf193d9..28c619c6b 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -55,7 +55,7 @@ fn main() {
     let mut singletons: Vec<String> = Vec::new();
     for p in METADATA.peripherals {
         if let Some(r) = &p.registers {
-            if r.kind == "adccommon" || r.kind == "sai" || r.kind == "ucpd" {
+            if r.kind == "adccommon" || r.kind == "sai" || r.kind == "ucpd" || r.kind == "otg" {
                 // TODO: should we emit this for all peripherals? if so, we will need a list of all
                 // possible peripherals across all chips, so that we can declare the configs
                 // (replacing the hard-coded list of `peri_*` cfgs below)
@@ -111,6 +111,8 @@ fn main() {
         "peri_sai4",
         "peri_ucpd1",
         "peri_ucpd2",
+        "peri_usb_otg_fs",
+        "peri_usb_otg_hs",
     ]);
     cfgs.declare_all(&["mco", "mco1", "mco2"]);
 
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index cd1c10407..55fe8ca9d 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -34,11 +34,10 @@ pub enum VoltageScale {
     Scale2,
     Scale3,
 }
-#[cfg(any(stm32h7rs))]
-pub use crate::pac::{
-    pwr::vals::Vos as VoltageScale,
-    rcc::vals::{Usbphycsel, Usbrefcksel},
-};
+#[cfg(stm32h7rs)]
+pub use crate::pac::pwr::vals::Vos as VoltageScale;
+#[cfg(all(stm32h7rs, peri_usb_otg_hs))]
+pub use crate::pac::rcc::vals::{Usbphycsel, Usbrefcksel};
 
 #[derive(Clone, Copy, Eq, PartialEq)]
 pub enum HseMode {
@@ -560,14 +559,14 @@ pub(crate) unsafe fn init(config: Config) {
 
     let rtc = config.ls.init();
 
-    #[cfg(stm32h7rs)]
+    #[cfg(all(stm32h7rs, peri_usb_otg_hs))]
     let usb_refck = match config.mux.usbphycsel {
         Usbphycsel::HSE => hse,
         Usbphycsel::HSE_DIV_2 => hse.map(|hse_val| hse_val / 2u8),
         Usbphycsel::PLL3_Q => pll3.q,
         _ => None,
     };
-    #[cfg(stm32h7rs)]
+    #[cfg(all(stm32h7rs, peri_usb_otg_hs))]
     let usb_refck_sel = match usb_refck {
         Some(clk_val) => match clk_val {
             Hertz(16_000_000) => Usbrefcksel::MHZ16,
@@ -618,6 +617,7 @@ pub(crate) unsafe fn init(config: Config) {
             w.set_ppre5(config.apb5_pre);
         });
 
+        #[cfg(peri_usb_otg_hs)]
         RCC.ahbperckselr().modify(|w| {
             w.set_usbrefcksel(usb_refck_sel);
         });