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authorThomas Giesel <[email protected]>2025-04-26 19:10:59 +0200
committerThomas Giesel <[email protected]>2025-04-26 19:10:59 +0200
commit8b123b4e0d585e142408980fa1d18fd1f91d738d (patch)
tree42e02a9c94299a0e44e4e06c99aed45702836054
parent572e788b2e878436bde527ad66cf561775cebc66 (diff)
Fix set_ovsr typo, ramp up to latest stm32-data-generated
This is an adaption to https://github.com/embassy-rs/stm32-data/pull/597
-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/src/adc/v4.rs2
2 files changed, 3 insertions, 3 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index a1dc75dba..54badc8f2 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -73,7 +73,7 @@ rand_core = "0.6.3"
73sdio-host = "0.9.0" 73sdio-host = "0.9.0"
74critical-section = "1.1" 74critical-section = "1.1"
75#stm32-metapac = { version = "16" } 75#stm32-metapac = { version = "16" }
76stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9385c0824aff194913a2eab3c957791d0de06771" } 76stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a821bf5dd8d283c1e8de88fc7699235777a07e78" }
77 77
78vcell = "0.1.3" 78vcell = "0.1.3"
79nb = "1.0.0" 79nb = "1.0.0"
@@ -102,7 +102,7 @@ proc-macro2 = "1.0.36"
102quote = "1.0.15" 102quote = "1.0.15"
103 103
104#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]} 104#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]}
105stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9385c0824aff194913a2eab3c957791d0de06771", default-features = false, features = ["metadata"] } 105stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-a821bf5dd8d283c1e8de88fc7699235777a07e78", default-features = false, features = ["metadata"] }
106 106
107[features] 107[features]
108default = ["rt"] 108default = ["rt"]
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs
index 4d2e0f0df..e455b275c 100644
--- a/embassy-stm32/src/adc/v4.rs
+++ b/embassy-stm32/src/adc/v4.rs
@@ -305,7 +305,7 @@ impl<'d, T: Instance> Adc<'d, T> {
305 305
306 T::regs().cfgr2().modify(|reg| { 306 T::regs().cfgr2().modify(|reg| {
307 reg.set_rovse(enable); 307 reg.set_rovse(enable);
308 reg.set_osvr(samples); 308 reg.set_ovsr(samples);
309 reg.set_ovss(right_shift); 309 reg.set_ovss(right_shift);
310 }) 310 })
311 } 311 }