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authorDario Nieuwenhuis <[email protected]>2021-07-29 13:14:18 +0200
committerDario Nieuwenhuis <[email protected]>2021-07-29 13:39:19 +0200
commit8d76c582f56eae6a93a33803ac5ba58ea5c97240 (patch)
treea4d97a5e33fe178b7c936d070754bded0e9eadcb
parentc8a48d726a7cc92ef989a519fdf55ec1f9fffbcd (diff)
Update chiptool
-rw-r--r--stm32-metapac-gen/Cargo.toml4
-rw-r--r--stm32-metapac-gen/src/lib.rs51
2 files changed, 24 insertions, 31 deletions
diff --git a/stm32-metapac-gen/Cargo.toml b/stm32-metapac-gen/Cargo.toml
index 33c43e5b4..b36a0c3f4 100644
--- a/stm32-metapac-gen/Cargo.toml
+++ b/stm32-metapac-gen/Cargo.toml
@@ -6,7 +6,7 @@ edition = "2018"
6 6
7[dependencies] 7[dependencies]
8regex = "1.4.6" 8regex = "1.4.6"
9chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "e0c5ff926ecd86e390bd9bc68b414bfc0e811b0e" } 9chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "31c3c09197d63d29eddbf4c70d6158edac0ac5d3" }
10serde = { version = "1.0.123", features = [ "derive" ]} 10serde = { version = "1.0.123", features = [ "derive" ]}
11serde_yaml = "0.8.15" 11serde_yaml = "0.8.15"
12syn = { version = "1.0", features = ["full","extra-traits"] } 12proc-macro2 = "1.0"
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index ce720c677..83f4dcfb3 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -1,3 +1,5 @@
1use chiptool::generate::CommonModule;
2use proc_macro2::TokenStream;
1use regex::Regex; 3use regex::Regex;
2use serde::Deserialize; 4use serde::Deserialize;
3use std::collections::{HashMap, HashSet}; 5use std::collections::{HashMap, HashSet};
@@ -8,9 +10,10 @@ use std::fs::File;
8use std::io::Write; 10use std::io::Write;
9use std::path::Path; 11use std::path::Path;
10use std::path::PathBuf; 12use std::path::PathBuf;
13use std::str::FromStr;
11 14
12use chiptool::{generate, ir, transform};
13use chiptool::util::ToSanitizedSnakeCase; 15use chiptool::util::ToSanitizedSnakeCase;
16use chiptool::{generate, ir, transform};
14 17
15#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] 18#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
16pub struct Chip { 19pub struct Chip {
@@ -39,7 +42,7 @@ pub struct Package {
39 42
40#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] 43#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
41pub struct Peripheral { 44pub struct Peripheral {
42 pub address: u32, 45 pub address: u64,
43 #[serde(default)] 46 #[serde(default)]
44 pub kind: Option<String>, 47 pub kind: Option<String>,
45 #[serde(default)] 48 #[serde(default)]
@@ -194,7 +197,7 @@ pub struct Options {
194 197
195pub fn gen(options: Options) { 198pub fn gen(options: Options) {
196 let generate_opts = generate::Options { 199 let generate_opts = generate::Options {
197 common_path: syn::parse_str("crate::common").unwrap(), 200 common_module: CommonModule::Builtin,
198 }; 201 };
199 202
200 let out_dir = options.out_dir; 203 let out_dir = options.out_dir;
@@ -292,18 +295,18 @@ pub fn gen(options: Options) {
292 let mut gpio_rcc_table: Vec<Vec<String>> = Vec::new(); 295 let mut gpio_rcc_table: Vec<Vec<String>> = Vec::new();
293 let mut gpio_regs: HashSet<String> = HashSet::new(); 296 let mut gpio_regs: HashSet<String> = HashSet::new();
294 297
295 let gpio_base = core.peripherals.get(&"GPIOA".to_string()).unwrap().address; 298 let gpio_base = core.peripherals.get(&"GPIOA".to_string()).unwrap().address as u32;
296 let gpio_stride = 0x400; 299 let gpio_stride = 0x400;
297 300
298 let number_suffix_re = Regex::new("^(.*?)[0-9]*$").unwrap(); 301 let number_suffix_re = Regex::new("^(.*?)[0-9]*$").unwrap();
299 302
300 if let Some(ref mut reg) = dbgmcu { 303 if let Some(ref mut reg) = dbgmcu {
301 if let Some(ref cr) = reg.fieldsets.get("CR") { 304 if let Some(ref cr) = reg.fieldsets.get("CR") {
302 for field in cr.fields.iter().filter(|e| e.name.contains("DBG")) { 305 for field in cr.fields.iter().filter(|e| e.name.contains("DBG")) {
303 let mut fn_name = String::new(); 306 let mut fn_name = String::new();
304 fn_name.push_str("set_"); 307 fn_name.push_str("set_");
305 fn_name.push_str( &field.name.to_sanitized_snake_case() ); 308 fn_name.push_str(&field.name.to_sanitized_snake_case());
306 dbgmcu_table.push( vec!( "cr".into(), fn_name )); 309 dbgmcu_table.push(vec!["cr".into(), fn_name]);
307 } 310 }
308 } 311 }
309 } 312 }
@@ -399,7 +402,7 @@ pub fn gen(options: Options) {
399 "gpio" => { 402 "gpio" => {
400 let port_letter = name.chars().skip(4).next().unwrap(); 403 let port_letter = name.chars().skip(4).next().unwrap();
401 let port_num = port_letter as u32 - 'A' as u32; 404 let port_num = port_letter as u32 - 'A' as u32;
402 assert_eq!(p.address, gpio_base + gpio_stride * port_num); 405 assert_eq!(p.address as u32, gpio_base + gpio_stride * port_num);
403 406
404 for pin_num in 0..16 { 407 for pin_num in 0..16 {
405 let pin_name = format!("P{}{}", port_letter, pin_num); 408 let pin_name = format!("P{}{}", port_letter, pin_num);
@@ -477,26 +480,17 @@ pub fn gen(options: Options) {
477 480
478 if let Some((reset_reg, reset_field)) = reset_reg_field { 481 if let Some((reset_reg, reset_field)) = reset_reg_field {
479 row.push(reset_reg.to_ascii_lowercase()); 482 row.push(reset_reg.to_ascii_lowercase());
480 row.push(format!( 483 row.push(format!("set_{}", enable_field.to_ascii_lowercase()));
481 "set_{}", 484 row.push(format!("set_{}", reset_field.to_ascii_lowercase()));
482 enable_field.to_ascii_lowercase()
483 ));
484 row.push(format!(
485 "set_{}",
486 reset_field.to_ascii_lowercase()
487 ));
488 } else { 485 } else {
489 row.push(format!( 486 row.push(format!("set_{}", enable_field.to_ascii_lowercase()));
490 "set_{}",
491 enable_field.to_ascii_lowercase()
492 ));
493 } 487 }
494 488
495 if !name.starts_with("GPIO") { 489 if !name.starts_with("GPIO") {
496 peripheral_rcc_table.push(row); 490 peripheral_rcc_table.push(row);
497 } else { 491 } else {
498 gpio_rcc_table.push(row); 492 gpio_rcc_table.push(row);
499 gpio_regs.insert( enable_reg.to_ascii_lowercase() ); 493 gpio_regs.insert(enable_reg.to_ascii_lowercase());
500 } 494 }
501 } 495 }
502 (None, Some(_)) => { 496 (None, Some(_)) => {
@@ -514,7 +508,7 @@ pub fn gen(options: Options) {
514 } 508 }
515 509
516 for reg in gpio_regs { 510 for reg in gpio_regs {
517 gpio_rcc_table.push( vec!( reg ) ); 511 gpio_rcc_table.push(vec![reg]);
518 } 512 }
519 513
520 for (id, channel_info) in &core.dma_channels { 514 for (id, channel_info) in &core.dma_channels {
@@ -659,13 +653,12 @@ pub fn gen(options: Options) {
659 .run(&mut ir) 653 .run(&mut ir)
660 .unwrap(); 654 .unwrap();
661 655
662 transform::map_names(&mut ir, |s, k| match k { 656 transform::map_names(&mut ir, |k, s| match k {
663 transform::NameKind::Block => format!("{}", s), 657 transform::NameKind::Block => *s = format!("{}", s),
664 transform::NameKind::Fieldset => format!("regs::{}", s), 658 transform::NameKind::Fieldset => *s = format!("regs::{}", s),
665 transform::NameKind::Enum => format!("vals::{}", s), 659 transform::NameKind::Enum => *s = format!("vals::{}", s),
666 _ => s.to_string(), 660 _ => {}
667 }) 661 });
668 .unwrap();
669 662
670 transform::sort::Sort {}.run(&mut ir).unwrap(); 663 transform::sort::Sort {}.run(&mut ir).unwrap();
671 transform::Sanitize {}.run(&mut ir).unwrap(); 664 transform::Sanitize {}.run(&mut ir).unwrap();