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authorDario Nieuwenhuis <[email protected]>2023-06-08 16:08:40 +0200
committerDario Nieuwenhuis <[email protected]>2023-06-08 18:00:48 +0200
commit921780e6bfb9bcb2cd087b8aa8b094d792c99fa2 (patch)
treebd21fba9800471b860ca44e05567588dcc1afef7
parent87ad66f2b4a5bfd36dfc8d8aad5492e9e3f915e6 (diff)
Make interrupt module more standard.
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`. - Reexport the PAC interrupt enum in `embassy_xx::interrupt`. This has a few advantages: - The `embassy_xx::interrupt` module is now more "standard". - It works with `cortex-m` functions for manipulating interrupts, for example. - It works with RTIC. - the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs. - When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
-rw-r--r--embassy-cortex-m/src/interrupt.rs213
-rw-r--r--embassy-lora/src/iv.rs12
-rw-r--r--embassy-macros/src/lib.rs13
-rw-r--r--embassy-macros/src/macros/cortex_m_interrupt.rs66
-rw-r--r--embassy-macros/src/macros/cortex_m_interrupt_declare.rs21
-rw-r--r--embassy-macros/src/macros/mod.rs2
-rw-r--r--embassy-nrf/src/buffered_uarte.rs11
-rw-r--r--embassy-nrf/src/chips/nrf52805.rs56
-rw-r--r--embassy-nrf/src/chips/nrf52810.rs62
-rw-r--r--embassy-nrf/src/chips/nrf52811.rs62
-rw-r--r--embassy-nrf/src/chips/nrf52820.rs60
-rw-r--r--embassy-nrf/src/chips/nrf52832.rs82
-rw-r--r--embassy-nrf/src/chips/nrf52833.rs90
-rw-r--r--embassy-nrf/src/chips/nrf52840.rs94
-rw-r--r--embassy-nrf/src/chips/nrf5340_app.rs90
-rw-r--r--embassy-nrf/src/chips/nrf5340_net.rs48
-rw-r--r--embassy-nrf/src/chips/nrf9160.rs70
-rw-r--r--embassy-nrf/src/gpiote.rs14
-rw-r--r--embassy-nrf/src/i2s.rs14
-rw-r--r--embassy-nrf/src/lib.rs31
-rw-r--r--embassy-nrf/src/pdm.rs13
-rw-r--r--embassy-nrf/src/pwm.rs7
-rw-r--r--embassy-nrf/src/qdec.rs12
-rw-r--r--embassy-nrf/src/qspi.rs12
-rw-r--r--embassy-nrf/src/rng.rs10
-rw-r--r--embassy-nrf/src/saadc.rs10
-rw-r--r--embassy-nrf/src/spim.rs16
-rw-r--r--embassy-nrf/src/spis.rs16
-rw-r--r--embassy-nrf/src/temp.rs10
-rw-r--r--embassy-nrf/src/time_driver.rs6
-rw-r--r--embassy-nrf/src/timer.rs5
-rw-r--r--embassy-nrf/src/twim.rs12
-rw-r--r--embassy-nrf/src/twis.rs12
-rw-r--r--embassy-nrf/src/uarte.rs22
-rw-r--r--embassy-nrf/src/usb/mod.rs12
-rw-r--r--embassy-nrf/src/usb/vbus_detect.rs12
-rw-r--r--embassy-rp/src/adc.rs16
-rw-r--r--embassy-rp/src/dma.rs8
-rw-r--r--embassy-rp/src/gpio.rs8
-rw-r--r--embassy-rp/src/i2c.rs13
-rw-r--r--embassy-rp/src/interrupt.rs65
-rw-r--r--embassy-rp/src/lib.rs64
-rw-r--r--embassy-rp/src/multicore.rs4
-rw-r--r--embassy-rp/src/pio.rs14
-rw-r--r--embassy-rp/src/timer.rs10
-rw-r--r--embassy-rp/src/uart/buffered.rs6
-rw-r--r--embassy-rp/src/uart/mod.rs10
-rw-r--r--embassy-rp/src/usb.rs11
-rw-r--r--embassy-stm32/build.rs8
-rw-r--r--embassy-stm32/src/dcmi.rs24
-rw-r--r--embassy-stm32/src/dma/bdma.rs6
-rw-r--r--embassy-stm32/src/dma/dma.rs6
-rw-r--r--embassy-stm32/src/dma/gpdma.rs4
-rw-r--r--embassy-stm32/src/eth/v1/mod.rs10
-rw-r--r--embassy-stm32/src/eth/v2/mod.rs10
-rw-r--r--embassy-stm32/src/exti.rs4
-rw-r--r--embassy-stm32/src/flash/asynch.rs10
-rw-r--r--embassy-stm32/src/i2c/mod.rs6
-rw-r--r--embassy-stm32/src/i2c/v1.rs4
-rw-r--r--embassy-stm32/src/i2c/v2.rs6
-rw-r--r--embassy-stm32/src/lib.rs55
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs16
-rw-r--r--embassy-stm32/src/time_driver.rs2
-rw-r--r--embassy-stm32/src/timer/mod.rs6
-rw-r--r--embassy-stm32/src/tl_mbox/mod.rs18
-rw-r--r--embassy-stm32/src/usart/buffered.rs10
-rw-r--r--embassy-stm32/src/usart/mod.rs18
-rw-r--r--embassy-stm32/src/usb/mod.rs6
-rw-r--r--embassy-stm32/src/usb/usb.rs6
-rw-r--r--embassy-stm32/src/usb_otg/mod.rs10
-rw-r--r--embassy-stm32/src/usb_otg/usb.rs8
-rw-r--r--examples/stm32f7/build.rs3
72 files changed, 849 insertions, 934 deletions
diff --git a/embassy-cortex-m/src/interrupt.rs b/embassy-cortex-m/src/interrupt.rs
index 0e790eaaf..8e45c36c7 100644
--- a/embassy-cortex-m/src/interrupt.rs
+++ b/embassy-cortex-m/src/interrupt.rs
@@ -2,120 +2,207 @@
2use core::mem; 2use core::mem;
3use core::sync::atomic::{compiler_fence, Ordering}; 3use core::sync::atomic::{compiler_fence, Ordering};
4 4
5use cortex_m::interrupt::InterruptNumber;
5use cortex_m::peripheral::NVIC; 6use cortex_m::peripheral::NVIC;
6 7
7/// Do not use. Used for macros and HALs only. Not covered by semver guarantees. 8/// Generate a standard `mod interrupt` for a HAL.
8#[doc(hidden)] 9#[macro_export]
9pub mod _export { 10macro_rules! interrupt_mod {
10 pub use atomic_polyfill as atomic; 11 ($($irqs:ident),* $(,)?) => {
11 pub use embassy_macros::{cortex_m_interrupt as interrupt, cortex_m_interrupt_declare as declare}; 12 pub use cortex_m_rt::interrupt;
12}
13 13
14/// Interrupt handler trait. 14 /// Interrupt definitions.
15/// 15 pub mod interrupt {
16/// Drivers that need to handle interrupts implement this trait. 16 pub use embassy_cortex_m::interrupt::{InterruptExt, Priority};
17/// The user must ensure `on_interrupt()` is called every time the interrupt fires. 17 pub use crate::pac::interrupt::*;
18/// Drivers must use use [`Binding`] to assert at compile time that the user has done so. 18 pub use crate::pac::Interrupt;
19pub trait Handler<I: Interrupt> {
20 /// Interrupt handler function.
21 ///
22 /// Must be called every time the `I` interrupt fires, synchronously from
23 /// the interrupt handler context.
24 ///
25 /// # Safety
26 ///
27 /// This function must ONLY be called from the interrupt handler for `I`.
28 unsafe fn on_interrupt();
29}
30 19
31/// Compile-time assertion that an interrupt has been bound to a handler. 20 /// Type-level interrupt infrastructure.
32/// 21 ///
33/// For the vast majority of cases, you should use the `bind_interrupts!` 22 /// This module contains one *type* per interrupt. This is used for checking at compile time that
34/// macro instead of writing `unsafe impl`s of this trait. 23 /// the interrupts are correctly bound to HAL drivers.
35/// 24 ///
36/// # Safety 25 /// As an end user, you shouldn't need to use this module directly. Use the [`crate::bind_interrupts!`] macro
37/// 26 /// to bind interrupts, and the [`crate::interrupt`] module to manually register interrupt handlers and manipulate
38/// By implementing this trait, you are asserting that you have arranged for `H::on_interrupt()` 27 /// interrupts directly (pending/unpending, enabling/disabling, setting the priority, etc...)
39/// to be called every time the `I` interrupt fires. 28 pub mod typelevel {
40/// 29 use super::InterruptExt;
41/// This allows drivers to check bindings at compile-time. 30
42pub unsafe trait Binding<I: Interrupt, H: Handler<I>> {} 31 mod sealed {
43 32 pub trait Interrupt {}
44#[derive(Clone, Copy)] 33 }
45pub(crate) struct NrWrap(pub(crate) u16); 34
46unsafe impl cortex_m::interrupt::InterruptNumber for NrWrap { 35 /// Type-level interrupt.
47 fn number(self) -> u16 { 36 ///
48 self.0 37 /// This trait is implemented for all typelevel interrupt types in this module.
49 } 38 pub trait Interrupt: sealed::Interrupt {
39
40 /// Interrupt enum variant.
41 ///
42 /// This allows going from typelevel interrupts (one type per interrupt) to
43 /// non-typelevel interrupts (a single `Interrupt` enum type, with one variant per interrupt).
44 const IRQ: super::Interrupt;
45
46 /// Enable the interrupt.
47 #[inline]
48 unsafe fn enable() {
49 Self::IRQ.enable()
50 }
51
52 /// Disable the interrupt.
53 #[inline]
54 fn disable() {
55 Self::IRQ.disable()
56 }
57
58 /// Check if interrupt is enabled.
59 #[inline]
60 fn is_enabled() -> bool {
61 Self::IRQ.is_enabled()
62 }
63
64 /// Check if interrupt is pending.
65 #[inline]
66 fn is_pending() -> bool {
67 Self::IRQ.is_pending()
68 }
69
70 /// Set interrupt pending.
71 #[inline]
72 fn pend() {
73 Self::IRQ.pend()
74 }
75
76 /// Unset interrupt pending.
77 #[inline]
78 fn unpend() {
79 Self::IRQ.unpend()
80 }
81
82 /// Get the priority of the interrupt.
83 #[inline]
84 fn get_priority() -> crate::interrupt::Priority {
85 Self::IRQ.get_priority()
86 }
87
88 /// Set the interrupt priority.
89 #[inline]
90 fn set_priority(prio: crate::interrupt::Priority) {
91 Self::IRQ.set_priority(prio)
92 }
93 }
94
95 $(
96 #[allow(non_camel_case_types)]
97 #[doc=stringify!($irqs)]
98 #[doc=" typelevel interrupt."]
99 pub enum $irqs {}
100 impl sealed::Interrupt for $irqs{}
101 impl Interrupt for $irqs {
102 const IRQ: super::Interrupt = super::Interrupt::$irqs;
103 }
104 )*
105
106 /// Interrupt handler trait.
107 ///
108 /// Drivers that need to handle interrupts implement this trait.
109 /// The user must ensure `on_interrupt()` is called every time the interrupt fires.
110 /// Drivers must use use [`Binding`] to assert at compile time that the user has done so.
111 pub trait Handler<I: Interrupt> {
112 /// Interrupt handler function.
113 ///
114 /// Must be called every time the `I` interrupt fires, synchronously from
115 /// the interrupt handler context.
116 ///
117 /// # Safety
118 ///
119 /// This function must ONLY be called from the interrupt handler for `I`.
120 unsafe fn on_interrupt();
121 }
122
123 /// Compile-time assertion that an interrupt has been bound to a handler.
124 ///
125 /// For the vast majority of cases, you should use the `bind_interrupts!`
126 /// macro instead of writing `unsafe impl`s of this trait.
127 ///
128 /// # Safety
129 ///
130 /// By implementing this trait, you are asserting that you have arranged for `H::on_interrupt()`
131 /// to be called every time the `I` interrupt fires.
132 ///
133 /// This allows drivers to check bindings at compile-time.
134 pub unsafe trait Binding<I: Interrupt, H: Handler<I>> {}
135 }
136 }
137 };
50} 138}
51 139
52/// Represents an interrupt type that can be configured by embassy to handle 140/// Represents an interrupt type that can be configured by embassy to handle
53/// interrupts. 141/// interrupts.
54pub unsafe trait Interrupt { 142pub unsafe trait InterruptExt: InterruptNumber + Copy {
55 /// Return the NVIC interrupt number for this interrupt.
56 fn number() -> u16;
57
58 /// Enable the interrupt. 143 /// Enable the interrupt.
59 #[inline] 144 #[inline]
60 unsafe fn enable() { 145 unsafe fn enable(self) {
61 compiler_fence(Ordering::SeqCst); 146 compiler_fence(Ordering::SeqCst);
62 NVIC::unmask(NrWrap(Self::number())) 147 NVIC::unmask(self)
63 } 148 }
64 149
65 /// Disable the interrupt. 150 /// Disable the interrupt.
66 #[inline] 151 #[inline]
67 fn disable() { 152 fn disable(self) {
68 NVIC::mask(NrWrap(Self::number())); 153 NVIC::mask(self);
69 compiler_fence(Ordering::SeqCst); 154 compiler_fence(Ordering::SeqCst);
70 } 155 }
71 156
72 /// Check if interrupt is being handled. 157 /// Check if interrupt is being handled.
73 #[inline] 158 #[inline]
74 #[cfg(not(armv6m))] 159 #[cfg(not(armv6m))]
75 fn is_active() -> bool { 160 fn is_active(self) -> bool {
76 NVIC::is_active(NrWrap(Self::number())) 161 NVIC::is_active(self)
77 } 162 }
78 163
79 /// Check if interrupt is enabled. 164 /// Check if interrupt is enabled.
80 #[inline] 165 #[inline]
81 fn is_enabled() -> bool { 166 fn is_enabled(self) -> bool {
82 NVIC::is_enabled(NrWrap(Self::number())) 167 NVIC::is_enabled(self)
83 } 168 }
84 169
85 /// Check if interrupt is pending. 170 /// Check if interrupt is pending.
86 #[inline] 171 #[inline]
87 fn is_pending() -> bool { 172 fn is_pending(self) -> bool {
88 NVIC::is_pending(NrWrap(Self::number())) 173 NVIC::is_pending(self)
89 } 174 }
90 175
91 /// Set interrupt pending. 176 /// Set interrupt pending.
92 #[inline] 177 #[inline]
93 fn pend() { 178 fn pend(self) {
94 NVIC::pend(NrWrap(Self::number())) 179 NVIC::pend(self)
95 } 180 }
96 181
97 /// Unset interrupt pending. 182 /// Unset interrupt pending.
98 #[inline] 183 #[inline]
99 fn unpend() { 184 fn unpend(self) {
100 NVIC::unpend(NrWrap(Self::number())) 185 NVIC::unpend(self)
101 } 186 }
102 187
103 /// Get the priority of the interrupt. 188 /// Get the priority of the interrupt.
104 #[inline] 189 #[inline]
105 fn get_priority() -> Priority { 190 fn get_priority(self) -> Priority {
106 Priority::from(NVIC::get_priority(NrWrap(Self::number()))) 191 Priority::from(NVIC::get_priority(self))
107 } 192 }
108 193
109 /// Set the interrupt priority. 194 /// Set the interrupt priority.
110 #[inline] 195 #[inline]
111 fn set_priority(prio: Priority) { 196 fn set_priority(self, prio: Priority) {
112 critical_section::with(|_| unsafe { 197 critical_section::with(|_| unsafe {
113 let mut nvic: cortex_m::peripheral::NVIC = mem::transmute(()); 198 let mut nvic: cortex_m::peripheral::NVIC = mem::transmute(());
114 nvic.set_priority(NrWrap(Self::number()), prio.into()) 199 nvic.set_priority(self, prio.into())
115 }) 200 })
116 } 201 }
117} 202}
118 203
204unsafe impl<T: InterruptNumber + Copy> InterruptExt for T {}
205
119impl From<u8> for Priority { 206impl From<u8> for Priority {
120 fn from(priority: u8) -> Self { 207 fn from(priority: u8) -> Self {
121 unsafe { mem::transmute(priority & PRIO_MASK) } 208 unsafe { mem::transmute(priority & PRIO_MASK) }
diff --git a/embassy-lora/src/iv.rs b/embassy-lora/src/iv.rs
index 8d521040f..2e0b68d1a 100644
--- a/embassy-lora/src/iv.rs
+++ b/embassy-lora/src/iv.rs
@@ -1,7 +1,7 @@
1#[cfg(feature = "stm32wl")] 1#[cfg(feature = "stm32wl")]
2use embassy_stm32::interrupt; 2use embassy_stm32::interrupt;
3#[cfg(feature = "stm32wl")] 3#[cfg(feature = "stm32wl")]
4use embassy_stm32::interrupt::*; 4use embassy_stm32::interrupt::InterruptExt;
5#[cfg(feature = "stm32wl")] 5#[cfg(feature = "stm32wl")]
6use embassy_stm32::pac; 6use embassy_stm32::pac;
7#[cfg(feature = "stm32wl")] 7#[cfg(feature = "stm32wl")]
@@ -20,9 +20,9 @@ use lora_phy::mod_traits::InterfaceVariant;
20pub struct InterruptHandler {} 20pub struct InterruptHandler {}
21 21
22#[cfg(feature = "stm32wl")] 22#[cfg(feature = "stm32wl")]
23impl interrupt::Handler<interrupt::SUBGHZ_RADIO> for InterruptHandler { 23impl interrupt::typelevel::Handler<interrupt::typelevel::SUBGHZ_RADIO> for InterruptHandler {
24 unsafe fn on_interrupt() { 24 unsafe fn on_interrupt() {
25 interrupt::SUBGHZ_RADIO::disable(); 25 interrupt::SUBGHZ_RADIO.disable();
26 IRQ_SIGNAL.signal(()); 26 IRQ_SIGNAL.signal(());
27 } 27 }
28} 28}
@@ -45,11 +45,11 @@ where
45{ 45{
46 /// Create an InterfaceVariant instance for an stm32wl/sx1262 combination 46 /// Create an InterfaceVariant instance for an stm32wl/sx1262 combination
47 pub fn new( 47 pub fn new(
48 _irq: impl interrupt::Binding<interrupt::SUBGHZ_RADIO, InterruptHandler>, 48 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::SUBGHZ_RADIO, InterruptHandler>,
49 rf_switch_rx: Option<CTRL>, 49 rf_switch_rx: Option<CTRL>,
50 rf_switch_tx: Option<CTRL>, 50 rf_switch_tx: Option<CTRL>,
51 ) -> Result<Self, RadioError> { 51 ) -> Result<Self, RadioError> {
52 interrupt::SUBGHZ_RADIO::disable(); 52 interrupt::SUBGHZ_RADIO.disable();
53 Ok(Self { 53 Ok(Self {
54 board_type: BoardType::Stm32wlSx1262, // updated when associated with a specific LoRa board 54 board_type: BoardType::Stm32wlSx1262, // updated when associated with a specific LoRa board
55 rf_switch_rx, 55 rf_switch_rx,
@@ -95,7 +95,7 @@ where
95 } 95 }
96 96
97 async fn await_irq(&mut self) -> Result<(), RadioError> { 97 async fn await_irq(&mut self) -> Result<(), RadioError> {
98 unsafe { interrupt::SUBGHZ_RADIO::enable() }; 98 unsafe { interrupt::SUBGHZ_RADIO.enable() };
99 IRQ_SIGNAL.wait().await; 99 IRQ_SIGNAL.wait().await;
100 Ok(()) 100 Ok(())
101 } 101 }
diff --git a/embassy-macros/src/lib.rs b/embassy-macros/src/lib.rs
index d7ca1f69c..ba4f13b77 100644
--- a/embassy-macros/src/lib.rs
+++ b/embassy-macros/src/lib.rs
@@ -156,16 +156,3 @@ pub fn main_wasm(args: TokenStream, item: TokenStream) -> TokenStream {
156 let f = syn::parse_macro_input!(item as syn::ItemFn); 156 let f = syn::parse_macro_input!(item as syn::ItemFn);
157 main::run(args, f, main::wasm()).unwrap_or_else(|x| x).into() 157 main::run(args, f, main::wasm()).unwrap_or_else(|x| x).into()
158} 158}
159
160#[proc_macro_attribute]
161pub fn cortex_m_interrupt(args: TokenStream, item: TokenStream) -> TokenStream {
162 let args = syn::parse_macro_input!(args as syn::AttributeArgs);
163 let f = syn::parse_macro_input!(item as syn::ItemFn);
164 cortex_m_interrupt::run(args, f).unwrap_or_else(|x| x).into()
165}
166
167#[proc_macro]
168pub fn cortex_m_interrupt_declare(item: TokenStream) -> TokenStream {
169 let name = syn::parse_macro_input!(item as syn::Ident);
170 cortex_m_interrupt_declare::run(name).unwrap_or_else(|x| x).into()
171}
diff --git a/embassy-macros/src/macros/cortex_m_interrupt.rs b/embassy-macros/src/macros/cortex_m_interrupt.rs
deleted file mode 100644
index 13af8ca07..000000000
--- a/embassy-macros/src/macros/cortex_m_interrupt.rs
+++ /dev/null
@@ -1,66 +0,0 @@
1use std::iter;
2
3use darling::FromMeta;
4use proc_macro2::TokenStream;
5use quote::quote;
6use syn::{ReturnType, Type, Visibility};
7
8use crate::util::ctxt::Ctxt;
9
10#[derive(Debug, FromMeta)]
11struct Args {}
12
13pub fn run(args: syn::AttributeArgs, mut f: syn::ItemFn) -> Result<TokenStream, TokenStream> {
14 let _args = Args::from_list(&args).map_err(|e| e.write_errors())?;
15
16 let ident = f.sig.ident.clone();
17 let ident_s = ident.to_string();
18
19 // XXX should we blacklist other attributes?
20
21 let valid_signature = f.sig.constness.is_none()
22 && f.vis == Visibility::Inherited
23 && f.sig.abi.is_none()
24 && f.sig.inputs.is_empty()
25 && f.sig.generics.params.is_empty()
26 && f.sig.generics.where_clause.is_none()
27 && f.sig.variadic.is_none()
28 && match f.sig.output {
29 ReturnType::Default => true,
30 ReturnType::Type(_, ref ty) => match **ty {
31 Type::Tuple(ref tuple) => tuple.elems.is_empty(),
32 Type::Never(..) => true,
33 _ => false,
34 },
35 };
36
37 let ctxt = Ctxt::new();
38
39 if !valid_signature {
40 ctxt.error_spanned_by(
41 &f.sig,
42 "`#[interrupt]` handlers must have signature `[unsafe] fn() [-> !]`",
43 );
44 }
45
46 ctxt.check()?;
47
48 f.block.stmts = iter::once(
49 syn::parse2(quote! {{
50 // Check that this interrupt actually exists
51 let __irq_exists_check: interrupt::#ident;
52 }})
53 .unwrap(),
54 )
55 .chain(f.block.stmts)
56 .collect();
57
58 let result = quote!(
59 #[doc(hidden)]
60 #[export_name = #ident_s]
61 #[allow(non_snake_case)]
62 #f
63 );
64
65 Ok(result)
66}
diff --git a/embassy-macros/src/macros/cortex_m_interrupt_declare.rs b/embassy-macros/src/macros/cortex_m_interrupt_declare.rs
deleted file mode 100644
index b317482f5..000000000
--- a/embassy-macros/src/macros/cortex_m_interrupt_declare.rs
+++ /dev/null
@@ -1,21 +0,0 @@
1use proc_macro2::TokenStream;
2use quote::{format_ident, quote};
3
4pub fn run(name: syn::Ident) -> Result<TokenStream, TokenStream> {
5 let name = format_ident!("{}", name);
6 let doc = format!("{} interrupt.", name);
7
8 let result = quote! {
9 #[doc = #doc]
10 #[allow(non_camel_case_types)]
11 pub enum #name{}
12 unsafe impl ::embassy_cortex_m::interrupt::Interrupt for #name {
13 fn number() -> u16 {
14 use cortex_m::interrupt::InterruptNumber;
15 let irq = InterruptEnum::#name;
16 irq.number() as u16
17 }
18 }
19 };
20 Ok(result)
21}
diff --git a/embassy-macros/src/macros/mod.rs b/embassy-macros/src/macros/mod.rs
index a5e7a50e6..572094ca6 100644
--- a/embassy-macros/src/macros/mod.rs
+++ b/embassy-macros/src/macros/mod.rs
@@ -1,4 +1,2 @@
1pub mod cortex_m_interrupt;
2pub mod cortex_m_interrupt_declare;
3pub mod main; 1pub mod main;
4pub mod task; 2pub mod task;
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs
index b4fe2d874..9bc1c1e7a 100644
--- a/embassy-nrf/src/buffered_uarte.rs
+++ b/embassy-nrf/src/buffered_uarte.rs
@@ -15,7 +15,6 @@ use core::slice;
15use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering}; 15use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering};
16use core::task::Poll; 16use core::task::Poll;
17 17
18use embassy_cortex_m::interrupt::Interrupt;
19use embassy_hal_common::atomic_ring_buffer::RingBuffer; 18use embassy_hal_common::atomic_ring_buffer::RingBuffer;
20use embassy_hal_common::{into_ref, PeripheralRef}; 19use embassy_hal_common::{into_ref, PeripheralRef};
21use embassy_sync::waitqueue::AtomicWaker; 20use embassy_sync::waitqueue::AtomicWaker;
@@ -24,13 +23,13 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari
24 23
25use crate::gpio::sealed::Pin; 24use crate::gpio::sealed::Pin;
26use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; 25use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits};
27use crate::interrupt::{self}; 26use crate::interrupt::typelevel::Interrupt;
28use crate::ppi::{ 27use crate::ppi::{
29 self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task, 28 self, AnyConfigurableChannel, AnyGroup, Channel, ConfigurableChannel, Event, Group, Ppi, PpiGroup, Task,
30}; 29};
31use crate::timer::{Instance as TimerInstance, Timer}; 30use crate::timer::{Instance as TimerInstance, Timer};
32use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance}; 31use crate::uarte::{apply_workaround_for_enable_anomaly, Config, Instance as UarteInstance};
33use crate::{pac, Peripheral}; 32use crate::{interrupt, pac, Peripheral};
34 33
35mod sealed { 34mod sealed {
36 use super::*; 35 use super::*;
@@ -77,7 +76,7 @@ pub struct InterruptHandler<U: UarteInstance> {
77 _phantom: PhantomData<U>, 76 _phantom: PhantomData<U>,
78} 77}
79 78
80impl<U: UarteInstance> interrupt::Handler<U::Interrupt> for InterruptHandler<U> { 79impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for InterruptHandler<U> {
81 unsafe fn on_interrupt() { 80 unsafe fn on_interrupt() {
82 //trace!("irq: start"); 81 //trace!("irq: start");
83 let r = U::regs(); 82 let r = U::regs();
@@ -202,7 +201,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
202 ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, 201 ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
203 ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, 202 ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
204 ppi_group: impl Peripheral<P = impl Group> + 'd, 203 ppi_group: impl Peripheral<P = impl Group> + 'd,
205 _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, 204 _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
206 rxd: impl Peripheral<P = impl GpioPin> + 'd, 205 rxd: impl Peripheral<P = impl GpioPin> + 'd,
207 txd: impl Peripheral<P = impl GpioPin> + 'd, 206 txd: impl Peripheral<P = impl GpioPin> + 'd,
208 config: Config, 207 config: Config,
@@ -237,7 +236,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
237 ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd, 236 ppi_ch1: impl Peripheral<P = impl ConfigurableChannel> + 'd,
238 ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd, 237 ppi_ch2: impl Peripheral<P = impl ConfigurableChannel> + 'd,
239 ppi_group: impl Peripheral<P = impl Group> + 'd, 238 ppi_group: impl Peripheral<P = impl Group> + 'd,
240 _irq: impl interrupt::Binding<U::Interrupt, InterruptHandler<U>> + 'd, 239 _irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
241 rxd: impl Peripheral<P = impl GpioPin> + 'd, 240 rxd: impl Peripheral<P = impl GpioPin> + 'd,
242 txd: impl Peripheral<P = impl GpioPin> + 'd, 241 txd: impl Peripheral<P = impl GpioPin> + 'd,
243 cts: impl Peripheral<P = impl GpioPin> + 'd, 242 cts: impl Peripheral<P = impl GpioPin> + 'd,
diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs
index e406c081b..8fbd760dc 100644
--- a/embassy-nrf/src/chips/nrf52805.rs
+++ b/embassy-nrf/src/chips/nrf52805.rs
@@ -208,33 +208,29 @@ impl_ppi_channel!(PPI_CH31, 31 => static);
208impl_saadc_input!(P0_04, ANALOG_INPUT2); 208impl_saadc_input!(P0_04, ANALOG_INPUT2);
209impl_saadc_input!(P0_05, ANALOG_INPUT3); 209impl_saadc_input!(P0_05, ANALOG_INPUT3);
210 210
211pub mod irqs { 211embassy_cortex_m::interrupt_mod!(
212 use embassy_cortex_m::interrupt::_export::declare; 212 POWER_CLOCK,
213 213 RADIO,
214 use crate::pac::Interrupt as InterruptEnum; 214 UARTE0_UART0,
215 215 TWIM0_TWIS0_TWI0,
216 declare!(POWER_CLOCK); 216 SPIM0_SPIS0_SPI0,
217 declare!(RADIO); 217 GPIOTE,
218 declare!(UARTE0_UART0); 218 SAADC,
219 declare!(TWIM0_TWIS0_TWI0); 219 TIMER0,
220 declare!(SPIM0_SPIS0_SPI0); 220 TIMER1,
221 declare!(GPIOTE); 221 TIMER2,
222 declare!(SAADC); 222 RTC0,
223 declare!(TIMER0); 223 TEMP,
224 declare!(TIMER1); 224 RNG,
225 declare!(TIMER2); 225 ECB,
226 declare!(RTC0); 226 CCM_AAR,
227 declare!(TEMP); 227 WDT,
228 declare!(RNG); 228 RTC1,
229 declare!(ECB); 229 QDEC,
230 declare!(CCM_AAR); 230 SWI0_EGU0,
231 declare!(WDT); 231 SWI1_EGU1,
232 declare!(RTC1); 232 SWI2,
233 declare!(QDEC); 233 SWI3,
234 declare!(SWI0_EGU0); 234 SWI4,
235 declare!(SWI1_EGU1); 235 SWI5,
236 declare!(SWI2); 236);
237 declare!(SWI3);
238 declare!(SWI4);
239 declare!(SWI5);
240}
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs
index 153795e54..bbf8f7ccf 100644
--- a/embassy-nrf/src/chips/nrf52810.rs
+++ b/embassy-nrf/src/chips/nrf52810.rs
@@ -234,36 +234,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5);
234impl_saadc_input!(P0_30, ANALOG_INPUT6); 234impl_saadc_input!(P0_30, ANALOG_INPUT6);
235impl_saadc_input!(P0_31, ANALOG_INPUT7); 235impl_saadc_input!(P0_31, ANALOG_INPUT7);
236 236
237pub mod irqs { 237embassy_cortex_m::interrupt_mod!(
238 use embassy_cortex_m::interrupt::_export::declare; 238 POWER_CLOCK,
239 239 RADIO,
240 use crate::pac::Interrupt as InterruptEnum; 240 UARTE0_UART0,
241 241 TWIM0_TWIS0_TWI0,
242 declare!(POWER_CLOCK); 242 SPIM0_SPIS0_SPI0,
243 declare!(RADIO); 243 GPIOTE,
244 declare!(UARTE0_UART0); 244 SAADC,
245 declare!(TWIM0_TWIS0_TWI0); 245 TIMER0,
246 declare!(SPIM0_SPIS0_SPI0); 246 TIMER1,
247 declare!(GPIOTE); 247 TIMER2,
248 declare!(SAADC); 248 RTC0,
249 declare!(TIMER0); 249 TEMP,
250 declare!(TIMER1); 250 RNG,
251 declare!(TIMER2); 251 ECB,
252 declare!(RTC0); 252 CCM_AAR,
253 declare!(TEMP); 253 WDT,
254 declare!(RNG); 254 RTC1,
255 declare!(ECB); 255 QDEC,
256 declare!(CCM_AAR); 256 COMP,
257 declare!(WDT); 257 SWI0_EGU0,
258 declare!(RTC1); 258 SWI1_EGU1,
259 declare!(QDEC); 259 SWI2,
260 declare!(COMP); 260 SWI3,
261 declare!(SWI0_EGU0); 261 SWI4,
262 declare!(SWI1_EGU1); 262 SWI5,
263 declare!(SWI2); 263 PWM0,
264 declare!(SWI3); 264 PDM,
265 declare!(SWI4); 265);
266 declare!(SWI5);
267 declare!(PWM0);
268 declare!(PDM);
269}
diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs
index a7a7cf58c..31a8dd6af 100644
--- a/embassy-nrf/src/chips/nrf52811.rs
+++ b/embassy-nrf/src/chips/nrf52811.rs
@@ -236,36 +236,32 @@ impl_saadc_input!(P0_29, ANALOG_INPUT5);
236impl_saadc_input!(P0_30, ANALOG_INPUT6); 236impl_saadc_input!(P0_30, ANALOG_INPUT6);
237impl_saadc_input!(P0_31, ANALOG_INPUT7); 237impl_saadc_input!(P0_31, ANALOG_INPUT7);
238 238
239pub mod irqs { 239embassy_cortex_m::interrupt_mod!(
240 use embassy_cortex_m::interrupt::_export::declare; 240 POWER_CLOCK,
241 241 RADIO,
242 use crate::pac::Interrupt as InterruptEnum; 242 UARTE0_UART0,
243 243 TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0,
244 declare!(POWER_CLOCK); 244 SPIM1_SPIS1_SPI1,
245 declare!(RADIO); 245 GPIOTE,
246 declare!(UARTE0_UART0); 246 SAADC,
247 declare!(TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0); 247 TIMER0,
248 declare!(SPIM1_SPIS1_SPI1); 248 TIMER1,
249 declare!(GPIOTE); 249 TIMER2,
250 declare!(SAADC); 250 RTC0,
251 declare!(TIMER0); 251 TEMP,
252 declare!(TIMER1); 252 RNG,
253 declare!(TIMER2); 253 ECB,
254 declare!(RTC0); 254 CCM_AAR,
255 declare!(TEMP); 255 WDT,
256 declare!(RNG); 256 RTC1,
257 declare!(ECB); 257 QDEC,
258 declare!(CCM_AAR); 258 COMP,
259 declare!(WDT); 259 SWI0_EGU0,
260 declare!(RTC1); 260 SWI1_EGU1,
261 declare!(QDEC); 261 SWI2,
262 declare!(COMP); 262 SWI3,
263 declare!(SWI0_EGU0); 263 SWI4,
264 declare!(SWI1_EGU1); 264 SWI5,
265 declare!(SWI2); 265 PWM0,
266 declare!(SWI3); 266 PDM,
267 declare!(SWI4); 267);
268 declare!(SWI5);
269 declare!(PWM0);
270 declare!(PDM);
271}
diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs
index 14a1b8cc9..6a6f4fcf2 100644
--- a/embassy-nrf/src/chips/nrf52820.rs
+++ b/embassy-nrf/src/chips/nrf52820.rs
@@ -224,35 +224,31 @@ impl_ppi_channel!(PPI_CH29, 29 => static);
224impl_ppi_channel!(PPI_CH30, 30 => static); 224impl_ppi_channel!(PPI_CH30, 30 => static);
225impl_ppi_channel!(PPI_CH31, 31 => static); 225impl_ppi_channel!(PPI_CH31, 31 => static);
226 226
227pub mod irqs { 227embassy_cortex_m::interrupt_mod!(
228 use embassy_cortex_m::interrupt::_export::declare; 228 POWER_CLOCK,
229 229 RADIO,
230 use crate::pac::Interrupt as InterruptEnum; 230 UARTE0_UART0,
231 231 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0,
232 declare!(POWER_CLOCK); 232 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1,
233 declare!(RADIO); 233 GPIOTE,
234 declare!(UARTE0_UART0); 234 TIMER0,
235 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); 235 TIMER1,
236 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); 236 TIMER2,
237 declare!(GPIOTE); 237 RTC0,
238 declare!(TIMER0); 238 TEMP,
239 declare!(TIMER1); 239 RNG,
240 declare!(TIMER2); 240 ECB,
241 declare!(RTC0); 241 CCM_AAR,
242 declare!(TEMP); 242 WDT,
243 declare!(RNG); 243 RTC1,
244 declare!(ECB); 244 QDEC,
245 declare!(CCM_AAR); 245 COMP,
246 declare!(WDT); 246 SWI0_EGU0,
247 declare!(RTC1); 247 SWI1_EGU1,
248 declare!(QDEC); 248 SWI2_EGU2,
249 declare!(COMP); 249 SWI3_EGU3,
250 declare!(SWI0_EGU0); 250 SWI4_EGU4,
251 declare!(SWI1_EGU1); 251 SWI5_EGU5,
252 declare!(SWI2_EGU2); 252 TIMER3,
253 declare!(SWI3_EGU3); 253 USBD,
254 declare!(SWI4_EGU4); 254);
255 declare!(SWI5_EGU5);
256 declare!(TIMER3);
257 declare!(USBD);
258}
diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs
index 83ecd0deb..e43b3d5b2 100644
--- a/embassy-nrf/src/chips/nrf52832.rs
+++ b/embassy-nrf/src/chips/nrf52832.rs
@@ -263,46 +263,42 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7);
263 263
264impl_i2s!(I2S, I2S, I2S); 264impl_i2s!(I2S, I2S, I2S);
265 265
266pub mod irqs { 266embassy_cortex_m::interrupt_mod!(
267 use embassy_cortex_m::interrupt::_export::declare; 267 POWER_CLOCK,
268 268 RADIO,
269 use crate::pac::Interrupt as InterruptEnum; 269 UARTE0_UART0,
270 270 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0,
271 declare!(POWER_CLOCK); 271 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1,
272 declare!(RADIO); 272 NFCT,
273 declare!(UARTE0_UART0); 273 GPIOTE,
274 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); 274 SAADC,
275 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); 275 TIMER0,
276 declare!(NFCT); 276 TIMER1,
277 declare!(GPIOTE); 277 TIMER2,
278 declare!(SAADC); 278 RTC0,
279 declare!(TIMER0); 279 TEMP,
280 declare!(TIMER1); 280 RNG,
281 declare!(TIMER2); 281 ECB,
282 declare!(RTC0); 282 CCM_AAR,
283 declare!(TEMP); 283 WDT,
284 declare!(RNG); 284 RTC1,
285 declare!(ECB); 285 QDEC,
286 declare!(CCM_AAR); 286 COMP_LPCOMP,
287 declare!(WDT); 287 SWI0_EGU0,
288 declare!(RTC1); 288 SWI1_EGU1,
289 declare!(QDEC); 289 SWI2_EGU2,
290 declare!(COMP_LPCOMP); 290 SWI3_EGU3,
291 declare!(SWI0_EGU0); 291 SWI4_EGU4,
292 declare!(SWI1_EGU1); 292 SWI5_EGU5,
293 declare!(SWI2_EGU2); 293 TIMER3,
294 declare!(SWI3_EGU3); 294 TIMER4,
295 declare!(SWI4_EGU4); 295 PWM0,
296 declare!(SWI5_EGU5); 296 PDM,
297 declare!(TIMER3); 297 MWU,
298 declare!(TIMER4); 298 PWM1,
299 declare!(PWM0); 299 PWM2,
300 declare!(PDM); 300 SPIM2_SPIS2_SPI2,
301 declare!(MWU); 301 RTC2,
302 declare!(PWM1); 302 FPU,
303 declare!(PWM2); 303 I2S,
304 declare!(SPIM2_SPIS2_SPI2); 304);
305 declare!(RTC2);
306 declare!(FPU);
307 declare!(I2S);
308}
diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs
index 5e5db04de..d95e3497c 100644
--- a/embassy-nrf/src/chips/nrf52833.rs
+++ b/embassy-nrf/src/chips/nrf52833.rs
@@ -306,50 +306,46 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7);
306 306
307impl_i2s!(I2S, I2S, I2S); 307impl_i2s!(I2S, I2S, I2S);
308 308
309pub mod irqs { 309embassy_cortex_m::interrupt_mod!(
310 use embassy_cortex_m::interrupt::_export::declare; 310 POWER_CLOCK,
311 311 RADIO,
312 use crate::pac::Interrupt as InterruptEnum; 312 UARTE0_UART0,
313 313 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0,
314 declare!(POWER_CLOCK); 314 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1,
315 declare!(RADIO); 315 NFCT,
316 declare!(UARTE0_UART0); 316 GPIOTE,
317 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); 317 SAADC,
318 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); 318 TIMER0,
319 declare!(NFCT); 319 TIMER1,
320 declare!(GPIOTE); 320 TIMER2,
321 declare!(SAADC); 321 RTC0,
322 declare!(TIMER0); 322 TEMP,
323 declare!(TIMER1); 323 RNG,
324 declare!(TIMER2); 324 ECB,
325 declare!(RTC0); 325 CCM_AAR,
326 declare!(TEMP); 326 WDT,
327 declare!(RNG); 327 RTC1,
328 declare!(ECB); 328 QDEC,
329 declare!(CCM_AAR); 329 COMP_LPCOMP,
330 declare!(WDT); 330 SWI0_EGU0,
331 declare!(RTC1); 331 SWI1_EGU1,
332 declare!(QDEC); 332 SWI2_EGU2,
333 declare!(COMP_LPCOMP); 333 SWI3_EGU3,
334 declare!(SWI0_EGU0); 334 SWI4_EGU4,
335 declare!(SWI1_EGU1); 335 SWI5_EGU5,
336 declare!(SWI2_EGU2); 336 TIMER3,
337 declare!(SWI3_EGU3); 337 TIMER4,
338 declare!(SWI4_EGU4); 338 PWM0,
339 declare!(SWI5_EGU5); 339 PDM,
340 declare!(TIMER3); 340 MWU,
341 declare!(TIMER4); 341 PWM1,
342 declare!(PWM0); 342 PWM2,
343 declare!(PDM); 343 SPIM2_SPIS2_SPI2,
344 declare!(MWU); 344 RTC2,
345 declare!(PWM1); 345 FPU,
346 declare!(PWM2); 346 USBD,
347 declare!(SPIM2_SPIS2_SPI2); 347 UARTE1,
348 declare!(RTC2); 348 PWM3,
349 declare!(FPU); 349 SPIM3,
350 declare!(USBD); 350 I2S,
351 declare!(UARTE1); 351);
352 declare!(PWM3);
353 declare!(SPIM3);
354 declare!(I2S);
355}
diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs
index f6d33f85c..0094b1220 100644
--- a/embassy-nrf/src/chips/nrf52840.rs
+++ b/embassy-nrf/src/chips/nrf52840.rs
@@ -311,52 +311,48 @@ impl_saadc_input!(P0_31, ANALOG_INPUT7);
311 311
312impl_i2s!(I2S, I2S, I2S); 312impl_i2s!(I2S, I2S, I2S);
313 313
314pub mod irqs { 314embassy_cortex_m::interrupt_mod!(
315 use embassy_cortex_m::interrupt::_export::declare; 315 POWER_CLOCK,
316 316 RADIO,
317 use crate::pac::Interrupt as InterruptEnum; 317 UARTE0_UART0,
318 318 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0,
319 declare!(POWER_CLOCK); 319 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1,
320 declare!(RADIO); 320 NFCT,
321 declare!(UARTE0_UART0); 321 GPIOTE,
322 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0); 322 SAADC,
323 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1); 323 TIMER0,
324 declare!(NFCT); 324 TIMER1,
325 declare!(GPIOTE); 325 TIMER2,
326 declare!(SAADC); 326 RTC0,
327 declare!(TIMER0); 327 TEMP,
328 declare!(TIMER1); 328 RNG,
329 declare!(TIMER2); 329 ECB,
330 declare!(RTC0); 330 CCM_AAR,
331 declare!(TEMP); 331 WDT,
332 declare!(RNG); 332 RTC1,
333 declare!(ECB); 333 QDEC,
334 declare!(CCM_AAR); 334 COMP_LPCOMP,
335 declare!(WDT); 335 SWI0_EGU0,
336 declare!(RTC1); 336 SWI1_EGU1,
337 declare!(QDEC); 337 SWI2_EGU2,
338 declare!(COMP_LPCOMP); 338 SWI3_EGU3,
339 declare!(SWI0_EGU0); 339 SWI4_EGU4,
340 declare!(SWI1_EGU1); 340 SWI5_EGU5,
341 declare!(SWI2_EGU2); 341 TIMER3,
342 declare!(SWI3_EGU3); 342 TIMER4,
343 declare!(SWI4_EGU4); 343 PWM0,
344 declare!(SWI5_EGU5); 344 PDM,
345 declare!(TIMER3); 345 MWU,
346 declare!(TIMER4); 346 PWM1,
347 declare!(PWM0); 347 PWM2,
348 declare!(PDM); 348 SPIM2_SPIS2_SPI2,
349 declare!(MWU); 349 RTC2,
350 declare!(PWM1); 350 FPU,
351 declare!(PWM2); 351 USBD,
352 declare!(SPIM2_SPIS2_SPI2); 352 UARTE1,
353 declare!(RTC2); 353 QSPI,
354 declare!(FPU); 354 CRYPTOCELL,
355 declare!(USBD); 355 PWM3,
356 declare!(UARTE1); 356 SPIM3,
357 declare!(QSPI); 357 I2S,
358 declare!(CRYPTOCELL); 358);
359 declare!(PWM3);
360 declare!(SPIM3);
361 declare!(I2S);
362}
diff --git a/embassy-nrf/src/chips/nrf5340_app.rs b/embassy-nrf/src/chips/nrf5340_app.rs
index 34f96800f..c10520051 100644
--- a/embassy-nrf/src/chips/nrf5340_app.rs
+++ b/embassy-nrf/src/chips/nrf5340_app.rs
@@ -504,50 +504,46 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5);
504impl_saadc_input!(P0_19, ANALOG_INPUT6); 504impl_saadc_input!(P0_19, ANALOG_INPUT6);
505impl_saadc_input!(P0_20, ANALOG_INPUT7); 505impl_saadc_input!(P0_20, ANALOG_INPUT7);
506 506
507pub mod irqs { 507embassy_cortex_m::interrupt_mod!(
508 use embassy_cortex_m::interrupt::_export::declare; 508 FPU,
509 509 CACHE,
510 use crate::pac::Interrupt as InterruptEnum; 510 SPU,
511 511 CLOCK_POWER,
512 declare!(FPU); 512 SERIAL0,
513 declare!(CACHE); 513 SERIAL1,
514 declare!(SPU); 514 SPIM4,
515 declare!(CLOCK_POWER); 515 SERIAL2,
516 declare!(SERIAL0); 516 SERIAL3,
517 declare!(SERIAL1); 517 GPIOTE0,
518 declare!(SPIM4); 518 SAADC,
519 declare!(SERIAL2); 519 TIMER0,
520 declare!(SERIAL3); 520 TIMER1,
521 declare!(GPIOTE0); 521 TIMER2,
522 declare!(SAADC); 522 RTC0,
523 declare!(TIMER0); 523 RTC1,
524 declare!(TIMER1); 524 WDT0,
525 declare!(TIMER2); 525 WDT1,
526 declare!(RTC0); 526 COMP_LPCOMP,
527 declare!(RTC1); 527 EGU0,
528 declare!(WDT0); 528 EGU1,
529 declare!(WDT1); 529 EGU2,
530 declare!(COMP_LPCOMP); 530 EGU3,
531 declare!(EGU0); 531 EGU4,
532 declare!(EGU1); 532 EGU5,
533 declare!(EGU2); 533 PWM0,
534 declare!(EGU3); 534 PWM1,
535 declare!(EGU4); 535 PWM2,
536 declare!(EGU5); 536 PWM3,
537 declare!(PWM0); 537 PDM0,
538 declare!(PWM1); 538 I2S0,
539 declare!(PWM2); 539 IPC,
540 declare!(PWM3); 540 QSPI,
541 declare!(PDM0); 541 NFCT,
542 declare!(I2S0); 542 GPIOTE1,
543 declare!(IPC); 543 QDEC0,
544 declare!(QSPI); 544 QDEC1,
545 declare!(NFCT); 545 USBD,
546 declare!(GPIOTE1); 546 USBREGULATOR,
547 declare!(QDEC0); 547 KMU,
548 declare!(QDEC1); 548 CRYPTOCELL,
549 declare!(USBD); 549);
550 declare!(USBREGULATOR);
551 declare!(KMU);
552 declare!(CRYPTOCELL);
553}
diff --git a/embassy-nrf/src/chips/nrf5340_net.rs b/embassy-nrf/src/chips/nrf5340_net.rs
index 1e59528cb..a6fb1d4cc 100644
--- a/embassy-nrf/src/chips/nrf5340_net.rs
+++ b/embassy-nrf/src/chips/nrf5340_net.rs
@@ -340,29 +340,25 @@ impl_ppi_channel!(PPI_CH29, 29 => configurable);
340impl_ppi_channel!(PPI_CH30, 30 => configurable); 340impl_ppi_channel!(PPI_CH30, 30 => configurable);
341impl_ppi_channel!(PPI_CH31, 31 => configurable); 341impl_ppi_channel!(PPI_CH31, 31 => configurable);
342 342
343pub mod irqs { 343embassy_cortex_m::interrupt_mod!(
344 use embassy_cortex_m::interrupt::_export::declare; 344 CLOCK_POWER,
345 345 RADIO,
346 use crate::pac::Interrupt as InterruptEnum; 346 RNG,
347 347 GPIOTE,
348 declare!(CLOCK_POWER); 348 WDT,
349 declare!(RADIO); 349 TIMER0,
350 declare!(RNG); 350 ECB,
351 declare!(GPIOTE); 351 AAR_CCM,
352 declare!(WDT); 352 TEMP,
353 declare!(TIMER0); 353 RTC0,
354 declare!(ECB); 354 IPC,
355 declare!(AAR_CCM); 355 SERIAL0,
356 declare!(TEMP); 356 EGU0,
357 declare!(RTC0); 357 RTC1,
358 declare!(IPC); 358 TIMER1,
359 declare!(SERIAL0); 359 TIMER2,
360 declare!(EGU0); 360 SWI0,
361 declare!(RTC1); 361 SWI1,
362 declare!(TIMER1); 362 SWI2,
363 declare!(TIMER2); 363 SWI3,
364 declare!(SWI0); 364);
365 declare!(SWI1);
366 declare!(SWI2);
367 declare!(SWI3);
368}
diff --git a/embassy-nrf/src/chips/nrf9160.rs b/embassy-nrf/src/chips/nrf9160.rs
index d2b45114f..b6ae78bbe 100644
--- a/embassy-nrf/src/chips/nrf9160.rs
+++ b/embassy-nrf/src/chips/nrf9160.rs
@@ -366,40 +366,36 @@ impl_saadc_input!(P0_18, ANALOG_INPUT5);
366impl_saadc_input!(P0_19, ANALOG_INPUT6); 366impl_saadc_input!(P0_19, ANALOG_INPUT6);
367impl_saadc_input!(P0_20, ANALOG_INPUT7); 367impl_saadc_input!(P0_20, ANALOG_INPUT7);
368 368
369pub mod irqs { 369embassy_cortex_m::interrupt_mod!(
370 use embassy_cortex_m::interrupt::_export::declare; 370 SPU,
371 371 CLOCK_POWER,
372 use crate::pac::Interrupt as InterruptEnum; 372 UARTE0_SPIM0_SPIS0_TWIM0_TWIS0,
373 373 UARTE1_SPIM1_SPIS1_TWIM1_TWIS1,
374 declare!(SPU); 374 UARTE2_SPIM2_SPIS2_TWIM2_TWIS2,
375 declare!(CLOCK_POWER); 375 UARTE3_SPIM3_SPIS3_TWIM3_TWIS3,
376 declare!(UARTE0_SPIM0_SPIS0_TWIM0_TWIS0); 376 GPIOTE0,
377 declare!(UARTE1_SPIM1_SPIS1_TWIM1_TWIS1); 377 SAADC,
378 declare!(UARTE2_SPIM2_SPIS2_TWIM2_TWIS2); 378 TIMER0,
379 declare!(UARTE3_SPIM3_SPIS3_TWIM3_TWIS3); 379 TIMER1,
380 declare!(GPIOTE0); 380 TIMER2,
381 declare!(SAADC); 381 RTC0,
382 declare!(TIMER0); 382 RTC1,
383 declare!(TIMER1); 383 WDT,
384 declare!(TIMER2); 384 EGU0,
385 declare!(RTC0); 385 EGU1,
386 declare!(RTC1); 386 EGU2,
387 declare!(WDT); 387 EGU3,
388 declare!(EGU0); 388 EGU4,
389 declare!(EGU1); 389 EGU5,
390 declare!(EGU2); 390 PWM0,
391 declare!(EGU3); 391 PWM1,
392 declare!(EGU4); 392 PWM2,
393 declare!(EGU5); 393 PDM,
394 declare!(PWM0); 394 PWM3,
395 declare!(PWM1); 395 I2S,
396 declare!(PWM2); 396 IPC,
397 declare!(PDM); 397 FPU,
398 declare!(PWM3); 398 GPIOTE1,
399 declare!(I2S); 399 KMU,
400 declare!(IPC); 400 CRYPTOCELL,
401 declare!(FPU); 401);
402 declare!(GPIOTE1);
403 declare!(KMU);
404 declare!(CRYPTOCELL);
405}
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs
index 2ec5220a7..1d7725bd3 100644
--- a/embassy-nrf/src/gpiote.rs
+++ b/embassy-nrf/src/gpiote.rs
@@ -9,7 +9,7 @@ use embassy_sync::waitqueue::AtomicWaker;
9 9
10use crate::gpio::sealed::Pin as _; 10use crate::gpio::sealed::Pin as _;
11use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin}; 11use crate::gpio::{AnyPin, Flex, Input, Output, Pin as GpioPin};
12use crate::interrupt::Interrupt; 12use crate::interrupt::InterruptExt;
13use crate::ppi::{Event, Task}; 13use crate::ppi::{Event, Task};
14use crate::{interrupt, pac, peripherals}; 14use crate::{interrupt, pac, peripherals};
15 15
@@ -75,15 +75,15 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
75 75
76 // Enable interrupts 76 // Enable interrupts
77 #[cfg(any(feature = "nrf5340-app-s", feature = "nrf9160-s"))] 77 #[cfg(any(feature = "nrf5340-app-s", feature = "nrf9160-s"))]
78 type Irq = interrupt::GPIOTE0; 78 let irq = interrupt::GPIOTE0;
79 #[cfg(any(feature = "nrf5340-app-ns", feature = "nrf9160-ns"))] 79 #[cfg(any(feature = "nrf5340-app-ns", feature = "nrf9160-ns"))]
80 type Irq = interrupt::GPIOTE1; 80 let irq = interrupt::GPIOTE1;
81 #[cfg(any(feature = "_nrf52", feature = "nrf5340-net"))] 81 #[cfg(any(feature = "_nrf52", feature = "nrf5340-net"))]
82 type Irq = interrupt::GPIOTE; 82 let irq = interrupt::GPIOTE;
83 83
84 Irq::unpend(); 84 irq.unpend();
85 Irq::set_priority(irq_prio); 85 irq.set_priority(irq_prio);
86 unsafe { Irq::enable() }; 86 unsafe { irq.enable() };
87 87
88 let g = regs(); 88 let g = regs();
89 g.events_port.write(|w| w); 89 g.events_port.write(|w| w);
diff --git a/embassy-nrf/src/i2s.rs b/embassy-nrf/src/i2s.rs
index 13db77d3b..fea38c4c0 100644
--- a/embassy-nrf/src/i2s.rs
+++ b/embassy-nrf/src/i2s.rs
@@ -13,10 +13,10 @@ use embassy_hal_common::drop::OnDrop;
13use embassy_hal_common::{into_ref, PeripheralRef}; 13use embassy_hal_common::{into_ref, PeripheralRef};
14 14
15use crate::gpio::{AnyPin, Pin as GpioPin}; 15use crate::gpio::{AnyPin, Pin as GpioPin};
16use crate::interrupt::{self, Interrupt}; 16use crate::interrupt::typelevel::Interrupt;
17use crate::pac::i2s::RegisterBlock; 17use crate::pac::i2s::RegisterBlock;
18use crate::util::{slice_in_ram_or, slice_ptr_parts}; 18use crate::util::{slice_in_ram_or, slice_ptr_parts};
19use crate::{Peripheral, EASY_DMA_SIZE}; 19use crate::{interrupt, Peripheral, EASY_DMA_SIZE};
20 20
21/// Type alias for `MultiBuffering` with 2 buffers. 21/// Type alias for `MultiBuffering` with 2 buffers.
22pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>; 22pub type DoubleBuffering<S, const NS: usize> = MultiBuffering<S, 2, NS>;
@@ -367,7 +367,7 @@ pub struct InterruptHandler<T: Instance> {
367 _phantom: PhantomData<T>, 367 _phantom: PhantomData<T>,
368} 368}
369 369
370impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 370impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
371 unsafe fn on_interrupt() { 371 unsafe fn on_interrupt() {
372 let device = Device::<T>::new(); 372 let device = Device::<T>::new();
373 let s = T::state(); 373 let s = T::state();
@@ -408,7 +408,7 @@ impl<'d, T: Instance> I2S<'d, T> {
408 /// Create a new I2S in master mode 408 /// Create a new I2S in master mode
409 pub fn new_master( 409 pub fn new_master(
410 i2s: impl Peripheral<P = T> + 'd, 410 i2s: impl Peripheral<P = T> + 'd,
411 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 411 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
412 mck: impl Peripheral<P = impl GpioPin> + 'd, 412 mck: impl Peripheral<P = impl GpioPin> + 'd,
413 sck: impl Peripheral<P = impl GpioPin> + 'd, 413 sck: impl Peripheral<P = impl GpioPin> + 'd,
414 lrck: impl Peripheral<P = impl GpioPin> + 'd, 414 lrck: impl Peripheral<P = impl GpioPin> + 'd,
@@ -431,7 +431,7 @@ impl<'d, T: Instance> I2S<'d, T> {
431 /// Create a new I2S in slave mode 431 /// Create a new I2S in slave mode
432 pub fn new_slave( 432 pub fn new_slave(
433 i2s: impl Peripheral<P = T> + 'd, 433 i2s: impl Peripheral<P = T> + 'd,
434 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 434 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
435 sck: impl Peripheral<P = impl GpioPin> + 'd, 435 sck: impl Peripheral<P = impl GpioPin> + 'd,
436 lrck: impl Peripheral<P = impl GpioPin> + 'd, 436 lrck: impl Peripheral<P = impl GpioPin> + 'd,
437 config: Config, 437 config: Config,
@@ -1173,7 +1173,7 @@ pub(crate) mod sealed {
1173/// I2S peripheral instance. 1173/// I2S peripheral instance.
1174pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 1174pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
1175 /// Interrupt for this peripheral. 1175 /// Interrupt for this peripheral.
1176 type Interrupt: Interrupt; 1176 type Interrupt: interrupt::typelevel::Interrupt;
1177} 1177}
1178 1178
1179macro_rules! impl_i2s { 1179macro_rules! impl_i2s {
@@ -1188,7 +1188,7 @@ macro_rules! impl_i2s {
1188 } 1188 }
1189 } 1189 }
1190 impl crate::i2s::Instance for peripherals::$type { 1190 impl crate::i2s::Instance for peripherals::$type {
1191 type Interrupt = crate::interrupt::$irq; 1191 type Interrupt = crate::interrupt::typelevel::$irq;
1192 } 1192 }
1193 }; 1193 };
1194} 1194}
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index 6b57c2545..a73d22a63 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -93,21 +93,16 @@ pub mod wdt;
93#[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")] 93#[cfg_attr(feature = "_nrf9160", path = "chips/nrf9160.rs")]
94mod chip; 94mod chip;
95 95
96pub mod interrupt { 96pub use crate::chip::interrupt;
97 //! Interrupt definitions and macros to bind them. 97
98 pub use cortex_m::interrupt::{CriticalSection, Mutex}; 98/// Macro to bind interrupts to handlers.
99 pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; 99///
100 100/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
101 pub use crate::chip::irqs::*; 101/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
102 102/// prove at compile-time that the right interrupts have been bound.
103 /// Macro to bind interrupts to handlers. 103// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
104 /// 104#[macro_export]
105 /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) 105macro_rules! bind_interrupts {
106 /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
107 /// prove at compile-time that the right interrupts have been bound.
108 // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
109 #[macro_export]
110 macro_rules! bind_interrupts {
111 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { 106 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
112 $vis struct $name; 107 $vis struct $name;
113 108
@@ -116,17 +111,16 @@ pub mod interrupt {
116 #[no_mangle] 111 #[no_mangle]
117 unsafe extern "C" fn $irq() { 112 unsafe extern "C" fn $irq() {
118 $( 113 $(
119 <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt(); 114 <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt();
120 )* 115 )*
121 } 116 }
122 117
123 $( 118 $(
124 unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} 119 unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {}
125 )* 120 )*
126 )* 121 )*
127 }; 122 };
128 } 123 }
129}
130 124
131// Reexports 125// Reexports
132 126
@@ -136,7 +130,6 @@ pub use chip::pac;
136pub(crate) use chip::pac; 130pub(crate) use chip::pac;
137pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE}; 131pub use chip::{peripherals, Peripherals, EASY_DMA_SIZE};
138pub use embassy_cortex_m::executor; 132pub use embassy_cortex_m::executor;
139pub use embassy_cortex_m::interrupt::_export::interrupt;
140pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 133pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
141 134
142pub mod config { 135pub mod config {
diff --git a/embassy-nrf/src/pdm.rs b/embassy-nrf/src/pdm.rs
index 9df685a26..0e30f7002 100644
--- a/embassy-nrf/src/pdm.rs
+++ b/embassy-nrf/src/pdm.rs
@@ -6,7 +6,6 @@ use core::marker::PhantomData;
6use core::sync::atomic::{compiler_fence, Ordering}; 6use core::sync::atomic::{compiler_fence, Ordering};
7use core::task::Poll; 7use core::task::Poll;
8 8
9use embassy_cortex_m::interrupt::Interrupt;
10use embassy_hal_common::drop::OnDrop; 9use embassy_hal_common::drop::OnDrop;
11use embassy_hal_common::{into_ref, PeripheralRef}; 10use embassy_hal_common::{into_ref, PeripheralRef};
12use futures::future::poll_fn; 11use futures::future::poll_fn;
@@ -14,15 +13,15 @@ use futures::future::poll_fn;
14use crate::chip::EASY_DMA_SIZE; 13use crate::chip::EASY_DMA_SIZE;
15use crate::gpio::sealed::Pin; 14use crate::gpio::sealed::Pin;
16use crate::gpio::{AnyPin, Pin as GpioPin}; 15use crate::gpio::{AnyPin, Pin as GpioPin};
17use crate::interrupt::{self}; 16use crate::interrupt::typelevel::Interrupt;
18use crate::Peripheral; 17use crate::{interrupt, Peripheral};
19 18
20/// Interrupt handler. 19/// Interrupt handler.
21pub struct InterruptHandler<T: Instance> { 20pub struct InterruptHandler<T: Instance> {
22 _phantom: PhantomData<T>, 21 _phantom: PhantomData<T>,
23} 22}
24 23
25impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 24impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
26 unsafe fn on_interrupt() { 25 unsafe fn on_interrupt() {
27 T::regs().intenclr.write(|w| w.end().clear()); 26 T::regs().intenclr.write(|w| w.end().clear());
28 T::state().waker.wake(); 27 T::state().waker.wake();
@@ -53,7 +52,7 @@ impl<'d, T: Instance> Pdm<'d, T> {
53 /// Create PDM driver 52 /// Create PDM driver
54 pub fn new( 53 pub fn new(
55 pdm: impl Peripheral<P = T> + 'd, 54 pdm: impl Peripheral<P = T> + 'd,
56 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 55 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
57 clk: impl Peripheral<P = impl GpioPin> + 'd, 56 clk: impl Peripheral<P = impl GpioPin> + 'd,
58 din: impl Peripheral<P = impl GpioPin> + 'd, 57 din: impl Peripheral<P = impl GpioPin> + 'd,
59 config: Config, 58 config: Config,
@@ -274,7 +273,7 @@ pub(crate) mod sealed {
274/// PDM peripheral instance. 273/// PDM peripheral instance.
275pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 274pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
276 /// Interrupt for this peripheral. 275 /// Interrupt for this peripheral.
277 type Interrupt: Interrupt; 276 type Interrupt: interrupt::typelevel::Interrupt;
278} 277}
279 278
280macro_rules! impl_pdm { 279macro_rules! impl_pdm {
@@ -289,7 +288,7 @@ macro_rules! impl_pdm {
289 } 288 }
290 } 289 }
291 impl crate::pdm::Instance for peripherals::$type { 290 impl crate::pdm::Instance for peripherals::$type {
292 type Interrupt = crate::interrupt::$irq; 291 type Interrupt = crate::interrupt::typelevel::$irq;
293 } 292 }
294 }; 293 };
295} 294}
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs
index 708f23104..363a255d5 100644
--- a/embassy-nrf/src/pwm.rs
+++ b/embassy-nrf/src/pwm.rs
@@ -8,10 +8,9 @@ use embassy_hal_common::{into_ref, PeripheralRef};
8 8
9use crate::gpio::sealed::Pin as _; 9use crate::gpio::sealed::Pin as _;
10use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; 10use crate::gpio::{AnyPin, Pin as GpioPin, PselBits};
11use crate::interrupt::Interrupt;
12use crate::ppi::{Event, Task}; 11use crate::ppi::{Event, Task};
13use crate::util::slice_in_ram_or; 12use crate::util::slice_in_ram_or;
14use crate::{pac, Peripheral}; 13use crate::{interrupt, pac, Peripheral};
15 14
16/// SimplePwm is the traditional pwm interface you're probably used to, allowing 15/// SimplePwm is the traditional pwm interface you're probably used to, allowing
17/// to simply set a duty cycle across up to four channels. 16/// to simply set a duty cycle across up to four channels.
@@ -843,7 +842,7 @@ pub(crate) mod sealed {
843/// PWM peripheral instance. 842/// PWM peripheral instance.
844pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { 843pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static {
845 /// Interrupt for this peripheral. 844 /// Interrupt for this peripheral.
846 type Interrupt: Interrupt; 845 type Interrupt: interrupt::typelevel::Interrupt;
847} 846}
848 847
849macro_rules! impl_pwm { 848macro_rules! impl_pwm {
@@ -854,7 +853,7 @@ macro_rules! impl_pwm {
854 } 853 }
855 } 854 }
856 impl crate::pwm::Instance for peripherals::$type { 855 impl crate::pwm::Instance for peripherals::$type {
857 type Interrupt = crate::interrupt::$irq; 856 type Interrupt = crate::interrupt::typelevel::$irq;
858 } 857 }
859 }; 858 };
860} 859}
diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs
index 5761d04e1..8bac87d37 100644
--- a/embassy-nrf/src/qdec.rs
+++ b/embassy-nrf/src/qdec.rs
@@ -10,7 +10,7 @@ use embassy_hal_common::{into_ref, PeripheralRef};
10 10
11use crate::gpio::sealed::Pin as _; 11use crate::gpio::sealed::Pin as _;
12use crate::gpio::{AnyPin, Pin as GpioPin}; 12use crate::gpio::{AnyPin, Pin as GpioPin};
13use crate::interrupt::Interrupt; 13use crate::interrupt::typelevel::Interrupt;
14use crate::{interrupt, Peripheral}; 14use crate::{interrupt, Peripheral};
15 15
16/// Quadrature decoder driver. 16/// Quadrature decoder driver.
@@ -50,7 +50,7 @@ pub struct InterruptHandler<T: Instance> {
50 _phantom: PhantomData<T>, 50 _phantom: PhantomData<T>,
51} 51}
52 52
53impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 53impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
54 unsafe fn on_interrupt() { 54 unsafe fn on_interrupt() {
55 T::regs().intenclr.write(|w| w.reportrdy().clear()); 55 T::regs().intenclr.write(|w| w.reportrdy().clear());
56 T::state().waker.wake(); 56 T::state().waker.wake();
@@ -61,7 +61,7 @@ impl<'d, T: Instance> Qdec<'d, T> {
61 /// Create a new QDEC. 61 /// Create a new QDEC.
62 pub fn new( 62 pub fn new(
63 qdec: impl Peripheral<P = T> + 'd, 63 qdec: impl Peripheral<P = T> + 'd,
64 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 64 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
65 a: impl Peripheral<P = impl GpioPin> + 'd, 65 a: impl Peripheral<P = impl GpioPin> + 'd,
66 b: impl Peripheral<P = impl GpioPin> + 'd, 66 b: impl Peripheral<P = impl GpioPin> + 'd,
67 config: Config, 67 config: Config,
@@ -73,7 +73,7 @@ impl<'d, T: Instance> Qdec<'d, T> {
73 /// Create a new QDEC, with a pin for LED output. 73 /// Create a new QDEC, with a pin for LED output.
74 pub fn new_with_led( 74 pub fn new_with_led(
75 qdec: impl Peripheral<P = T> + 'd, 75 qdec: impl Peripheral<P = T> + 'd,
76 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 76 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
77 a: impl Peripheral<P = impl GpioPin> + 'd, 77 a: impl Peripheral<P = impl GpioPin> + 'd,
78 b: impl Peripheral<P = impl GpioPin> + 'd, 78 b: impl Peripheral<P = impl GpioPin> + 'd,
79 led: impl Peripheral<P = impl GpioPin> + 'd, 79 led: impl Peripheral<P = impl GpioPin> + 'd,
@@ -271,7 +271,7 @@ pub(crate) mod sealed {
271/// qdec peripheral instance. 271/// qdec peripheral instance.
272pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 272pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
273 /// Interrupt for this peripheral. 273 /// Interrupt for this peripheral.
274 type Interrupt: Interrupt; 274 type Interrupt: interrupt::typelevel::Interrupt;
275} 275}
276 276
277macro_rules! impl_qdec { 277macro_rules! impl_qdec {
@@ -286,7 +286,7 @@ macro_rules! impl_qdec {
286 } 286 }
287 } 287 }
288 impl crate::qdec::Instance for peripherals::$type { 288 impl crate::qdec::Instance for peripherals::$type {
289 type Interrupt = crate::interrupt::$irq; 289 type Interrupt = crate::interrupt::typelevel::$irq;
290 } 290 }
291 }; 291 };
292} 292}
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index 3f48568b3..baefc7967 100644
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -12,12 +12,12 @@ use embassy_hal_common::{into_ref, PeripheralRef};
12use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash}; 12use embedded_storage::nor_flash::{ErrorType, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash};
13 13
14use crate::gpio::{self, Pin as GpioPin}; 14use crate::gpio::{self, Pin as GpioPin};
15use crate::interrupt::{self, Interrupt}; 15use crate::interrupt::typelevel::Interrupt;
16pub use crate::pac::qspi::ifconfig0::{ 16pub use crate::pac::qspi::ifconfig0::{
17 ADDRMODE_A as AddressMode, PPSIZE_A as WritePageSize, READOC_A as ReadOpcode, WRITEOC_A as WriteOpcode, 17 ADDRMODE_A as AddressMode, PPSIZE_A as WritePageSize, READOC_A as ReadOpcode, WRITEOC_A as WriteOpcode,
18}; 18};
19pub use crate::pac::qspi::ifconfig1::SPIMODE_A as SpiMode; 19pub use crate::pac::qspi::ifconfig1::SPIMODE_A as SpiMode;
20use crate::Peripheral; 20use crate::{interrupt, Peripheral};
21 21
22/// Deep power-down config. 22/// Deep power-down config.
23pub struct DeepPowerDownConfig { 23pub struct DeepPowerDownConfig {
@@ -120,7 +120,7 @@ pub struct InterruptHandler<T: Instance> {
120 _phantom: PhantomData<T>, 120 _phantom: PhantomData<T>,
121} 121}
122 122
123impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 123impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
124 unsafe fn on_interrupt() { 124 unsafe fn on_interrupt() {
125 let r = T::regs(); 125 let r = T::regs();
126 let s = T::state(); 126 let s = T::state();
@@ -143,7 +143,7 @@ impl<'d, T: Instance> Qspi<'d, T> {
143 /// Create a new QSPI driver. 143 /// Create a new QSPI driver.
144 pub fn new( 144 pub fn new(
145 qspi: impl Peripheral<P = T> + 'd, 145 qspi: impl Peripheral<P = T> + 'd,
146 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 146 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
147 sck: impl Peripheral<P = impl GpioPin> + 'd, 147 sck: impl Peripheral<P = impl GpioPin> + 'd,
148 csn: impl Peripheral<P = impl GpioPin> + 'd, 148 csn: impl Peripheral<P = impl GpioPin> + 'd,
149 io0: impl Peripheral<P = impl GpioPin> + 'd, 149 io0: impl Peripheral<P = impl GpioPin> + 'd,
@@ -644,7 +644,7 @@ pub(crate) mod sealed {
644/// QSPI peripheral instance. 644/// QSPI peripheral instance.
645pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 645pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
646 /// Interrupt for this peripheral. 646 /// Interrupt for this peripheral.
647 type Interrupt: Interrupt; 647 type Interrupt: interrupt::typelevel::Interrupt;
648} 648}
649 649
650macro_rules! impl_qspi { 650macro_rules! impl_qspi {
@@ -659,7 +659,7 @@ macro_rules! impl_qspi {
659 } 659 }
660 } 660 }
661 impl crate::qspi::Instance for peripherals::$type { 661 impl crate::qspi::Instance for peripherals::$type {
662 type Interrupt = crate::interrupt::$irq; 662 type Interrupt = crate::interrupt::typelevel::$irq;
663 } 663 }
664 }; 664 };
665} 665}
diff --git a/embassy-nrf/src/rng.rs b/embassy-nrf/src/rng.rs
index 7e9b35481..923b8b467 100644
--- a/embassy-nrf/src/rng.rs
+++ b/embassy-nrf/src/rng.rs
@@ -12,7 +12,7 @@ use embassy_hal_common::drop::OnDrop;
12use embassy_hal_common::{into_ref, PeripheralRef}; 12use embassy_hal_common::{into_ref, PeripheralRef};
13use embassy_sync::waitqueue::AtomicWaker; 13use embassy_sync::waitqueue::AtomicWaker;
14 14
15use crate::interrupt::Interrupt; 15use crate::interrupt::typelevel::Interrupt;
16use crate::{interrupt, Peripheral}; 16use crate::{interrupt, Peripheral};
17 17
18/// Interrupt handler. 18/// Interrupt handler.
@@ -20,7 +20,7 @@ pub struct InterruptHandler<T: Instance> {
20 _phantom: PhantomData<T>, 20 _phantom: PhantomData<T>,
21} 21}
22 22
23impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 23impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
24 unsafe fn on_interrupt() { 24 unsafe fn on_interrupt() {
25 let s = T::state(); 25 let s = T::state();
26 let r = T::regs(); 26 let r = T::regs();
@@ -89,7 +89,7 @@ impl<'d, T: Instance> Rng<'d, T> {
89 /// The synchronous API is safe. 89 /// The synchronous API is safe.
90 pub fn new( 90 pub fn new(
91 rng: impl Peripheral<P = T> + 'd, 91 rng: impl Peripheral<P = T> + 'd,
92 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 92 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
93 ) -> Self { 93 ) -> Self {
94 into_ref!(rng); 94 into_ref!(rng);
95 95
@@ -255,7 +255,7 @@ pub(crate) mod sealed {
255/// RNG peripheral instance. 255/// RNG peripheral instance.
256pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 256pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
257 /// Interrupt for this peripheral. 257 /// Interrupt for this peripheral.
258 type Interrupt: Interrupt; 258 type Interrupt: interrupt::typelevel::Interrupt;
259} 259}
260 260
261macro_rules! impl_rng { 261macro_rules! impl_rng {
@@ -270,7 +270,7 @@ macro_rules! impl_rng {
270 } 270 }
271 } 271 }
272 impl crate::rng::Instance for peripherals::$type { 272 impl crate::rng::Instance for peripherals::$type {
273 type Interrupt = crate::interrupt::$irq; 273 type Interrupt = crate::interrupt::typelevel::$irq;
274 } 274 }
275 }; 275 };
276} 276}
diff --git a/embassy-nrf/src/saadc.rs b/embassy-nrf/src/saadc.rs
index 39764e380..cf3fb9993 100644
--- a/embassy-nrf/src/saadc.rs
+++ b/embassy-nrf/src/saadc.rs
@@ -6,7 +6,6 @@ use core::future::poll_fn;
6use core::sync::atomic::{compiler_fence, Ordering}; 6use core::sync::atomic::{compiler_fence, Ordering};
7use core::task::Poll; 7use core::task::Poll;
8 8
9use embassy_cortex_m::interrupt::Interrupt;
10use embassy_hal_common::drop::OnDrop; 9use embassy_hal_common::drop::OnDrop;
11use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; 10use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef};
12use embassy_sync::waitqueue::AtomicWaker; 11use embassy_sync::waitqueue::AtomicWaker;
@@ -18,6 +17,7 @@ use saadc::oversample::OVERSAMPLE_A;
18use saadc::resolution::VAL_A; 17use saadc::resolution::VAL_A;
19 18
20use self::sealed::Input as _; 19use self::sealed::Input as _;
20use crate::interrupt::InterruptExt;
21use crate::ppi::{ConfigurableChannel, Event, Ppi, Task}; 21use crate::ppi::{ConfigurableChannel, Event, Ppi, Task};
22use crate::timer::{Frequency, Instance as TimerInstance, Timer}; 22use crate::timer::{Frequency, Instance as TimerInstance, Timer};
23use crate::{interrupt, pac, peripherals, Peripheral}; 23use crate::{interrupt, pac, peripherals, Peripheral};
@@ -33,7 +33,7 @@ pub struct InterruptHandler {
33 _private: (), 33 _private: (),
34} 34}
35 35
36impl interrupt::Handler<interrupt::SAADC> for InterruptHandler { 36impl interrupt::typelevel::Handler<interrupt::typelevel::SAADC> for InterruptHandler {
37 unsafe fn on_interrupt() { 37 unsafe fn on_interrupt() {
38 let r = unsafe { &*SAADC::ptr() }; 38 let r = unsafe { &*SAADC::ptr() };
39 39
@@ -144,7 +144,7 @@ impl<'d, const N: usize> Saadc<'d, N> {
144 /// Create a new SAADC driver. 144 /// Create a new SAADC driver.
145 pub fn new( 145 pub fn new(
146 saadc: impl Peripheral<P = peripherals::SAADC> + 'd, 146 saadc: impl Peripheral<P = peripherals::SAADC> + 'd,
147 _irq: impl interrupt::Binding<interrupt::SAADC, InterruptHandler> + 'd, 147 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::SAADC, InterruptHandler> + 'd,
148 config: Config, 148 config: Config,
149 channel_configs: [ChannelConfig; N], 149 channel_configs: [ChannelConfig; N],
150 ) -> Self { 150 ) -> Self {
@@ -189,8 +189,8 @@ impl<'d, const N: usize> Saadc<'d, N> {
189 // Disable all events interrupts 189 // Disable all events interrupts
190 r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) }); 190 r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) });
191 191
192 interrupt::SAADC::unpend(); 192 interrupt::SAADC.unpend();
193 unsafe { interrupt::SAADC::enable() }; 193 unsafe { interrupt::SAADC.enable() };
194 194
195 Self { _p: saadc } 195 Self { _p: saadc }
196 } 196 }
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index bb9cda323..66bbd1a8f 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -15,9 +15,9 @@ pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
15use crate::chip::FORCE_COPY_BUFFER_SIZE; 15use crate::chip::FORCE_COPY_BUFFER_SIZE;
16use crate::gpio::sealed::Pin as _; 16use crate::gpio::sealed::Pin as _;
17use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; 17use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits};
18use crate::interrupt::{self, Interrupt}; 18use crate::interrupt::typelevel::Interrupt;
19use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; 19use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut};
20use crate::{pac, Peripheral}; 20use crate::{interrupt, pac, Peripheral};
21 21
22/// SPIM error 22/// SPIM error
23#[derive(Debug, Clone, Copy, PartialEq, Eq)] 23#[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -63,7 +63,7 @@ pub struct InterruptHandler<T: Instance> {
63 _phantom: PhantomData<T>, 63 _phantom: PhantomData<T>,
64} 64}
65 65
66impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 66impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
67 unsafe fn on_interrupt() { 67 unsafe fn on_interrupt() {
68 let r = T::regs(); 68 let r = T::regs();
69 let s = T::state(); 69 let s = T::state();
@@ -84,7 +84,7 @@ impl<'d, T: Instance> Spim<'d, T> {
84 /// Create a new SPIM driver. 84 /// Create a new SPIM driver.
85 pub fn new( 85 pub fn new(
86 spim: impl Peripheral<P = T> + 'd, 86 spim: impl Peripheral<P = T> + 'd,
87 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 87 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
88 sck: impl Peripheral<P = impl GpioPin> + 'd, 88 sck: impl Peripheral<P = impl GpioPin> + 'd,
89 miso: impl Peripheral<P = impl GpioPin> + 'd, 89 miso: impl Peripheral<P = impl GpioPin> + 'd,
90 mosi: impl Peripheral<P = impl GpioPin> + 'd, 90 mosi: impl Peripheral<P = impl GpioPin> + 'd,
@@ -103,7 +103,7 @@ impl<'d, T: Instance> Spim<'d, T> {
103 /// Create a new SPIM driver, capable of TX only (MOSI only). 103 /// Create a new SPIM driver, capable of TX only (MOSI only).
104 pub fn new_txonly( 104 pub fn new_txonly(
105 spim: impl Peripheral<P = T> + 'd, 105 spim: impl Peripheral<P = T> + 'd,
106 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 106 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
107 sck: impl Peripheral<P = impl GpioPin> + 'd, 107 sck: impl Peripheral<P = impl GpioPin> + 'd,
108 mosi: impl Peripheral<P = impl GpioPin> + 'd, 108 mosi: impl Peripheral<P = impl GpioPin> + 'd,
109 config: Config, 109 config: Config,
@@ -115,7 +115,7 @@ impl<'d, T: Instance> Spim<'d, T> {
115 /// Create a new SPIM driver, capable of RX only (MISO only). 115 /// Create a new SPIM driver, capable of RX only (MISO only).
116 pub fn new_rxonly( 116 pub fn new_rxonly(
117 spim: impl Peripheral<P = T> + 'd, 117 spim: impl Peripheral<P = T> + 'd,
118 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 118 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
119 sck: impl Peripheral<P = impl GpioPin> + 'd, 119 sck: impl Peripheral<P = impl GpioPin> + 'd,
120 miso: impl Peripheral<P = impl GpioPin> + 'd, 120 miso: impl Peripheral<P = impl GpioPin> + 'd,
121 config: Config, 121 config: Config,
@@ -408,7 +408,7 @@ pub(crate) mod sealed {
408/// SPIM peripheral instance 408/// SPIM peripheral instance
409pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { 409pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static {
410 /// Interrupt for this peripheral. 410 /// Interrupt for this peripheral.
411 type Interrupt: Interrupt; 411 type Interrupt: interrupt::typelevel::Interrupt;
412} 412}
413 413
414macro_rules! impl_spim { 414macro_rules! impl_spim {
@@ -423,7 +423,7 @@ macro_rules! impl_spim {
423 } 423 }
424 } 424 }
425 impl crate::spim::Instance for peripherals::$type { 425 impl crate::spim::Instance for peripherals::$type {
426 type Interrupt = crate::interrupt::$irq; 426 type Interrupt = crate::interrupt::typelevel::$irq;
427 } 427 }
428 }; 428 };
429} 429}
diff --git a/embassy-nrf/src/spis.rs b/embassy-nrf/src/spis.rs
index a1d6803ed..aa438415a 100644
--- a/embassy-nrf/src/spis.rs
+++ b/embassy-nrf/src/spis.rs
@@ -13,9 +13,9 @@ pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MO
13use crate::chip::FORCE_COPY_BUFFER_SIZE; 13use crate::chip::FORCE_COPY_BUFFER_SIZE;
14use crate::gpio::sealed::Pin as _; 14use crate::gpio::sealed::Pin as _;
15use crate::gpio::{self, AnyPin, Pin as GpioPin}; 15use crate::gpio::{self, AnyPin, Pin as GpioPin};
16use crate::interrupt::{self, Interrupt}; 16use crate::interrupt::typelevel::Interrupt;
17use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut}; 17use crate::util::{slice_in_ram_or, slice_ptr_parts, slice_ptr_parts_mut};
18use crate::{pac, Peripheral}; 18use crate::{interrupt, pac, Peripheral};
19 19
20/// SPIS error 20/// SPIS error
21#[derive(Debug, Clone, Copy, PartialEq, Eq)] 21#[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> {
68 _phantom: PhantomData<T>, 68 _phantom: PhantomData<T>,
69} 69}
70 70
71impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 71impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
72 unsafe fn on_interrupt() { 72 unsafe fn on_interrupt() {
73 let r = T::regs(); 73 let r = T::regs();
74 let s = T::state(); 74 let s = T::state();
@@ -94,7 +94,7 @@ impl<'d, T: Instance> Spis<'d, T> {
94 /// Create a new SPIS driver. 94 /// Create a new SPIS driver.
95 pub fn new( 95 pub fn new(
96 spis: impl Peripheral<P = T> + 'd, 96 spis: impl Peripheral<P = T> + 'd,
97 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 97 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
98 cs: impl Peripheral<P = impl GpioPin> + 'd, 98 cs: impl Peripheral<P = impl GpioPin> + 'd,
99 sck: impl Peripheral<P = impl GpioPin> + 'd, 99 sck: impl Peripheral<P = impl GpioPin> + 'd,
100 miso: impl Peripheral<P = impl GpioPin> + 'd, 100 miso: impl Peripheral<P = impl GpioPin> + 'd,
@@ -115,7 +115,7 @@ impl<'d, T: Instance> Spis<'d, T> {
115 /// Create a new SPIS driver, capable of TX only (MISO only). 115 /// Create a new SPIS driver, capable of TX only (MISO only).
116 pub fn new_txonly( 116 pub fn new_txonly(
117 spis: impl Peripheral<P = T> + 'd, 117 spis: impl Peripheral<P = T> + 'd,
118 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 118 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
119 cs: impl Peripheral<P = impl GpioPin> + 'd, 119 cs: impl Peripheral<P = impl GpioPin> + 'd,
120 sck: impl Peripheral<P = impl GpioPin> + 'd, 120 sck: impl Peripheral<P = impl GpioPin> + 'd,
121 miso: impl Peripheral<P = impl GpioPin> + 'd, 121 miso: impl Peripheral<P = impl GpioPin> + 'd,
@@ -128,7 +128,7 @@ impl<'d, T: Instance> Spis<'d, T> {
128 /// Create a new SPIS driver, capable of RX only (MOSI only). 128 /// Create a new SPIS driver, capable of RX only (MOSI only).
129 pub fn new_rxonly( 129 pub fn new_rxonly(
130 spis: impl Peripheral<P = T> + 'd, 130 spis: impl Peripheral<P = T> + 'd,
131 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 131 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
132 cs: impl Peripheral<P = impl GpioPin> + 'd, 132 cs: impl Peripheral<P = impl GpioPin> + 'd,
133 sck: impl Peripheral<P = impl GpioPin> + 'd, 133 sck: impl Peripheral<P = impl GpioPin> + 'd,
134 mosi: impl Peripheral<P = impl GpioPin> + 'd, 134 mosi: impl Peripheral<P = impl GpioPin> + 'd,
@@ -480,7 +480,7 @@ pub(crate) mod sealed {
480/// SPIS peripheral instance 480/// SPIS peripheral instance
481pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { 481pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static {
482 /// Interrupt for this peripheral. 482 /// Interrupt for this peripheral.
483 type Interrupt: Interrupt; 483 type Interrupt: interrupt::typelevel::Interrupt;
484} 484}
485 485
486macro_rules! impl_spis { 486macro_rules! impl_spis {
@@ -495,7 +495,7 @@ macro_rules! impl_spis {
495 } 495 }
496 } 496 }
497 impl crate::spis::Instance for peripherals::$type { 497 impl crate::spis::Instance for peripherals::$type {
498 type Interrupt = crate::interrupt::$irq; 498 type Interrupt = crate::interrupt::typelevel::$irq;
499 } 499 }
500 }; 500 };
501} 501}
diff --git a/embassy-nrf/src/temp.rs b/embassy-nrf/src/temp.rs
index 8a127efc5..491e92c04 100644
--- a/embassy-nrf/src/temp.rs
+++ b/embassy-nrf/src/temp.rs
@@ -8,7 +8,7 @@ use embassy_hal_common::{into_ref, PeripheralRef};
8use embassy_sync::waitqueue::AtomicWaker; 8use embassy_sync::waitqueue::AtomicWaker;
9use fixed::types::I30F2; 9use fixed::types::I30F2;
10 10
11use crate::interrupt::Interrupt; 11use crate::interrupt::InterruptExt;
12use crate::peripherals::TEMP; 12use crate::peripherals::TEMP;
13use crate::{interrupt, pac, Peripheral}; 13use crate::{interrupt, pac, Peripheral};
14 14
@@ -17,7 +17,7 @@ pub struct InterruptHandler {
17 _private: (), 17 _private: (),
18} 18}
19 19
20impl interrupt::Handler<interrupt::TEMP> for InterruptHandler { 20impl interrupt::typelevel::Handler<interrupt::typelevel::TEMP> for InterruptHandler {
21 unsafe fn on_interrupt() { 21 unsafe fn on_interrupt() {
22 let r = unsafe { &*pac::TEMP::PTR }; 22 let r = unsafe { &*pac::TEMP::PTR };
23 r.intenclr.write(|w| w.datardy().clear()); 23 r.intenclr.write(|w| w.datardy().clear());
@@ -36,13 +36,13 @@ impl<'d> Temp<'d> {
36 /// Create a new temperature sensor driver. 36 /// Create a new temperature sensor driver.
37 pub fn new( 37 pub fn new(
38 _peri: impl Peripheral<P = TEMP> + 'd, 38 _peri: impl Peripheral<P = TEMP> + 'd,
39 _irq: impl interrupt::Binding<interrupt::TEMP, InterruptHandler> + 'd, 39 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::TEMP, InterruptHandler> + 'd,
40 ) -> Self { 40 ) -> Self {
41 into_ref!(_peri); 41 into_ref!(_peri);
42 42
43 // Enable interrupt that signals temperature values 43 // Enable interrupt that signals temperature values
44 interrupt::TEMP::unpend(); 44 interrupt::TEMP.unpend();
45 unsafe { interrupt::TEMP::enable() }; 45 unsafe { interrupt::TEMP.enable() };
46 46
47 Self { _peri } 47 Self { _peri }
48 } 48 }
diff --git a/embassy-nrf/src/time_driver.rs b/embassy-nrf/src/time_driver.rs
index 4feff8a75..f993d7b2e 100644
--- a/embassy-nrf/src/time_driver.rs
+++ b/embassy-nrf/src/time_driver.rs
@@ -7,7 +7,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
7use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex; 7use embassy_sync::blocking_mutex::CriticalSectionMutex as Mutex;
8use embassy_time::driver::{AlarmHandle, Driver}; 8use embassy_time::driver::{AlarmHandle, Driver};
9 9
10use crate::interrupt::Interrupt; 10use crate::interrupt::InterruptExt;
11use crate::{interrupt, pac}; 11use crate::{interrupt, pac};
12 12
13fn rtc() -> &'static pac::rtc0::RegisterBlock { 13fn rtc() -> &'static pac::rtc0::RegisterBlock {
@@ -142,8 +142,8 @@ impl RtcDriver {
142 // Wait for clear 142 // Wait for clear
143 while r.counter.read().bits() != 0 {} 143 while r.counter.read().bits() != 0 {}
144 144
145 interrupt::RTC1::set_priority(irq_prio); 145 interrupt::RTC1.set_priority(irq_prio);
146 unsafe { interrupt::RTC1::enable() }; 146 unsafe { interrupt::RTC1.enable() };
147 } 147 }
148 148
149 fn on_interrupt(&self) { 149 fn on_interrupt(&self) {
diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs
index 2a0e16a50..dc3757856 100644
--- a/embassy-nrf/src/timer.rs
+++ b/embassy-nrf/src/timer.rs
@@ -8,7 +8,6 @@
8 8
9use embassy_hal_common::{into_ref, PeripheralRef}; 9use embassy_hal_common::{into_ref, PeripheralRef};
10 10
11use crate::interrupt::Interrupt;
12use crate::ppi::{Event, Task}; 11use crate::ppi::{Event, Task};
13use crate::{pac, Peripheral}; 12use crate::{pac, Peripheral};
14 13
@@ -29,7 +28,7 @@ pub(crate) mod sealed {
29/// Basic Timer instance. 28/// Basic Timer instance.
30pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 29pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
31 /// Interrupt for this peripheral. 30 /// Interrupt for this peripheral.
32 type Interrupt: Interrupt; 31 type Interrupt: crate::interrupt::typelevel::Interrupt;
33} 32}
34 33
35/// Extended timer instance. 34/// Extended timer instance.
@@ -44,7 +43,7 @@ macro_rules! impl_timer {
44 } 43 }
45 } 44 }
46 impl crate::timer::Instance for peripherals::$type { 45 impl crate::timer::Instance for peripherals::$type {
47 type Interrupt = crate::interrupt::$irq; 46 type Interrupt = crate::interrupt::typelevel::$irq;
48 } 47 }
49 }; 48 };
50 ($type:ident, $pac_type:ident, $irq:ident) => { 49 ($type:ident, $pac_type:ident, $irq:ident) => {
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs
index dea398a67..2ad0d19b1 100644
--- a/embassy-nrf/src/twim.rs
+++ b/embassy-nrf/src/twim.rs
@@ -16,9 +16,9 @@ use embassy_time::{Duration, Instant};
16 16
17use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; 17use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
18use crate::gpio::Pin as GpioPin; 18use crate::gpio::Pin as GpioPin;
19use crate::interrupt::{self, Interrupt}; 19use crate::interrupt::typelevel::Interrupt;
20use crate::util::{slice_in_ram, slice_in_ram_or}; 20use crate::util::{slice_in_ram, slice_in_ram_or};
21use crate::{gpio, pac, Peripheral}; 21use crate::{gpio, interrupt, pac, Peripheral};
22 22
23/// TWI frequency 23/// TWI frequency
24#[derive(Clone, Copy)] 24#[derive(Clone, Copy)]
@@ -98,7 +98,7 @@ pub struct InterruptHandler<T: Instance> {
98 _phantom: PhantomData<T>, 98 _phantom: PhantomData<T>,
99} 99}
100 100
101impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 101impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
102 unsafe fn on_interrupt() { 102 unsafe fn on_interrupt() {
103 let r = T::regs(); 103 let r = T::regs();
104 let s = T::state(); 104 let s = T::state();
@@ -123,7 +123,7 @@ impl<'d, T: Instance> Twim<'d, T> {
123 /// Create a new TWI driver. 123 /// Create a new TWI driver.
124 pub fn new( 124 pub fn new(
125 twim: impl Peripheral<P = T> + 'd, 125 twim: impl Peripheral<P = T> + 'd,
126 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 126 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
127 sda: impl Peripheral<P = impl GpioPin> + 'd, 127 sda: impl Peripheral<P = impl GpioPin> + 'd,
128 scl: impl Peripheral<P = impl GpioPin> + 'd, 128 scl: impl Peripheral<P = impl GpioPin> + 'd,
129 config: Config, 129 config: Config,
@@ -750,7 +750,7 @@ pub(crate) mod sealed {
750/// TWIM peripheral instance. 750/// TWIM peripheral instance.
751pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { 751pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static {
752 /// Interrupt for this peripheral. 752 /// Interrupt for this peripheral.
753 type Interrupt: Interrupt; 753 type Interrupt: interrupt::typelevel::Interrupt;
754} 754}
755 755
756macro_rules! impl_twim { 756macro_rules! impl_twim {
@@ -765,7 +765,7 @@ macro_rules! impl_twim {
765 } 765 }
766 } 766 }
767 impl crate::twim::Instance for peripherals::$type { 767 impl crate::twim::Instance for peripherals::$type {
768 type Interrupt = crate::interrupt::$irq; 768 type Interrupt = crate::interrupt::typelevel::$irq;
769 } 769 }
770 }; 770 };
771} 771}
diff --git a/embassy-nrf/src/twis.rs b/embassy-nrf/src/twis.rs
index 752a8c046..a115d5616 100644
--- a/embassy-nrf/src/twis.rs
+++ b/embassy-nrf/src/twis.rs
@@ -15,9 +15,9 @@ use embassy_time::{Duration, Instant};
15 15
16use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; 16use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
17use crate::gpio::Pin as GpioPin; 17use crate::gpio::Pin as GpioPin;
18use crate::interrupt::{self, Interrupt}; 18use crate::interrupt::typelevel::Interrupt;
19use crate::util::slice_in_ram_or; 19use crate::util::slice_in_ram_or;
20use crate::{gpio, pac, Peripheral}; 20use crate::{gpio, interrupt, pac, Peripheral};
21 21
22/// TWIS config. 22/// TWIS config.
23#[non_exhaustive] 23#[non_exhaustive]
@@ -114,7 +114,7 @@ pub struct InterruptHandler<T: Instance> {
114 _phantom: PhantomData<T>, 114 _phantom: PhantomData<T>,
115} 115}
116 116
117impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 117impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
118 unsafe fn on_interrupt() { 118 unsafe fn on_interrupt() {
119 let r = T::regs(); 119 let r = T::regs();
120 let s = T::state(); 120 let s = T::state();
@@ -143,7 +143,7 @@ impl<'d, T: Instance> Twis<'d, T> {
143 /// Create a new TWIS driver. 143 /// Create a new TWIS driver.
144 pub fn new( 144 pub fn new(
145 twis: impl Peripheral<P = T> + 'd, 145 twis: impl Peripheral<P = T> + 'd,
146 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 146 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
147 sda: impl Peripheral<P = impl GpioPin> + 'd, 147 sda: impl Peripheral<P = impl GpioPin> + 'd,
148 scl: impl Peripheral<P = impl GpioPin> + 'd, 148 scl: impl Peripheral<P = impl GpioPin> + 'd,
149 config: Config, 149 config: Config,
@@ -778,7 +778,7 @@ pub(crate) mod sealed {
778/// TWIS peripheral instance. 778/// TWIS peripheral instance.
779pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static { 779pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static {
780 /// Interrupt for this peripheral. 780 /// Interrupt for this peripheral.
781 type Interrupt: Interrupt; 781 type Interrupt: interrupt::typelevel::Interrupt;
782} 782}
783 783
784macro_rules! impl_twis { 784macro_rules! impl_twis {
@@ -793,7 +793,7 @@ macro_rules! impl_twis {
793 } 793 }
794 } 794 }
795 impl crate::twis::Instance for peripherals::$type { 795 impl crate::twis::Instance for peripherals::$type {
796 type Interrupt = crate::interrupt::$irq; 796 type Interrupt = crate::interrupt::typelevel::$irq;
797 } 797 }
798 }; 798 };
799} 799}
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index 6c6941ee8..85a951ae0 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -27,11 +27,11 @@ pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Pari
27use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE}; 27use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
28use crate::gpio::sealed::Pin as _; 28use crate::gpio::sealed::Pin as _;
29use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits}; 29use crate::gpio::{self, AnyPin, Pin as GpioPin, PselBits};
30use crate::interrupt::{self, Interrupt}; 30use crate::interrupt::typelevel::Interrupt;
31use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; 31use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
32use crate::timer::{Frequency, Instance as TimerInstance, Timer}; 32use crate::timer::{Frequency, Instance as TimerInstance, Timer};
33use crate::util::slice_in_ram_or; 33use crate::util::slice_in_ram_or;
34use crate::{pac, Peripheral}; 34use crate::{interrupt, pac, Peripheral};
35 35
36/// UARTE config. 36/// UARTE config.
37#[derive(Clone)] 37#[derive(Clone)]
@@ -68,7 +68,7 @@ pub struct InterruptHandler<T: Instance> {
68 _phantom: PhantomData<T>, 68 _phantom: PhantomData<T>,
69} 69}
70 70
71impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 71impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
72 unsafe fn on_interrupt() { 72 unsafe fn on_interrupt() {
73 let r = T::regs(); 73 let r = T::regs();
74 let s = T::state(); 74 let s = T::state();
@@ -108,7 +108,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
108 /// Create a new UARTE without hardware flow control 108 /// Create a new UARTE without hardware flow control
109 pub fn new( 109 pub fn new(
110 uarte: impl Peripheral<P = T> + 'd, 110 uarte: impl Peripheral<P = T> + 'd,
111 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 111 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
112 rxd: impl Peripheral<P = impl GpioPin> + 'd, 112 rxd: impl Peripheral<P = impl GpioPin> + 'd,
113 txd: impl Peripheral<P = impl GpioPin> + 'd, 113 txd: impl Peripheral<P = impl GpioPin> + 'd,
114 config: Config, 114 config: Config,
@@ -120,7 +120,7 @@ impl<'d, T: Instance> Uarte<'d, T> {
120 /// Create a new UARTE with hardware flow control (RTS/CTS) 120 /// Create a new UARTE with hardware flow control (RTS/CTS)
121 pub fn new_with_rtscts( 121 pub fn new_with_rtscts(
122 uarte: impl Peripheral<P = T> + 'd, 122 uarte: impl Peripheral<P = T> + 'd,
123 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 123 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
124 rxd: impl Peripheral<P = impl GpioPin> + 'd, 124 rxd: impl Peripheral<P = impl GpioPin> + 'd,
125 txd: impl Peripheral<P = impl GpioPin> + 'd, 125 txd: impl Peripheral<P = impl GpioPin> + 'd,
126 cts: impl Peripheral<P = impl GpioPin> + 'd, 126 cts: impl Peripheral<P = impl GpioPin> + 'd,
@@ -313,7 +313,7 @@ impl<'d, T: Instance> UarteTx<'d, T> {
313 /// Create a new tx-only UARTE without hardware flow control 313 /// Create a new tx-only UARTE without hardware flow control
314 pub fn new( 314 pub fn new(
315 uarte: impl Peripheral<P = T> + 'd, 315 uarte: impl Peripheral<P = T> + 'd,
316 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 316 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
317 txd: impl Peripheral<P = impl GpioPin> + 'd, 317 txd: impl Peripheral<P = impl GpioPin> + 'd,
318 config: Config, 318 config: Config,
319 ) -> Self { 319 ) -> Self {
@@ -324,7 +324,7 @@ impl<'d, T: Instance> UarteTx<'d, T> {
324 /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) 324 /// Create a new tx-only UARTE with hardware flow control (RTS/CTS)
325 pub fn new_with_rtscts( 325 pub fn new_with_rtscts(
326 uarte: impl Peripheral<P = T> + 'd, 326 uarte: impl Peripheral<P = T> + 'd,
327 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 327 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
328 txd: impl Peripheral<P = impl GpioPin> + 'd, 328 txd: impl Peripheral<P = impl GpioPin> + 'd,
329 cts: impl Peripheral<P = impl GpioPin> + 'd, 329 cts: impl Peripheral<P = impl GpioPin> + 'd,
330 config: Config, 330 config: Config,
@@ -509,7 +509,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
509 /// Create a new rx-only UARTE without hardware flow control 509 /// Create a new rx-only UARTE without hardware flow control
510 pub fn new( 510 pub fn new(
511 uarte: impl Peripheral<P = T> + 'd, 511 uarte: impl Peripheral<P = T> + 'd,
512 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 512 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
513 rxd: impl Peripheral<P = impl GpioPin> + 'd, 513 rxd: impl Peripheral<P = impl GpioPin> + 'd,
514 config: Config, 514 config: Config,
515 ) -> Self { 515 ) -> Self {
@@ -520,7 +520,7 @@ impl<'d, T: Instance> UarteRx<'d, T> {
520 /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) 520 /// Create a new rx-only UARTE with hardware flow control (RTS/CTS)
521 pub fn new_with_rtscts( 521 pub fn new_with_rtscts(
522 uarte: impl Peripheral<P = T> + 'd, 522 uarte: impl Peripheral<P = T> + 'd,
523 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 523 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
524 rxd: impl Peripheral<P = impl GpioPin> + 'd, 524 rxd: impl Peripheral<P = impl GpioPin> + 'd,
525 rts: impl Peripheral<P = impl GpioPin> + 'd, 525 rts: impl Peripheral<P = impl GpioPin> + 'd,
526 config: Config, 526 config: Config,
@@ -889,7 +889,7 @@ pub(crate) mod sealed {
889/// UARTE peripheral instance. 889/// UARTE peripheral instance.
890pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 890pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
891 /// Interrupt for this peripheral. 891 /// Interrupt for this peripheral.
892 type Interrupt: Interrupt; 892 type Interrupt: interrupt::typelevel::Interrupt;
893} 893}
894 894
895macro_rules! impl_uarte { 895macro_rules! impl_uarte {
@@ -908,7 +908,7 @@ macro_rules! impl_uarte {
908 } 908 }
909 } 909 }
910 impl crate::uarte::Instance for peripherals::$type { 910 impl crate::uarte::Instance for peripherals::$type {
911 type Interrupt = crate::interrupt::$irq; 911 type Interrupt = crate::interrupt::typelevel::$irq;
912 } 912 }
913 }; 913 };
914} 914}
diff --git a/embassy-nrf/src/usb/mod.rs b/embassy-nrf/src/usb/mod.rs
index 3c62b4452..76cf40ac7 100644
--- a/embassy-nrf/src/usb/mod.rs
+++ b/embassy-nrf/src/usb/mod.rs
@@ -18,9 +18,9 @@ use embassy_usb_driver::{Direction, EndpointAddress, EndpointError, EndpointInfo
18use pac::usbd::RegisterBlock; 18use pac::usbd::RegisterBlock;
19 19
20use self::vbus_detect::VbusDetect; 20use self::vbus_detect::VbusDetect;
21use crate::interrupt::{self, Interrupt}; 21use crate::interrupt::typelevel::Interrupt;
22use crate::util::slice_in_ram; 22use crate::util::slice_in_ram;
23use crate::{pac, Peripheral}; 23use crate::{interrupt, pac, Peripheral};
24 24
25const NEW_AW: AtomicWaker = AtomicWaker::new(); 25const NEW_AW: AtomicWaker = AtomicWaker::new();
26static BUS_WAKER: AtomicWaker = NEW_AW; 26static BUS_WAKER: AtomicWaker = NEW_AW;
@@ -34,7 +34,7 @@ pub struct InterruptHandler<T: Instance> {
34 _phantom: PhantomData<T>, 34 _phantom: PhantomData<T>,
35} 35}
36 36
37impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 37impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
38 unsafe fn on_interrupt() { 38 unsafe fn on_interrupt() {
39 let regs = T::regs(); 39 let regs = T::regs();
40 40
@@ -98,7 +98,7 @@ impl<'d, T: Instance, V: VbusDetect> Driver<'d, T, V> {
98 /// Create a new USB driver. 98 /// Create a new USB driver.
99 pub fn new( 99 pub fn new(
100 usb: impl Peripheral<P = T> + 'd, 100 usb: impl Peripheral<P = T> + 'd,
101 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 101 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
102 vbus_detect: V, 102 vbus_detect: V,
103 ) -> Self { 103 ) -> Self {
104 into_ref!(usb); 104 into_ref!(usb);
@@ -804,7 +804,7 @@ pub(crate) mod sealed {
804/// USB peripheral instance. 804/// USB peripheral instance.
805pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send { 805pub trait Instance: Peripheral<P = Self> + sealed::Instance + 'static + Send {
806 /// Interrupt for this peripheral. 806 /// Interrupt for this peripheral.
807 type Interrupt: Interrupt; 807 type Interrupt: interrupt::typelevel::Interrupt;
808} 808}
809 809
810macro_rules! impl_usb { 810macro_rules! impl_usb {
@@ -815,7 +815,7 @@ macro_rules! impl_usb {
815 } 815 }
816 } 816 }
817 impl crate::usb::Instance for peripherals::$type { 817 impl crate::usb::Instance for peripherals::$type {
818 type Interrupt = crate::interrupt::$irq; 818 type Interrupt = crate::interrupt::typelevel::$irq;
819 } 819 }
820 }; 820 };
821} 821}
diff --git a/embassy-nrf/src/usb/vbus_detect.rs b/embassy-nrf/src/usb/vbus_detect.rs
index a6a959905..a05e5aa52 100644
--- a/embassy-nrf/src/usb/vbus_detect.rs
+++ b/embassy-nrf/src/usb/vbus_detect.rs
@@ -7,8 +7,8 @@ use core::task::Poll;
7use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
8 8
9use super::BUS_WAKER; 9use super::BUS_WAKER;
10use crate::interrupt::{self, Interrupt}; 10use crate::interrupt::typelevel::Interrupt;
11use crate::pac; 11use crate::{interrupt, pac};
12 12
13/// Trait for detecting USB VBUS power. 13/// Trait for detecting USB VBUS power.
14/// 14///
@@ -29,9 +29,9 @@ pub trait VbusDetect {
29} 29}
30 30
31#[cfg(not(feature = "_nrf5340"))] 31#[cfg(not(feature = "_nrf5340"))]
32type UsbRegIrq = interrupt::POWER_CLOCK; 32type UsbRegIrq = interrupt::typelevel::POWER_CLOCK;
33#[cfg(feature = "_nrf5340")] 33#[cfg(feature = "_nrf5340")]
34type UsbRegIrq = interrupt::USBREGULATOR; 34type UsbRegIrq = interrupt::typelevel::USBREGULATOR;
35 35
36#[cfg(not(feature = "_nrf5340"))] 36#[cfg(not(feature = "_nrf5340"))]
37type UsbRegPeri = pac::POWER; 37type UsbRegPeri = pac::POWER;
@@ -43,7 +43,7 @@ pub struct InterruptHandler {
43 _private: (), 43 _private: (),
44} 44}
45 45
46impl interrupt::Handler<UsbRegIrq> for InterruptHandler { 46impl interrupt::typelevel::Handler<UsbRegIrq> for InterruptHandler {
47 unsafe fn on_interrupt() { 47 unsafe fn on_interrupt() {
48 let regs = unsafe { &*UsbRegPeri::ptr() }; 48 let regs = unsafe { &*UsbRegPeri::ptr() };
49 49
@@ -77,7 +77,7 @@ static POWER_WAKER: AtomicWaker = AtomicWaker::new();
77 77
78impl HardwareVbusDetect { 78impl HardwareVbusDetect {
79 /// Create a new `VbusDetectNative`. 79 /// Create a new `VbusDetectNative`.
80 pub fn new(_irq: impl interrupt::Binding<UsbRegIrq, InterruptHandler> + 'static) -> Self { 80 pub fn new(_irq: impl interrupt::typelevel::Binding<UsbRegIrq, InterruptHandler> + 'static) -> Self {
81 let regs = unsafe { &*UsbRegPeri::ptr() }; 81 let regs = unsafe { &*UsbRegPeri::ptr() };
82 82
83 UsbRegIrq::unpend(); 83 UsbRegIrq::unpend();
diff --git a/embassy-rp/src/adc.rs b/embassy-rp/src/adc.rs
index 86a353670..f29c4dfe1 100644
--- a/embassy-rp/src/adc.rs
+++ b/embassy-rp/src/adc.rs
@@ -3,14 +3,14 @@ use core::marker::PhantomData;
3use core::sync::atomic::{compiler_fence, Ordering}; 3use core::sync::atomic::{compiler_fence, Ordering};
4use core::task::Poll; 4use core::task::Poll;
5 5
6use embassy_cortex_m::interrupt::{Binding, Interrupt};
7use embassy_sync::waitqueue::AtomicWaker; 6use embassy_sync::waitqueue::AtomicWaker;
8use embedded_hal_02::adc::{Channel, OneShot}; 7use embedded_hal_02::adc::{Channel, OneShot};
9 8
10use crate::gpio::Pin; 9use crate::gpio::Pin;
11use crate::interrupt::{self, ADC_IRQ_FIFO}; 10use crate::interrupt::typelevel::Binding;
11use crate::interrupt::InterruptExt;
12use crate::peripherals::ADC; 12use crate::peripherals::ADC;
13use crate::{pac, peripherals, Peripheral}; 13use crate::{interrupt, pac, peripherals, Peripheral};
14static WAKER: AtomicWaker = AtomicWaker::new(); 14static WAKER: AtomicWaker = AtomicWaker::new();
15 15
16#[derive(Debug, Clone, Copy, PartialEq, Eq)] 16#[derive(Debug, Clone, Copy, PartialEq, Eq)]
@@ -47,7 +47,7 @@ impl<'d> Adc<'d> {
47 47
48 pub fn new( 48 pub fn new(
49 _inner: impl Peripheral<P = ADC> + 'd, 49 _inner: impl Peripheral<P = ADC> + 'd,
50 _irq: impl Binding<ADC_IRQ_FIFO, InterruptHandler>, 50 _irq: impl Binding<interrupt::typelevel::ADC_IRQ_FIFO, InterruptHandler>,
51 _config: Config, 51 _config: Config,
52 ) -> Self { 52 ) -> Self {
53 unsafe { 53 unsafe {
@@ -62,10 +62,8 @@ impl<'d> Adc<'d> {
62 } 62 }
63 63
64 // Setup IRQ 64 // Setup IRQ
65 unsafe { 65 interrupt::ADC_IRQ_FIFO.unpend();
66 ADC_IRQ_FIFO::unpend(); 66 unsafe { interrupt::ADC_IRQ_FIFO.enable() };
67 ADC_IRQ_FIFO::enable();
68 };
69 67
70 Self { phantom: PhantomData } 68 Self { phantom: PhantomData }
71 } 69 }
@@ -164,7 +162,7 @@ pub struct InterruptHandler {
164 _empty: (), 162 _empty: (),
165} 163}
166 164
167impl interrupt::Handler<ADC_IRQ_FIFO> for InterruptHandler { 165impl interrupt::typelevel::Handler<interrupt::typelevel::ADC_IRQ_FIFO> for InterruptHandler {
168 unsafe fn on_interrupt() { 166 unsafe fn on_interrupt() {
169 let r = Adc::regs(); 167 let r = Adc::regs();
170 r.inte().write(|w| w.set_fifo(false)); 168 r.inte().write(|w| w.set_fifo(false));
diff --git a/embassy-rp/src/dma.rs b/embassy-rp/src/dma.rs
index 1cbb4651a..042ca99a9 100644
--- a/embassy-rp/src/dma.rs
+++ b/embassy-rp/src/dma.rs
@@ -4,11 +4,11 @@ use core::pin::Pin;
4use core::sync::atomic::{compiler_fence, Ordering}; 4use core::sync::atomic::{compiler_fence, Ordering};
5use core::task::{Context, Poll}; 5use core::task::{Context, Poll};
6 6
7use embassy_cortex_m::interrupt::Interrupt;
8use embassy_hal_common::{impl_peripheral, into_ref, Peripheral, PeripheralRef}; 7use embassy_hal_common::{impl_peripheral, into_ref, Peripheral, PeripheralRef};
9use embassy_sync::waitqueue::AtomicWaker; 8use embassy_sync::waitqueue::AtomicWaker;
10use pac::dma::vals::DataSize; 9use pac::dma::vals::DataSize;
11 10
11use crate::interrupt::InterruptExt;
12use crate::pac::dma::vals; 12use crate::pac::dma::vals;
13use crate::{interrupt, pac, peripherals}; 13use crate::{interrupt, pac, peripherals};
14 14
@@ -29,12 +29,12 @@ unsafe fn DMA_IRQ_0() {
29} 29}
30 30
31pub(crate) unsafe fn init() { 31pub(crate) unsafe fn init() {
32 interrupt::DMA_IRQ_0::disable(); 32 interrupt::DMA_IRQ_0.disable();
33 interrupt::DMA_IRQ_0::set_priority(interrupt::Priority::P3); 33 interrupt::DMA_IRQ_0.set_priority(interrupt::Priority::P3);
34 34
35 pac::DMA.inte0().write(|w| w.set_inte0(0xFFFF)); 35 pac::DMA.inte0().write(|w| w.set_inte0(0xFFFF));
36 36
37 interrupt::DMA_IRQ_0::enable(); 37 interrupt::DMA_IRQ_0.enable();
38} 38}
39 39
40pub unsafe fn read<'a, C: Channel, W: Word>( 40pub unsafe fn read<'a, C: Channel, W: Word>(
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index 91cef8609..ebd932f50 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -3,10 +3,10 @@ use core::future::Future;
3use core::pin::Pin as FuturePin; 3use core::pin::Pin as FuturePin;
4use core::task::{Context, Poll}; 4use core::task::{Context, Poll};
5 5
6use embassy_cortex_m::interrupt::Interrupt;
7use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef}; 6use embassy_hal_common::{impl_peripheral, into_ref, PeripheralRef};
8use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
9 8
9use crate::interrupt::InterruptExt;
10use crate::pac::common::{Reg, RW}; 10use crate::pac::common::{Reg, RW};
11use crate::pac::SIO; 11use crate::pac::SIO;
12use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; 12use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
@@ -137,9 +137,9 @@ pub enum InterruptTrigger {
137} 137}
138 138
139pub(crate) unsafe fn init() { 139pub(crate) unsafe fn init() {
140 interrupt::IO_IRQ_BANK0::disable(); 140 interrupt::IO_IRQ_BANK0.disable();
141 interrupt::IO_IRQ_BANK0::set_priority(interrupt::Priority::P3); 141 interrupt::IO_IRQ_BANK0.set_priority(interrupt::Priority::P3);
142 interrupt::IO_IRQ_BANK0::enable(); 142 interrupt::IO_IRQ_BANK0.enable();
143} 143}
144 144
145#[interrupt] 145#[interrupt]
diff --git a/embassy-rp/src/i2c.rs b/embassy-rp/src/i2c.rs
index 124f1c00a..ce9a082a2 100644
--- a/embassy-rp/src/i2c.rs
+++ b/embassy-rp/src/i2c.rs
@@ -2,14 +2,14 @@ use core::future;
2use core::marker::PhantomData; 2use core::marker::PhantomData;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use embassy_cortex_m::interrupt::{self, Binding, Interrupt};
6use embassy_hal_common::{into_ref, PeripheralRef}; 5use embassy_hal_common::{into_ref, PeripheralRef};
7use embassy_sync::waitqueue::AtomicWaker; 6use embassy_sync::waitqueue::AtomicWaker;
8use pac::i2c; 7use pac::i2c;
9 8
10use crate::gpio::sealed::Pin; 9use crate::gpio::sealed::Pin;
11use crate::gpio::AnyPin; 10use crate::gpio::AnyPin;
12use crate::{pac, peripherals, Peripheral}; 11use crate::interrupt::typelevel::{Binding, Interrupt};
12use crate::{interrupt, pac, peripherals, Peripheral};
13 13
14/// I2C error abort reason 14/// I2C error abort reason
15#[derive(Debug)] 15#[derive(Debug)]
@@ -312,7 +312,7 @@ pub struct InterruptHandler<T: Instance> {
312 _uart: PhantomData<T>, 312 _uart: PhantomData<T>,
313} 313}
314 314
315impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 315impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
316 // Mask interrupts and wake any task waiting for this interrupt 316 // Mask interrupts and wake any task waiting for this interrupt
317 unsafe fn on_interrupt() { 317 unsafe fn on_interrupt() {
318 let i2c = T::regs(); 318 let i2c = T::regs();
@@ -760,14 +760,15 @@ fn i2c_reserved_addr(addr: u16) -> bool {
760} 760}
761 761
762mod sealed { 762mod sealed {
763 use embassy_cortex_m::interrupt::Interrupt;
764 use embassy_sync::waitqueue::AtomicWaker; 763 use embassy_sync::waitqueue::AtomicWaker;
765 764
765 use crate::interrupt;
766
766 pub trait Instance { 767 pub trait Instance {
767 const TX_DREQ: u8; 768 const TX_DREQ: u8;
768 const RX_DREQ: u8; 769 const RX_DREQ: u8;
769 770
770 type Interrupt: Interrupt; 771 type Interrupt: interrupt::typelevel::Interrupt;
771 772
772 fn regs() -> crate::pac::i2c::I2c; 773 fn regs() -> crate::pac::i2c::I2c;
773 fn reset() -> crate::pac::resets::regs::Peripherals; 774 fn reset() -> crate::pac::resets::regs::Peripherals;
@@ -803,7 +804,7 @@ macro_rules! impl_instance {
803 const TX_DREQ: u8 = $tx_dreq; 804 const TX_DREQ: u8 = $tx_dreq;
804 const RX_DREQ: u8 = $rx_dreq; 805 const RX_DREQ: u8 = $rx_dreq;
805 806
806 type Interrupt = crate::interrupt::$irq; 807 type Interrupt = crate::interrupt::typelevel::$irq;
807 808
808 #[inline] 809 #[inline]
809 fn regs() -> pac::i2c::I2c { 810 fn regs() -> pac::i2c::I2c {
diff --git a/embassy-rp/src/interrupt.rs b/embassy-rp/src/interrupt.rs
deleted file mode 100644
index c9298644d..000000000
--- a/embassy-rp/src/interrupt.rs
+++ /dev/null
@@ -1,65 +0,0 @@
1//! Interrupt definitions and macros to bind them.
2pub use cortex_m::interrupt::{CriticalSection, Mutex};
3use embassy_cortex_m::interrupt::_export::declare;
4pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority};
5
6use crate::pac::Interrupt as InterruptEnum;
7declare!(TIMER_IRQ_0);
8declare!(TIMER_IRQ_1);
9declare!(TIMER_IRQ_2);
10declare!(TIMER_IRQ_3);
11declare!(PWM_IRQ_WRAP);
12declare!(USBCTRL_IRQ);
13declare!(XIP_IRQ);
14declare!(PIO0_IRQ_0);
15declare!(PIO0_IRQ_1);
16declare!(PIO1_IRQ_0);
17declare!(PIO1_IRQ_1);
18declare!(DMA_IRQ_0);
19declare!(DMA_IRQ_1);
20declare!(IO_IRQ_BANK0);
21declare!(IO_IRQ_QSPI);
22declare!(SIO_IRQ_PROC0);
23declare!(SIO_IRQ_PROC1);
24declare!(CLOCKS_IRQ);
25declare!(SPI0_IRQ);
26declare!(SPI1_IRQ);
27declare!(UART0_IRQ);
28declare!(UART1_IRQ);
29declare!(ADC_IRQ_FIFO);
30declare!(I2C0_IRQ);
31declare!(I2C1_IRQ);
32declare!(RTC_IRQ);
33declare!(SWI_IRQ_0);
34declare!(SWI_IRQ_1);
35declare!(SWI_IRQ_2);
36declare!(SWI_IRQ_3);
37declare!(SWI_IRQ_4);
38declare!(SWI_IRQ_5);
39
40/// Macro to bind interrupts to handlers.
41///
42/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
43/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
44/// prove at compile-time that the right interrupts have been bound.
45// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
46#[macro_export]
47macro_rules! bind_interrupts {
48 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
49 $vis struct $name;
50
51 $(
52 #[allow(non_snake_case)]
53 #[no_mangle]
54 unsafe extern "C" fn $irq() {
55 $(
56 <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt();
57 )*
58 }
59
60 $(
61 unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {}
62 )*
63 )*
64 };
65}
diff --git a/embassy-rp/src/lib.rs b/embassy-rp/src/lib.rs
index 4e4542d70..70a410ef9 100644
--- a/embassy-rp/src/lib.rs
+++ b/embassy-rp/src/lib.rs
@@ -16,7 +16,6 @@ pub mod flash;
16mod float; 16mod float;
17pub mod gpio; 17pub mod gpio;
18pub mod i2c; 18pub mod i2c;
19pub mod interrupt;
20pub mod multicore; 19pub mod multicore;
21pub mod pwm; 20pub mod pwm;
22mod reset; 21mod reset;
@@ -38,13 +37,74 @@ pub mod relocate;
38 37
39// Reexports 38// Reexports
40pub use embassy_cortex_m::executor; 39pub use embassy_cortex_m::executor;
41pub use embassy_cortex_m::interrupt::_export::interrupt;
42pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 40pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
43#[cfg(feature = "unstable-pac")] 41#[cfg(feature = "unstable-pac")]
44pub use rp_pac as pac; 42pub use rp_pac as pac;
45#[cfg(not(feature = "unstable-pac"))] 43#[cfg(not(feature = "unstable-pac"))]
46pub(crate) use rp_pac as pac; 44pub(crate) use rp_pac as pac;
47 45
46embassy_cortex_m::interrupt_mod!(
47 TIMER_IRQ_0,
48 TIMER_IRQ_1,
49 TIMER_IRQ_2,
50 TIMER_IRQ_3,
51 PWM_IRQ_WRAP,
52 USBCTRL_IRQ,
53 XIP_IRQ,
54 PIO0_IRQ_0,
55 PIO0_IRQ_1,
56 PIO1_IRQ_0,
57 PIO1_IRQ_1,
58 DMA_IRQ_0,
59 DMA_IRQ_1,
60 IO_IRQ_BANK0,
61 IO_IRQ_QSPI,
62 SIO_IRQ_PROC0,
63 SIO_IRQ_PROC1,
64 CLOCKS_IRQ,
65 SPI0_IRQ,
66 SPI1_IRQ,
67 UART0_IRQ,
68 UART1_IRQ,
69 ADC_IRQ_FIFO,
70 I2C0_IRQ,
71 I2C1_IRQ,
72 RTC_IRQ,
73 SWI_IRQ_0,
74 SWI_IRQ_1,
75 SWI_IRQ_2,
76 SWI_IRQ_3,
77 SWI_IRQ_4,
78 SWI_IRQ_5,
79);
80
81/// Macro to bind interrupts to handlers.
82///
83/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
84/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
85/// prove at compile-time that the right interrupts have been bound.
86// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
87#[macro_export]
88macro_rules! bind_interrupts {
89 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
90 $vis struct $name;
91
92 $(
93 #[allow(non_snake_case)]
94 #[no_mangle]
95 unsafe extern "C" fn $irq() {
96 $(
97 <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt();
98 )*
99 }
100
101 $(
102 unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {}
103 )*
104 )*
105 };
106}
107
48embassy_hal_common::peripherals! { 108embassy_hal_common::peripherals! {
49 PIN_0, 109 PIN_0,
50 PIN_1, 110 PIN_1,
diff --git a/embassy-rp/src/multicore.rs b/embassy-rp/src/multicore.rs
index 807fda57b..e1246ce8f 100644
--- a/embassy-rp/src/multicore.rs
+++ b/embassy-rp/src/multicore.rs
@@ -50,7 +50,7 @@
50use core::mem::ManuallyDrop; 50use core::mem::ManuallyDrop;
51use core::sync::atomic::{compiler_fence, AtomicBool, Ordering}; 51use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
52 52
53use crate::interrupt::Interrupt; 53use crate::interrupt::InterruptExt;
54use crate::peripherals::CORE1; 54use crate::peripherals::CORE1;
55use crate::{gpio, interrupt, pac}; 55use crate::{gpio, interrupt, pac};
56 56
@@ -156,7 +156,7 @@ where
156 156
157 IS_CORE1_INIT.store(true, Ordering::Release); 157 IS_CORE1_INIT.store(true, Ordering::Release);
158 // Enable fifo interrupt on CORE1 for `pause` functionality. 158 // Enable fifo interrupt on CORE1 for `pause` functionality.
159 unsafe { interrupt::SIO_IRQ_PROC1::enable() }; 159 unsafe { interrupt::SIO_IRQ_PROC1.enable() };
160 160
161 entry() 161 entry()
162 } 162 }
diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs
index 93e5bd34b..f0a5c17a9 100644
--- a/embassy-rp/src/pio.rs
+++ b/embassy-rp/src/pio.rs
@@ -5,7 +5,6 @@ use core::sync::atomic::{compiler_fence, Ordering};
5use core::task::{Context, Poll}; 5use core::task::{Context, Poll};
6 6
7use atomic_polyfill::{AtomicU32, AtomicU8}; 7use atomic_polyfill::{AtomicU32, AtomicU8};
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 8use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
10use embassy_sync::waitqueue::AtomicWaker; 9use embassy_sync::waitqueue::AtomicWaker;
11use fixed::types::extra::U8; 10use fixed::types::extra::U8;
@@ -17,6 +16,7 @@ use pio::{SideSet, Wrap};
17use crate::dma::{Channel, Transfer, Word}; 16use crate::dma::{Channel, Transfer, Word};
18use crate::gpio::sealed::Pin as SealedPin; 17use crate::gpio::sealed::Pin as SealedPin;
19use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate}; 18use crate::gpio::{self, AnyPin, Drive, Level, Pull, SlewRate};
19use crate::interrupt::InterruptExt;
20use crate::pac::dma::vals::TreqSel; 20use crate::pac::dma::vals::TreqSel;
21use crate::relocate::RelocatedProgram; 21use crate::relocate::RelocatedProgram;
22use crate::{interrupt, pac, peripherals, pio_instr_util, RegExt}; 22use crate::{interrupt, pac, peripherals, pio_instr_util, RegExt};
@@ -110,15 +110,15 @@ unsafe fn PIO1_IRQ_0() {
110} 110}
111 111
112pub(crate) unsafe fn init() { 112pub(crate) unsafe fn init() {
113 interrupt::PIO0_IRQ_0::disable(); 113 interrupt::PIO0_IRQ_0.disable();
114 interrupt::PIO0_IRQ_0::set_priority(interrupt::Priority::P3); 114 interrupt::PIO0_IRQ_0.set_priority(interrupt::Priority::P3);
115 pac::PIO0.irqs(0).inte().write(|m| m.0 = 0); 115 pac::PIO0.irqs(0).inte().write(|m| m.0 = 0);
116 interrupt::PIO0_IRQ_0::enable(); 116 interrupt::PIO0_IRQ_0.enable();
117 117
118 interrupt::PIO1_IRQ_0::disable(); 118 interrupt::PIO1_IRQ_0.disable();
119 interrupt::PIO1_IRQ_0::set_priority(interrupt::Priority::P3); 119 interrupt::PIO1_IRQ_0.set_priority(interrupt::Priority::P3);
120 pac::PIO1.irqs(0).inte().write(|m| m.0 = 0); 120 pac::PIO1.irqs(0).inte().write(|m| m.0 = 0);
121 interrupt::PIO1_IRQ_0::enable(); 121 interrupt::PIO1_IRQ_0.enable();
122} 122}
123 123
124/// Future that waits for TX-FIFO to become writable 124/// Future that waits for TX-FIFO to become writable
diff --git a/embassy-rp/src/timer.rs b/embassy-rp/src/timer.rs
index 68793950f..37f86c930 100644
--- a/embassy-rp/src/timer.rs
+++ b/embassy-rp/src/timer.rs
@@ -6,7 +6,7 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
6use embassy_sync::blocking_mutex::Mutex; 6use embassy_sync::blocking_mutex::Mutex;
7use embassy_time::driver::{AlarmHandle, Driver}; 7use embassy_time::driver::{AlarmHandle, Driver};
8 8
9use crate::interrupt::Interrupt; 9use crate::interrupt::InterruptExt;
10use crate::{interrupt, pac}; 10use crate::{interrupt, pac};
11 11
12struct AlarmState { 12struct AlarmState {
@@ -145,10 +145,10 @@ pub unsafe fn init() {
145 w.set_alarm(2, true); 145 w.set_alarm(2, true);
146 w.set_alarm(3, true); 146 w.set_alarm(3, true);
147 }); 147 });
148 interrupt::TIMER_IRQ_0::enable(); 148 interrupt::TIMER_IRQ_0.enable();
149 interrupt::TIMER_IRQ_1::enable(); 149 interrupt::TIMER_IRQ_1.enable();
150 interrupt::TIMER_IRQ_2::enable(); 150 interrupt::TIMER_IRQ_2.enable();
151 interrupt::TIMER_IRQ_3::enable(); 151 interrupt::TIMER_IRQ_3.enable();
152} 152}
153 153
154#[interrupt] 154#[interrupt]
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs
index bb808c467..6660d5dc9 100644
--- a/embassy-rp/src/uart/buffered.rs
+++ b/embassy-rp/src/uart/buffered.rs
@@ -3,14 +3,14 @@ use core::slice;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use atomic_polyfill::{AtomicU8, Ordering}; 5use atomic_polyfill::{AtomicU8, Ordering};
6use embassy_cortex_m::interrupt::{self, Binding, Interrupt};
7use embassy_hal_common::atomic_ring_buffer::RingBuffer; 6use embassy_hal_common::atomic_ring_buffer::RingBuffer;
8use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
9use embassy_time::{Duration, Timer}; 8use embassy_time::{Duration, Timer};
10 9
11use super::*; 10use super::*;
12use crate::clocks::clk_peri_freq; 11use crate::clocks::clk_peri_freq;
13use crate::RegExt; 12use crate::interrupt::typelevel::{Binding, Interrupt};
13use crate::{interrupt, RegExt};
14 14
15pub struct State { 15pub struct State {
16 tx_waker: AtomicWaker, 16 tx_waker: AtomicWaker,
@@ -485,7 +485,7 @@ pub struct BufferedInterruptHandler<T: Instance> {
485 _uart: PhantomData<T>, 485 _uart: PhantomData<T>,
486} 486}
487 487
488impl<T: Instance> interrupt::Handler<T::Interrupt> for BufferedInterruptHandler<T> { 488impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for BufferedInterruptHandler<T> {
489 unsafe fn on_interrupt() { 489 unsafe fn on_interrupt() {
490 let r = T::regs(); 490 let r = T::regs();
491 if r.uartdmacr().read().rxdmae() { 491 if r.uartdmacr().read().rxdmae() {
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index a83d94e49..5e3ae8a25 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -3,7 +3,6 @@ use core::marker::PhantomData;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use atomic_polyfill::{AtomicU16, Ordering}; 5use atomic_polyfill::{AtomicU16, Ordering};
6use embassy_cortex_m::interrupt::{self, Binding, Interrupt};
7use embassy_futures::select::{select, Either}; 6use embassy_futures::select::{select, Either};
8use embassy_hal_common::{into_ref, PeripheralRef}; 7use embassy_hal_common::{into_ref, PeripheralRef};
9use embassy_sync::waitqueue::AtomicWaker; 8use embassy_sync::waitqueue::AtomicWaker;
@@ -14,8 +13,9 @@ use crate::clocks::clk_peri_freq;
14use crate::dma::{AnyChannel, Channel}; 13use crate::dma::{AnyChannel, Channel};
15use crate::gpio::sealed::Pin; 14use crate::gpio::sealed::Pin;
16use crate::gpio::AnyPin; 15use crate::gpio::AnyPin;
16use crate::interrupt::typelevel::{Binding, Interrupt};
17use crate::pac::io::vals::{Inover, Outover}; 17use crate::pac::io::vals::{Inover, Outover};
18use crate::{pac, peripherals, Peripheral, RegExt}; 18use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
19 19
20#[cfg(feature = "nightly")] 20#[cfg(feature = "nightly")]
21mod buffered; 21mod buffered;
@@ -332,7 +332,7 @@ pub struct InterruptHandler<T: Instance> {
332 _uart: PhantomData<T>, 332 _uart: PhantomData<T>,
333} 333}
334 334
335impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 335impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
336 unsafe fn on_interrupt() { 336 unsafe fn on_interrupt() {
337 let uart = T::regs(); 337 let uart = T::regs();
338 if !uart.uartdmacr().read().rxdmae() { 338 if !uart.uartdmacr().read().rxdmae() {
@@ -930,7 +930,7 @@ mod sealed {
930 const TX_DREQ: u8; 930 const TX_DREQ: u8;
931 const RX_DREQ: u8; 931 const RX_DREQ: u8;
932 932
933 type Interrupt: crate::interrupt::Interrupt; 933 type Interrupt: interrupt::typelevel::Interrupt;
934 934
935 fn regs() -> pac::uart::Uart; 935 fn regs() -> pac::uart::Uart;
936 936
@@ -968,7 +968,7 @@ macro_rules! impl_instance {
968 const TX_DREQ: u8 = $tx_dreq; 968 const TX_DREQ: u8 = $tx_dreq;
969 const RX_DREQ: u8 = $rx_dreq; 969 const RX_DREQ: u8 = $rx_dreq;
970 970
971 type Interrupt = crate::interrupt::$irq; 971 type Interrupt = crate::interrupt::typelevel::$irq;
972 972
973 fn regs() -> pac::uart::Uart { 973 fn regs() -> pac::uart::Uart {
974 pac::$inst 974 pac::$inst
diff --git a/embassy-rp/src/usb.rs b/embassy-rp/src/usb.rs
index cc88226df..9fb0dfb70 100644
--- a/embassy-rp/src/usb.rs
+++ b/embassy-rp/src/usb.rs
@@ -4,15 +4,14 @@ use core::slice;
4use core::sync::atomic::{compiler_fence, Ordering}; 4use core::sync::atomic::{compiler_fence, Ordering};
5use core::task::Poll; 5use core::task::Poll;
6 6
7use embassy_cortex_m::interrupt::{self, Binding};
8use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
9use embassy_usb_driver as driver; 8use embassy_usb_driver as driver;
10use embassy_usb_driver::{ 9use embassy_usb_driver::{
11 Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported, 10 Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported,
12}; 11};
13 12
14use crate::interrupt::Interrupt; 13use crate::interrupt::typelevel::{Binding, Interrupt};
15use crate::{pac, peripherals, Peripheral, RegExt}; 14use crate::{interrupt, pac, peripherals, Peripheral, RegExt};
16 15
17pub(crate) mod sealed { 16pub(crate) mod sealed {
18 pub trait Instance { 17 pub trait Instance {
@@ -22,7 +21,7 @@ pub(crate) mod sealed {
22} 21}
23 22
24pub trait Instance: sealed::Instance + 'static { 23pub trait Instance: sealed::Instance + 'static {
25 type Interrupt: Interrupt; 24 type Interrupt: interrupt::typelevel::Interrupt;
26} 25}
27 26
28impl crate::usb::sealed::Instance for peripherals::USB { 27impl crate::usb::sealed::Instance for peripherals::USB {
@@ -35,7 +34,7 @@ impl crate::usb::sealed::Instance for peripherals::USB {
35} 34}
36 35
37impl crate::usb::Instance for peripherals::USB { 36impl crate::usb::Instance for peripherals::USB {
38 type Interrupt = crate::interrupt::USBCTRL_IRQ; 37 type Interrupt = crate::interrupt::typelevel::USBCTRL_IRQ;
39} 38}
40 39
41const EP_COUNT: usize = 16; 40const EP_COUNT: usize = 16;
@@ -249,7 +248,7 @@ pub struct InterruptHandler<T: Instance> {
249 _uart: PhantomData<T>, 248 _uart: PhantomData<T>,
250} 249}
251 250
252impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 251impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
253 unsafe fn on_interrupt() { 252 unsafe fn on_interrupt() {
254 let regs = T::regs(); 253 let regs = T::regs();
255 //let x = regs.istr().read().0; 254 //let x = regs.istr().read().0;
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 730c78f5e..267fec387 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -160,13 +160,11 @@ fn main() {
160 } 160 }
161 161
162 g.extend(quote! { 162 g.extend(quote! {
163 pub mod interrupt { 163 embassy_cortex_m::interrupt_mod!(
164 use crate::pac::Interrupt as InterruptEnum;
165 use embassy_cortex_m::interrupt::_export::declare;
166 #( 164 #(
167 declare!(#irqs); 165 #irqs,
168 )* 166 )*
169 } 167 );
170 }); 168 });
171 169
172 // ======== 170 // ========
diff --git a/embassy-stm32/src/dcmi.rs b/embassy-stm32/src/dcmi.rs
index c13915a1b..41305d273 100644
--- a/embassy-stm32/src/dcmi.rs
+++ b/embassy-stm32/src/dcmi.rs
@@ -8,7 +8,7 @@ use embassy_sync::waitqueue::AtomicWaker;
8use crate::dma::Transfer; 8use crate::dma::Transfer;
9use crate::gpio::sealed::AFType; 9use crate::gpio::sealed::AFType;
10use crate::gpio::Speed; 10use crate::gpio::Speed;
11use crate::interrupt::Interrupt; 11use crate::interrupt::typelevel::Interrupt;
12use crate::{interrupt, Peripheral}; 12use crate::{interrupt, Peripheral};
13 13
14/// Interrupt handler. 14/// Interrupt handler.
@@ -16,7 +16,7 @@ pub struct InterruptHandler<T: Instance> {
16 _phantom: PhantomData<T>, 16 _phantom: PhantomData<T>,
17} 17}
18 18
19impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 19impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
20 unsafe fn on_interrupt() { 20 unsafe fn on_interrupt() {
21 let ris = crate::pac::DCMI.ris().read(); 21 let ris = crate::pac::DCMI.ris().read();
22 if ris.err_ris() { 22 if ris.err_ris() {
@@ -119,7 +119,7 @@ where
119 pub fn new_8bit( 119 pub fn new_8bit(
120 peri: impl Peripheral<P = T> + 'd, 120 peri: impl Peripheral<P = T> + 'd,
121 dma: impl Peripheral<P = Dma> + 'd, 121 dma: impl Peripheral<P = Dma> + 'd,
122 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 122 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
123 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 123 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
124 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 124 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
125 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 125 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -143,7 +143,7 @@ where
143 pub fn new_10bit( 143 pub fn new_10bit(
144 peri: impl Peripheral<P = T> + 'd, 144 peri: impl Peripheral<P = T> + 'd,
145 dma: impl Peripheral<P = Dma> + 'd, 145 dma: impl Peripheral<P = Dma> + 'd,
146 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 146 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
147 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 147 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
148 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 148 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
149 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 149 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -169,7 +169,7 @@ where
169 pub fn new_12bit( 169 pub fn new_12bit(
170 peri: impl Peripheral<P = T> + 'd, 170 peri: impl Peripheral<P = T> + 'd,
171 dma: impl Peripheral<P = Dma> + 'd, 171 dma: impl Peripheral<P = Dma> + 'd,
172 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 172 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
173 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 173 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
174 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 174 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
175 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 175 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -197,7 +197,7 @@ where
197 pub fn new_14bit( 197 pub fn new_14bit(
198 peri: impl Peripheral<P = T> + 'd, 198 peri: impl Peripheral<P = T> + 'd,
199 dma: impl Peripheral<P = Dma> + 'd, 199 dma: impl Peripheral<P = Dma> + 'd,
200 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 200 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
201 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 201 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
202 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 202 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
203 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 203 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -227,7 +227,7 @@ where
227 pub fn new_es_8bit( 227 pub fn new_es_8bit(
228 peri: impl Peripheral<P = T> + 'd, 228 peri: impl Peripheral<P = T> + 'd,
229 dma: impl Peripheral<P = Dma> + 'd, 229 dma: impl Peripheral<P = Dma> + 'd,
230 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 230 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
231 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 231 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
232 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 232 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
233 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 233 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -249,7 +249,7 @@ where
249 pub fn new_es_10bit( 249 pub fn new_es_10bit(
250 peri: impl Peripheral<P = T> + 'd, 250 peri: impl Peripheral<P = T> + 'd,
251 dma: impl Peripheral<P = Dma> + 'd, 251 dma: impl Peripheral<P = Dma> + 'd,
252 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 252 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
253 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 253 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
254 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 254 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
255 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 255 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -273,7 +273,7 @@ where
273 pub fn new_es_12bit( 273 pub fn new_es_12bit(
274 peri: impl Peripheral<P = T> + 'd, 274 peri: impl Peripheral<P = T> + 'd,
275 dma: impl Peripheral<P = Dma> + 'd, 275 dma: impl Peripheral<P = Dma> + 'd,
276 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 276 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
277 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 277 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
278 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 278 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
279 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 279 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -299,7 +299,7 @@ where
299 pub fn new_es_14bit( 299 pub fn new_es_14bit(
300 peri: impl Peripheral<P = T> + 'd, 300 peri: impl Peripheral<P = T> + 'd,
301 dma: impl Peripheral<P = Dma> + 'd, 301 dma: impl Peripheral<P = Dma> + 'd,
302 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 302 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
303 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 303 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
304 d1: impl Peripheral<P = impl D1Pin<T>> + 'd, 304 d1: impl Peripheral<P = impl D1Pin<T>> + 'd,
305 d2: impl Peripheral<P = impl D2Pin<T>> + 'd, 305 d2: impl Peripheral<P = impl D2Pin<T>> + 'd,
@@ -570,7 +570,7 @@ mod sealed {
570} 570}
571 571
572pub trait Instance: sealed::Instance + 'static { 572pub trait Instance: sealed::Instance + 'static {
573 type Interrupt: Interrupt; 573 type Interrupt: interrupt::typelevel::Interrupt;
574} 574}
575 575
576pin_trait!(D0Pin, Instance); 576pin_trait!(D0Pin, Instance);
@@ -602,7 +602,7 @@ macro_rules! impl_peripheral {
602 } 602 }
603 603
604 impl Instance for crate::peripherals::$inst { 604 impl Instance for crate::peripherals::$inst {
605 type Interrupt = crate::interrupt::$irq; 605 type Interrupt = crate::interrupt::typelevel::$irq;
606 } 606 }
607 }; 607 };
608} 608}
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index 7a1ecda35..83ab4b18f 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -14,7 +14,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
14use super::word::{Word, WordSize}; 14use super::word::{Word, WordSize};
15use super::Dir; 15use super::Dir;
16use crate::_generated::BDMA_CHANNEL_COUNT; 16use crate::_generated::BDMA_CHANNEL_COUNT;
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac; 18use crate::pac;
19use crate::pac::bdma::{regs, vals}; 19use crate::pac::bdma::{regs, vals};
20 20
@@ -70,8 +70,8 @@ static STATE: State = State::new();
70pub(crate) unsafe fn init(irq_priority: Priority) { 70pub(crate) unsafe fn init(irq_priority: Priority) {
71 foreach_interrupt! { 71 foreach_interrupt! {
72 ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => { 72 ($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => {
73 crate::interrupt::$irq::set_priority(irq_priority); 73 crate::interrupt::typelevel::$irq::set_priority(irq_priority);
74 crate::interrupt::$irq::enable(); 74 crate::interrupt::typelevel::$irq::enable();
75 }; 75 };
76 } 76 }
77 crate::_generated::init_bdma(); 77 crate::_generated::init_bdma();
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 3b602b991..17313b310 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -13,7 +13,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
13use super::word::{Word, WordSize}; 13use super::word::{Word, WordSize};
14use super::Dir; 14use super::Dir;
15use crate::_generated::DMA_CHANNEL_COUNT; 15use crate::_generated::DMA_CHANNEL_COUNT;
16use crate::interrupt::Interrupt; 16use crate::interrupt::typelevel::Interrupt;
17use crate::pac::dma::{regs, vals}; 17use crate::pac::dma::{regs, vals};
18use crate::{interrupt, pac}; 18use crate::{interrupt, pac};
19 19
@@ -149,8 +149,8 @@ static STATE: State = State::new();
149pub(crate) unsafe fn init(irq_priority: Priority) { 149pub(crate) unsafe fn init(irq_priority: Priority) {
150 foreach_interrupt! { 150 foreach_interrupt! {
151 ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => { 151 ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => {
152 interrupt::$irq::set_priority(irq_priority); 152 interrupt::typelevel::$irq::set_priority(irq_priority);
153 interrupt::$irq::enable(); 153 interrupt::typelevel::$irq::enable();
154 }; 154 };
155 } 155 }
156 crate::_generated::init_dma(); 156 crate::_generated::init_dma();
diff --git a/embassy-stm32/src/dma/gpdma.rs b/embassy-stm32/src/dma/gpdma.rs
index 7f8b82b46..07fef360f 100644
--- a/embassy-stm32/src/dma/gpdma.rs
+++ b/embassy-stm32/src/dma/gpdma.rs
@@ -56,8 +56,8 @@ static STATE: State = State::new();
56pub(crate) unsafe fn init(irq_priority: Priority) { 56pub(crate) unsafe fn init(irq_priority: Priority) {
57 foreach_interrupt! { 57 foreach_interrupt! {
58 ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => { 58 ($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => {
59 crate::interrupt::$irq::set_priority(irq_priority); 59 crate::interrupt::typelevel::$irq::set_priority(irq_priority);
60 crate::interrupt::$irq::enable(); 60 crate::interrupt::typelevel::$irq::enable();
61 }; 61 };
62 } 62 }
63 crate::_generated::init_gpdma(); 63 crate::_generated::init_gpdma();
diff --git a/embassy-stm32/src/eth/v1/mod.rs b/embassy-stm32/src/eth/v1/mod.rs
index a5f1a268d..540cdd027 100644
--- a/embassy-stm32/src/eth/v1/mod.rs
+++ b/embassy-stm32/src/eth/v1/mod.rs
@@ -5,7 +5,6 @@ mod tx_desc;
5 5
6use core::sync::atomic::{fence, Ordering}; 6use core::sync::atomic::{fence, Ordering};
7 7
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::{into_ref, PeripheralRef}; 8use embassy_hal_common::{into_ref, PeripheralRef};
10use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf}; 9use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
11 10
@@ -14,6 +13,7 @@ pub(crate) use self::tx_desc::{TDes, TDesRing};
14use super::*; 13use super::*;
15use crate::gpio::sealed::{AFType, Pin as __GpioPin}; 14use crate::gpio::sealed::{AFType, Pin as __GpioPin};
16use crate::gpio::AnyPin; 15use crate::gpio::AnyPin;
16use crate::interrupt::InterruptExt;
17#[cfg(eth_v1a)] 17#[cfg(eth_v1a)]
18use crate::pac::AFIO; 18use crate::pac::AFIO;
19#[cfg(any(eth_v1b, eth_v1c))] 19#[cfg(any(eth_v1b, eth_v1c))]
@@ -24,7 +24,7 @@ use crate::{interrupt, Peripheral};
24/// Interrupt handler. 24/// Interrupt handler.
25pub struct InterruptHandler {} 25pub struct InterruptHandler {}
26 26
27impl interrupt::Handler<interrupt::ETH> for InterruptHandler { 27impl interrupt::typelevel::Handler<interrupt::typelevel::ETH> for InterruptHandler {
28 unsafe fn on_interrupt() { 28 unsafe fn on_interrupt() {
29 WAKER.wake(); 29 WAKER.wake();
30 30
@@ -100,7 +100,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
100 pub fn new<const TX: usize, const RX: usize>( 100 pub fn new<const TX: usize, const RX: usize>(
101 queue: &'d mut PacketQueue<TX, RX>, 101 queue: &'d mut PacketQueue<TX, RX>,
102 peri: impl Peripheral<P = T> + 'd, 102 peri: impl Peripheral<P = T> + 'd,
103 _irq: impl interrupt::Binding<interrupt::ETH, InterruptHandler> + 'd, 103 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::ETH, InterruptHandler> + 'd,
104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd, 104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd,
105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd, 105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd,
106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd, 106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd,
@@ -267,8 +267,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
267 P::phy_reset(&mut this); 267 P::phy_reset(&mut this);
268 P::phy_init(&mut this); 268 P::phy_init(&mut this);
269 269
270 interrupt::ETH::unpend(); 270 interrupt::ETH.unpend();
271 interrupt::ETH::enable(); 271 interrupt::ETH.enable();
272 272
273 this 273 this
274 } 274 }
diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs
index 9efa436ac..3e45eafd5 100644
--- a/embassy-stm32/src/eth/v2/mod.rs
+++ b/embassy-stm32/src/eth/v2/mod.rs
@@ -2,20 +2,20 @@ mod descriptors;
2 2
3use core::sync::atomic::{fence, Ordering}; 3use core::sync::atomic::{fence, Ordering};
4 4
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::{into_ref, PeripheralRef}; 5use embassy_hal_common::{into_ref, PeripheralRef};
7 6
8pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing}; 7pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing};
9use super::*; 8use super::*;
10use crate::gpio::sealed::{AFType, Pin as _}; 9use crate::gpio::sealed::{AFType, Pin as _};
11use crate::gpio::{AnyPin, Speed}; 10use crate::gpio::{AnyPin, Speed};
11use crate::interrupt::InterruptExt;
12use crate::pac::ETH; 12use crate::pac::ETH;
13use crate::{interrupt, Peripheral}; 13use crate::{interrupt, Peripheral};
14 14
15/// Interrupt handler. 15/// Interrupt handler.
16pub struct InterruptHandler {} 16pub struct InterruptHandler {}
17 17
18impl interrupt::Handler<interrupt::ETH> for InterruptHandler { 18impl interrupt::typelevel::Handler<interrupt::typelevel::ETH> for InterruptHandler {
19 unsafe fn on_interrupt() { 19 unsafe fn on_interrupt() {
20 WAKER.wake(); 20 WAKER.wake();
21 21
@@ -64,7 +64,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
64 pub fn new<const TX: usize, const RX: usize>( 64 pub fn new<const TX: usize, const RX: usize>(
65 queue: &'d mut PacketQueue<TX, RX>, 65 queue: &'d mut PacketQueue<TX, RX>,
66 peri: impl Peripheral<P = T> + 'd, 66 peri: impl Peripheral<P = T> + 'd,
67 _irq: impl interrupt::Binding<interrupt::ETH, InterruptHandler> + 'd, 67 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::ETH, InterruptHandler> + 'd,
68 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd, 68 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd,
69 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd, 69 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd,
70 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd, 70 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd,
@@ -238,8 +238,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
238 P::phy_reset(&mut this); 238 P::phy_reset(&mut this);
239 P::phy_init(&mut this); 239 P::phy_init(&mut this);
240 240
241 interrupt::ETH::unpend(); 241 interrupt::ETH.unpend();
242 interrupt::ETH::enable(); 242 interrupt::ETH.enable();
243 243
244 this 244 this
245 } 245 }
diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs
index c2fa31b20..a2ed07093 100644
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@@ -354,13 +354,13 @@ impl_exti!(EXTI15, 15);
354 354
355macro_rules! enable_irq { 355macro_rules! enable_irq {
356 ($e:ident) => { 356 ($e:ident) => {
357 crate::interrupt::$e::enable(); 357 crate::interrupt::typelevel::$e::enable();
358 }; 358 };
359} 359}
360 360
361/// safety: must be called only once 361/// safety: must be called only once
362pub(crate) unsafe fn init() { 362pub(crate) unsafe fn init() {
363 use crate::interrupt::Interrupt; 363 use crate::interrupt::typelevel::Interrupt;
364 364
365 foreach_exti_irq!(enable_irq); 365 foreach_exti_irq!(enable_irq);
366 366
diff --git a/embassy-stm32/src/flash/asynch.rs b/embassy-stm32/src/flash/asynch.rs
index 872614d4e..70a5ded62 100644
--- a/embassy-stm32/src/flash/asynch.rs
+++ b/embassy-stm32/src/flash/asynch.rs
@@ -1,7 +1,6 @@
1use core::marker::PhantomData; 1use core::marker::PhantomData;
2 2
3use atomic_polyfill::{fence, Ordering}; 3use atomic_polyfill::{fence, Ordering};
4use embassy_cortex_m::interrupt::Interrupt;
5use embassy_hal_common::drop::OnDrop; 4use embassy_hal_common::drop::OnDrop;
6use embassy_hal_common::into_ref; 5use embassy_hal_common::into_ref;
7use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; 6use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
@@ -11,6 +10,7 @@ use super::{
11 blocking_read, ensure_sector_aligned, family, get_sector, Async, Error, Flash, FlashLayout, FLASH_BASE, FLASH_SIZE, 10 blocking_read, ensure_sector_aligned, family, get_sector, Async, Error, Flash, FlashLayout, FLASH_BASE, FLASH_SIZE,
12 WRITE_SIZE, 11 WRITE_SIZE,
13}; 12};
13use crate::interrupt::InterruptExt;
14use crate::peripherals::FLASH; 14use crate::peripherals::FLASH;
15use crate::{interrupt, Peripheral}; 15use crate::{interrupt, Peripheral};
16 16
@@ -19,12 +19,12 @@ pub(super) static REGION_ACCESS: Mutex<CriticalSectionRawMutex, ()> = Mutex::new
19impl<'d> Flash<'d, Async> { 19impl<'d> Flash<'d, Async> {
20 pub fn new( 20 pub fn new(
21 p: impl Peripheral<P = FLASH> + 'd, 21 p: impl Peripheral<P = FLASH> + 'd,
22 _irq: impl interrupt::Binding<crate::interrupt::FLASH, InterruptHandler> + 'd, 22 _irq: impl interrupt::typelevel::Binding<crate::interrupt::typelevel::FLASH, InterruptHandler> + 'd,
23 ) -> Self { 23 ) -> Self {
24 into_ref!(p); 24 into_ref!(p);
25 25
26 crate::interrupt::FLASH::unpend(); 26 crate::interrupt::FLASH.unpend();
27 unsafe { crate::interrupt::FLASH::enable() }; 27 unsafe { crate::interrupt::FLASH.enable() };
28 28
29 Self { 29 Self {
30 inner: p, 30 inner: p,
@@ -49,7 +49,7 @@ impl<'d> Flash<'d, Async> {
49/// Interrupt handler 49/// Interrupt handler
50pub struct InterruptHandler; 50pub struct InterruptHandler;
51 51
52impl interrupt::Handler<crate::interrupt::FLASH> for InterruptHandler { 52impl interrupt::typelevel::Handler<crate::interrupt::typelevel::FLASH> for InterruptHandler {
53 unsafe fn on_interrupt() { 53 unsafe fn on_interrupt() {
54 family::on_interrupt(); 54 family::on_interrupt();
55 } 55 }
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index f898fcc8b..b35678ed9 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -1,6 +1,6 @@
1#![macro_use] 1#![macro_use]
2 2
3use crate::interrupt::Interrupt; 3use crate::interrupt;
4 4
5#[cfg_attr(i2c_v1, path = "v1.rs")] 5#[cfg_attr(i2c_v1, path = "v1.rs")]
6#[cfg_attr(i2c_v2, path = "v2.rs")] 6#[cfg_attr(i2c_v2, path = "v2.rs")]
@@ -35,7 +35,7 @@ pub(crate) mod sealed {
35} 35}
36 36
37pub trait Instance: sealed::Instance + 'static { 37pub trait Instance: sealed::Instance + 'static {
38 type Interrupt: Interrupt; 38 type Interrupt: interrupt::typelevel::Interrupt;
39} 39}
40 40
41pin_trait!(SclPin, Instance); 41pin_trait!(SclPin, Instance);
@@ -57,7 +57,7 @@ foreach_interrupt!(
57 } 57 }
58 58
59 impl Instance for peripherals::$inst { 59 impl Instance for peripherals::$inst {
60 type Interrupt = crate::interrupt::$irq; 60 type Interrupt = crate::interrupt::typelevel::$irq;
61 } 61 }
62 }; 62 };
63); 63);
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index b9be2e587..e04038886 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -16,7 +16,7 @@ pub struct InterruptHandler<T: Instance> {
16 _phantom: PhantomData<T>, 16 _phantom: PhantomData<T>,
17} 17}
18 18
19impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 19impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
20 unsafe fn on_interrupt() {} 20 unsafe fn on_interrupt() {}
21} 21}
22 22
@@ -57,7 +57,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
57 _peri: impl Peripheral<P = T> + 'd, 57 _peri: impl Peripheral<P = T> + 'd,
58 scl: impl Peripheral<P = impl SclPin<T>> + 'd, 58 scl: impl Peripheral<P = impl SclPin<T>> + 'd,
59 sda: impl Peripheral<P = impl SdaPin<T>> + 'd, 59 sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
60 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 60 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
61 tx_dma: impl Peripheral<P = TXDMA> + 'd, 61 tx_dma: impl Peripheral<P = TXDMA> + 'd,
62 rx_dma: impl Peripheral<P = RXDMA> + 'd, 62 rx_dma: impl Peripheral<P = RXDMA> + 'd,
63 freq: Hertz, 63 freq: Hertz,
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 10f57f700..1aaf2b46b 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -3,7 +3,6 @@ use core::future::poll_fn;
3use core::marker::PhantomData; 3use core::marker::PhantomData;
4use core::task::Poll; 4use core::task::Poll;
5 5
6use embassy_cortex_m::interrupt::Interrupt;
7use embassy_embedded_hal::SetConfig; 6use embassy_embedded_hal::SetConfig;
8use embassy_hal_common::drop::OnDrop; 7use embassy_hal_common::drop::OnDrop;
9use embassy_hal_common::{into_ref, PeripheralRef}; 8use embassy_hal_common::{into_ref, PeripheralRef};
@@ -13,6 +12,7 @@ use crate::dma::{NoDma, Transfer};
13use crate::gpio::sealed::AFType; 12use crate::gpio::sealed::AFType;
14use crate::gpio::Pull; 13use crate::gpio::Pull;
15use crate::i2c::{Error, Instance, SclPin, SdaPin}; 14use crate::i2c::{Error, Instance, SclPin, SdaPin};
15use crate::interrupt::typelevel::Interrupt;
16use crate::pac::i2c; 16use crate::pac::i2c;
17use crate::time::Hertz; 17use crate::time::Hertz;
18use crate::{interrupt, Peripheral}; 18use crate::{interrupt, Peripheral};
@@ -22,7 +22,7 @@ pub struct InterruptHandler<T: Instance> {
22 _phantom: PhantomData<T>, 22 _phantom: PhantomData<T>,
23} 23}
24 24
25impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 25impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
26 unsafe fn on_interrupt() { 26 unsafe fn on_interrupt() {
27 let regs = T::regs(); 27 let regs = T::regs();
28 let isr = regs.isr().read(); 28 let isr = regs.isr().read();
@@ -78,7 +78,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
78 peri: impl Peripheral<P = T> + 'd, 78 peri: impl Peripheral<P = T> + 'd,
79 scl: impl Peripheral<P = impl SclPin<T>> + 'd, 79 scl: impl Peripheral<P = impl SclPin<T>> + 'd,
80 sda: impl Peripheral<P = impl SdaPin<T>> + 'd, 80 sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
81 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 81 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
82 tx_dma: impl Peripheral<P = TXDMA> + 'd, 82 tx_dma: impl Peripheral<P = TXDMA> + 'd,
83 rx_dma: impl Peripheral<P = RXDMA> + 'd, 83 rx_dma: impl Peripheral<P = RXDMA> + 'd,
84 freq: Hertz, 84 freq: Hertz,
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 75d8af3dd..b42864567 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -72,46 +72,39 @@ pub(crate) mod _generated {
72 include!(concat!(env!("OUT_DIR"), "/_generated.rs")); 72 include!(concat!(env!("OUT_DIR"), "/_generated.rs"));
73} 73}
74 74
75pub mod interrupt { 75pub use crate::_generated::interrupt;
76 //! Interrupt definitions and macros to bind them. 76
77 pub use cortex_m::interrupt::{CriticalSection, Mutex}; 77/// Macro to bind interrupts to handlers.
78 pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority}; 78///
79 79/// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`)
80 pub use crate::_generated::interrupt::*; 80/// and implements the right [`Binding`]s for it. You can pass this struct to drivers to
81 81/// prove at compile-time that the right interrupts have been bound.
82 /// Macro to bind interrupts to handlers. 82// developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`.
83 /// 83#[macro_export]
84 /// This defines the right interrupt handlers, and creates a unit struct (like `struct Irqs;`) 84macro_rules! bind_interrupts {
85 /// and implements the right [`Binding`]s for it. You can pass this struct to drivers to 85 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
86 /// prove at compile-time that the right interrupts have been bound. 86 $vis struct $name;
87 // developer note: this macro can't be in `embassy-cortex-m` due to the use of `$crate`. 87
88 #[macro_export] 88 $(
89 macro_rules! bind_interrupts { 89 #[allow(non_snake_case)]
90 ($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => { 90 #[no_mangle]
91 $vis struct $name; 91 unsafe extern "C" fn $irq() {
92
93 $(
94 #[allow(non_snake_case)]
95 #[no_mangle]
96 unsafe extern "C" fn $irq() {
97 $(
98 <$handler as $crate::interrupt::Handler<$crate::interrupt::$irq>>::on_interrupt();
99 )*
100 }
101
102 $( 92 $(
103 unsafe impl $crate::interrupt::Binding<$crate::interrupt::$irq, $handler> for $name {} 93 <$handler as $crate::interrupt::typelevel::Handler<$crate::interrupt::typelevel::$irq>>::on_interrupt();
104 )* 94 )*
95 }
96
97 $(
98 unsafe impl $crate::interrupt::typelevel::Binding<$crate::interrupt::typelevel::$irq, $handler> for $name {}
105 )* 99 )*
106 }; 100 )*
107 } 101 };
108} 102}
109 103
110// Reexports 104// Reexports
111pub use _generated::{peripherals, Peripherals}; 105pub use _generated::{peripherals, Peripherals};
112pub use embassy_cortex_m::executor; 106pub use embassy_cortex_m::executor;
113use embassy_cortex_m::interrupt::Priority; 107use embassy_cortex_m::interrupt::Priority;
114pub use embassy_cortex_m::interrupt::_export::interrupt;
115pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 108pub use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
116#[cfg(feature = "unstable-pac")] 109#[cfg(feature = "unstable-pac")]
117pub use stm32_metapac as pac; 110pub use stm32_metapac as pac;
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index 3cc17aa68..28eb49ab6 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -14,7 +14,7 @@ use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID,
14use crate::dma::NoDma; 14use crate::dma::NoDma;
15use crate::gpio::sealed::{AFType, Pin}; 15use crate::gpio::sealed::{AFType, Pin};
16use crate::gpio::{AnyPin, Pull, Speed}; 16use crate::gpio::{AnyPin, Pull, Speed};
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::sdmmc::Sdmmc as RegBlock; 18use crate::pac::sdmmc::Sdmmc as RegBlock;
19use crate::rcc::RccPeripheral; 19use crate::rcc::RccPeripheral;
20use crate::time::Hertz; 20use crate::time::Hertz;
@@ -42,7 +42,7 @@ impl<T: Instance> InterruptHandler<T> {
42 } 42 }
43} 43}
44 44
45impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 45impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
46 unsafe fn on_interrupt() { 46 unsafe fn on_interrupt() {
47 Self::data_interrupts(false); 47 Self::data_interrupts(false);
48 T::state().wake(); 48 T::state().wake();
@@ -276,7 +276,7 @@ pub struct Sdmmc<'d, T: Instance, Dma: SdmmcDma<T> = NoDma> {
276impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> { 276impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
277 pub fn new_1bit( 277 pub fn new_1bit(
278 sdmmc: impl Peripheral<P = T> + 'd, 278 sdmmc: impl Peripheral<P = T> + 'd,
279 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 279 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
280 dma: impl Peripheral<P = Dma> + 'd, 280 dma: impl Peripheral<P = Dma> + 'd,
281 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 281 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
282 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 282 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
@@ -310,7 +310,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
310 310
311 pub fn new_4bit( 311 pub fn new_4bit(
312 sdmmc: impl Peripheral<P = T> + 'd, 312 sdmmc: impl Peripheral<P = T> + 'd,
313 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 313 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
314 dma: impl Peripheral<P = Dma> + 'd, 314 dma: impl Peripheral<P = Dma> + 'd,
315 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 315 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
316 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 316 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
@@ -356,7 +356,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T>> Sdmmc<'d, T, Dma> {
356impl<'d, T: Instance> Sdmmc<'d, T, NoDma> { 356impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
357 pub fn new_1bit( 357 pub fn new_1bit(
358 sdmmc: impl Peripheral<P = T> + 'd, 358 sdmmc: impl Peripheral<P = T> + 'd,
359 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 359 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
360 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 360 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
361 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 361 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
362 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 362 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
@@ -389,7 +389,7 @@ impl<'d, T: Instance> Sdmmc<'d, T, NoDma> {
389 389
390 pub fn new_4bit( 390 pub fn new_4bit(
391 sdmmc: impl Peripheral<P = T> + 'd, 391 sdmmc: impl Peripheral<P = T> + 'd,
392 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 392 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
393 clk: impl Peripheral<P = impl CkPin<T>> + 'd, 393 clk: impl Peripheral<P = impl CkPin<T>> + 'd,
394 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd, 394 cmd: impl Peripheral<P = impl CmdPin<T>> + 'd,
395 d0: impl Peripheral<P = impl D0Pin<T>> + 'd, 395 d0: impl Peripheral<P = impl D0Pin<T>> + 'd,
@@ -1401,7 +1401,7 @@ pub(crate) mod sealed {
1401 use super::*; 1401 use super::*;
1402 1402
1403 pub trait Instance { 1403 pub trait Instance {
1404 type Interrupt: Interrupt; 1404 type Interrupt: interrupt::typelevel::Interrupt;
1405 1405
1406 fn regs() -> RegBlock; 1406 fn regs() -> RegBlock;
1407 fn state() -> &'static AtomicWaker; 1407 fn state() -> &'static AtomicWaker;
@@ -1490,7 +1490,7 @@ cfg_if::cfg_if! {
1490foreach_peripheral!( 1490foreach_peripheral!(
1491 (sdmmc, $inst:ident) => { 1491 (sdmmc, $inst:ident) => {
1492 impl sealed::Instance for peripherals::$inst { 1492 impl sealed::Instance for peripherals::$inst {
1493 type Interrupt = crate::interrupt::$inst; 1493 type Interrupt = crate::interrupt::typelevel::$inst;
1494 1494
1495 fn regs() -> RegBlock { 1495 fn regs() -> RegBlock {
1496 crate::pac::$inst 1496 crate::pac::$inst
diff --git a/embassy-stm32/src/time_driver.rs b/embassy-stm32/src/time_driver.rs
index bab700993..8f282bafb 100644
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@@ -11,7 +11,7 @@ use embassy_time::driver::{AlarmHandle, Driver};
11use embassy_time::TICK_HZ; 11use embassy_time::TICK_HZ;
12use stm32_metapac::timer::regs; 12use stm32_metapac::timer::regs;
13 13
14use crate::interrupt::Interrupt; 14use crate::interrupt::typelevel::Interrupt;
15use crate::pac::timer::vals; 15use crate::pac::timer::vals;
16use crate::rcc::sealed::RccPeripheral; 16use crate::rcc::sealed::RccPeripheral;
17use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance}; 17use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance};
diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs
index 772c67686..14db97024 100644
--- a/embassy-stm32/src/timer/mod.rs
+++ b/embassy-stm32/src/timer/mod.rs
@@ -1,6 +1,6 @@
1use stm32_metapac::timer::vals; 1use stm32_metapac::timer::vals;
2 2
3use crate::interrupt::Interrupt; 3use crate::interrupt;
4use crate::rcc::sealed::RccPeripheral as __RccPeri; 4use crate::rcc::sealed::RccPeripheral as __RccPeri;
5use crate::rcc::RccPeripheral; 5use crate::rcc::RccPeripheral;
6use crate::time::Hertz; 6use crate::time::Hertz;
@@ -13,7 +13,7 @@ pub mod low_level {
13pub(crate) mod sealed { 13pub(crate) mod sealed {
14 use super::*; 14 use super::*;
15 pub trait Basic16bitInstance: RccPeripheral { 15 pub trait Basic16bitInstance: RccPeripheral {
16 type Interrupt: Interrupt; 16 type Interrupt: interrupt::typelevel::Interrupt;
17 17
18 fn regs() -> crate::pac::timer::TimBasic; 18 fn regs() -> crate::pac::timer::TimBasic;
19 19
@@ -57,7 +57,7 @@ pub trait Basic16bitInstance: sealed::Basic16bitInstance + 'static {}
57macro_rules! impl_basic_16bit_timer { 57macro_rules! impl_basic_16bit_timer {
58 ($inst:ident, $irq:ident) => { 58 ($inst:ident, $irq:ident) => {
59 impl sealed::Basic16bitInstance for crate::peripherals::$inst { 59 impl sealed::Basic16bitInstance for crate::peripherals::$inst {
60 type Interrupt = crate::interrupt::$irq; 60 type Interrupt = crate::interrupt::typelevel::$irq;
61 61
62 fn regs() -> crate::pac::timer::TimBasic { 62 fn regs() -> crate::pac::timer::TimBasic {
63 crate::pac::timer::TimBasic(crate::pac::$inst.0) 63 crate::pac::timer::TimBasic(crate::pac::$inst.0)
diff --git a/embassy-stm32/src/tl_mbox/mod.rs b/embassy-stm32/src/tl_mbox/mod.rs
index efbbf2d1d..d39c78b2c 100644
--- a/embassy-stm32/src/tl_mbox/mod.rs
+++ b/embassy-stm32/src/tl_mbox/mod.rs
@@ -2,7 +2,6 @@ use core::mem::MaybeUninit;
2 2
3use atomic_polyfill::{compiler_fence, Ordering}; 3use atomic_polyfill::{compiler_fence, Ordering};
4use bit_field::BitField; 4use bit_field::BitField;
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; 5use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
7use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex; 6use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
8use embassy_sync::channel::Channel; 7use embassy_sync::channel::Channel;
@@ -15,6 +14,7 @@ use self::shci::{shci_ble_init, ShciBleInitCmdParam};
15use self::sys::Sys; 14use self::sys::Sys;
16use self::unsafe_linked_list::LinkedListNode; 15use self::unsafe_linked_list::LinkedListNode;
17use crate::interrupt; 16use crate::interrupt;
17use crate::interrupt::InterruptExt;
18use crate::peripherals::IPCC; 18use crate::peripherals::IPCC;
19pub use crate::tl_mbox::ipcc::Config; 19pub use crate::tl_mbox::ipcc::Config;
20use crate::tl_mbox::ipcc::Ipcc; 20use crate::tl_mbox::ipcc::Ipcc;
@@ -63,7 +63,7 @@ pub struct FusInfoTable {
63/// Interrupt handler. 63/// Interrupt handler.
64pub struct ReceiveInterruptHandler {} 64pub struct ReceiveInterruptHandler {}
65 65
66impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler { 66impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_RX> for ReceiveInterruptHandler {
67 unsafe fn on_interrupt() { 67 unsafe fn on_interrupt() {
68 // info!("ipcc rx interrupt"); 68 // info!("ipcc rx interrupt");
69 69
@@ -79,7 +79,7 @@ impl interrupt::Handler<interrupt::IPCC_C1_RX> for ReceiveInterruptHandler {
79 79
80pub struct TransmitInterruptHandler {} 80pub struct TransmitInterruptHandler {}
81 81
82impl interrupt::Handler<interrupt::IPCC_C1_TX> for TransmitInterruptHandler { 82impl interrupt::typelevel::Handler<interrupt::typelevel::IPCC_C1_TX> for TransmitInterruptHandler {
83 unsafe fn on_interrupt() { 83 unsafe fn on_interrupt() {
84 // info!("ipcc tx interrupt"); 84 // info!("ipcc tx interrupt");
85 85
@@ -324,8 +324,8 @@ impl<'d> TlMbox<'d> {
324 /// initializes low-level transport between CPU1 and BLE stack on CPU2 324 /// initializes low-level transport between CPU1 and BLE stack on CPU2
325 pub fn new( 325 pub fn new(
326 ipcc: impl Peripheral<P = IPCC> + 'd, 326 ipcc: impl Peripheral<P = IPCC> + 'd,
327 _irqs: impl interrupt::Binding<interrupt::IPCC_C1_RX, ReceiveInterruptHandler> 327 _irqs: impl interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_RX, ReceiveInterruptHandler>
328 + interrupt::Binding<interrupt::IPCC_C1_TX, TransmitInterruptHandler>, 328 + interrupt::typelevel::Binding<interrupt::typelevel::IPCC_C1_TX, TransmitInterruptHandler>,
329 config: Config, 329 config: Config,
330 ) -> Self { 330 ) -> Self {
331 into_ref!(ipcc); 331 into_ref!(ipcc);
@@ -379,11 +379,11 @@ impl<'d> TlMbox<'d> {
379 MemoryManager::enable(); 379 MemoryManager::enable();
380 380
381 // enable interrupts 381 // enable interrupts
382 crate::interrupt::IPCC_C1_RX::unpend(); 382 crate::interrupt::IPCC_C1_RX.unpend();
383 crate::interrupt::IPCC_C1_TX::unpend(); 383 crate::interrupt::IPCC_C1_TX.unpend();
384 384
385 unsafe { crate::interrupt::IPCC_C1_RX::enable() }; 385 unsafe { crate::interrupt::IPCC_C1_RX.enable() };
386 unsafe { crate::interrupt::IPCC_C1_TX::enable() }; 386 unsafe { crate::interrupt::IPCC_C1_TX.enable() };
387 387
388 Self { _ipcc: ipcc } 388 Self { _ipcc: ipcc }
389 } 389 }
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 252e945da..613da5674 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -2,18 +2,18 @@ use core::future::poll_fn;
2use core::slice; 2use core::slice;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use embassy_cortex_m::interrupt::Interrupt;
6use embassy_hal_common::atomic_ring_buffer::RingBuffer; 5use embassy_hal_common::atomic_ring_buffer::RingBuffer;
7use embassy_sync::waitqueue::AtomicWaker; 6use embassy_sync::waitqueue::AtomicWaker;
8 7
9use super::*; 8use super::*;
9use crate::interrupt::typelevel::Interrupt;
10 10
11/// Interrupt handler. 11/// Interrupt handler.
12pub struct InterruptHandler<T: BasicInstance> { 12pub struct InterruptHandler<T: BasicInstance> {
13 _phantom: PhantomData<T>, 13 _phantom: PhantomData<T>,
14} 14}
15 15
16impl<T: BasicInstance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 16impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
17 unsafe fn on_interrupt() { 17 unsafe fn on_interrupt() {
18 let r = T::regs(); 18 let r = T::regs();
19 let state = T::buffered_state(); 19 let state = T::buffered_state();
@@ -115,7 +115,7 @@ pub struct BufferedUartRx<'d, T: BasicInstance> {
115impl<'d, T: BasicInstance> BufferedUart<'d, T> { 115impl<'d, T: BasicInstance> BufferedUart<'d, T> {
116 pub fn new( 116 pub fn new(
117 peri: impl Peripheral<P = T> + 'd, 117 peri: impl Peripheral<P = T> + 'd,
118 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 118 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
119 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 119 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
120 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 120 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
121 tx_buffer: &'d mut [u8], 121 tx_buffer: &'d mut [u8],
@@ -130,7 +130,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
130 130
131 pub fn new_with_rtscts( 131 pub fn new_with_rtscts(
132 peri: impl Peripheral<P = T> + 'd, 132 peri: impl Peripheral<P = T> + 'd,
133 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 133 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
134 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 134 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
135 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 135 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
136 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 136 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
@@ -159,7 +159,7 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
159 #[cfg(not(any(usart_v1, usart_v2)))] 159 #[cfg(not(any(usart_v1, usart_v2)))]
160 pub fn new_with_de( 160 pub fn new_with_de(
161 peri: impl Peripheral<P = T> + 'd, 161 peri: impl Peripheral<P = T> + 'd,
162 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 162 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
163 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 163 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
164 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 164 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
165 de: impl Peripheral<P = impl DePin<T>> + 'd, 165 de: impl Peripheral<P = impl DePin<T>> + 'd,
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs
index ef1080153..da3644a81 100644
--- a/embassy-stm32/src/usart/mod.rs
+++ b/embassy-stm32/src/usart/mod.rs
@@ -5,13 +5,13 @@ use core::marker::PhantomData;
5use core::sync::atomic::{compiler_fence, Ordering}; 5use core::sync::atomic::{compiler_fence, Ordering};
6use core::task::Poll; 6use core::task::Poll;
7 7
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::drop::OnDrop; 8use embassy_hal_common::drop::OnDrop;
10use embassy_hal_common::{into_ref, PeripheralRef}; 9use embassy_hal_common::{into_ref, PeripheralRef};
11use futures::future::{select, Either}; 10use futures::future::{select, Either};
12 11
13use crate::dma::{NoDma, Transfer}; 12use crate::dma::{NoDma, Transfer};
14use crate::gpio::sealed::AFType; 13use crate::gpio::sealed::AFType;
14use crate::interrupt::typelevel::Interrupt;
15#[cfg(not(any(usart_v1, usart_v2)))] 15#[cfg(not(any(usart_v1, usart_v2)))]
16#[allow(unused_imports)] 16#[allow(unused_imports)]
17use crate::pac::usart::regs::Isr as Sr; 17use crate::pac::usart::regs::Isr as Sr;
@@ -31,7 +31,7 @@ pub struct InterruptHandler<T: BasicInstance> {
31 _phantom: PhantomData<T>, 31 _phantom: PhantomData<T>,
32} 32}
33 33
34impl<T: BasicInstance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 34impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
35 unsafe fn on_interrupt() { 35 unsafe fn on_interrupt() {
36 let r = T::regs(); 36 let r = T::regs();
37 let s = T::state(); 37 let s = T::state();
@@ -281,7 +281,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
281 /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power. 281 /// Useful if you only want Uart Rx. It saves 1 pin and consumes a little less power.
282 pub fn new( 282 pub fn new(
283 peri: impl Peripheral<P = T> + 'd, 283 peri: impl Peripheral<P = T> + 'd,
284 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 284 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
285 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 285 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
286 rx_dma: impl Peripheral<P = RxDma> + 'd, 286 rx_dma: impl Peripheral<P = RxDma> + 'd,
287 config: Config, 287 config: Config,
@@ -294,7 +294,7 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
294 294
295 pub fn new_with_rts( 295 pub fn new_with_rts(
296 peri: impl Peripheral<P = T> + 'd, 296 peri: impl Peripheral<P = T> + 'd,
297 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 297 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
298 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 298 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
299 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 299 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
300 rx_dma: impl Peripheral<P = RxDma> + 'd, 300 rx_dma: impl Peripheral<P = RxDma> + 'd,
@@ -650,7 +650,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
650 peri: impl Peripheral<P = T> + 'd, 650 peri: impl Peripheral<P = T> + 'd,
651 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 651 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
652 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 652 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
653 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 653 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
654 tx_dma: impl Peripheral<P = TxDma> + 'd, 654 tx_dma: impl Peripheral<P = TxDma> + 'd,
655 rx_dma: impl Peripheral<P = RxDma> + 'd, 655 rx_dma: impl Peripheral<P = RxDma> + 'd,
656 config: Config, 656 config: Config,
@@ -665,7 +665,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
665 peri: impl Peripheral<P = T> + 'd, 665 peri: impl Peripheral<P = T> + 'd,
666 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 666 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
667 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 667 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
668 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 668 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
669 rts: impl Peripheral<P = impl RtsPin<T>> + 'd, 669 rts: impl Peripheral<P = impl RtsPin<T>> + 'd,
670 cts: impl Peripheral<P = impl CtsPin<T>> + 'd, 670 cts: impl Peripheral<P = impl CtsPin<T>> + 'd,
671 tx_dma: impl Peripheral<P = TxDma> + 'd, 671 tx_dma: impl Peripheral<P = TxDma> + 'd,
@@ -693,7 +693,7 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
693 peri: impl Peripheral<P = T> + 'd, 693 peri: impl Peripheral<P = T> + 'd,
694 rx: impl Peripheral<P = impl RxPin<T>> + 'd, 694 rx: impl Peripheral<P = impl RxPin<T>> + 'd,
695 tx: impl Peripheral<P = impl TxPin<T>> + 'd, 695 tx: impl Peripheral<P = impl TxPin<T>> + 'd,
696 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 696 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
697 de: impl Peripheral<P = impl DePin<T>> + 'd, 697 de: impl Peripheral<P = impl DePin<T>> + 'd,
698 tx_dma: impl Peripheral<P = TxDma> + 'd, 698 tx_dma: impl Peripheral<P = TxDma> + 'd,
699 rx_dma: impl Peripheral<P = RxDma> + 'd, 699 rx_dma: impl Peripheral<P = RxDma> + 'd,
@@ -1179,7 +1179,7 @@ pub(crate) mod sealed {
1179 1179
1180 pub trait BasicInstance: crate::rcc::RccPeripheral { 1180 pub trait BasicInstance: crate::rcc::RccPeripheral {
1181 const KIND: Kind; 1181 const KIND: Kind;
1182 type Interrupt: crate::interrupt::Interrupt; 1182 type Interrupt: interrupt::typelevel::Interrupt;
1183 1183
1184 fn regs() -> Regs; 1184 fn regs() -> Regs;
1185 fn state() -> &'static State; 1185 fn state() -> &'static State;
@@ -1211,7 +1211,7 @@ macro_rules! impl_usart {
1211 ($inst:ident, $irq:ident, $kind:expr) => { 1211 ($inst:ident, $irq:ident, $kind:expr) => {
1212 impl sealed::BasicInstance for crate::peripherals::$inst { 1212 impl sealed::BasicInstance for crate::peripherals::$inst {
1213 const KIND: Kind = $kind; 1213 const KIND: Kind = $kind;
1214 type Interrupt = crate::interrupt::$irq; 1214 type Interrupt = crate::interrupt::typelevel::$irq;
1215 1215
1216 fn regs() -> Regs { 1216 fn regs() -> Regs {
1217 Regs(crate::pac::$inst.0) 1217 Regs(crate::pac::$inst.0)
diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs
index fbd1fa823..bee287fe6 100644
--- a/embassy-stm32/src/usb/mod.rs
+++ b/embassy-stm32/src/usb/mod.rs
@@ -1,4 +1,4 @@
1use crate::interrupt::Interrupt; 1use crate::interrupt;
2use crate::rcc::RccPeripheral; 2use crate::rcc::RccPeripheral;
3 3
4#[cfg(feature = "nightly")] 4#[cfg(feature = "nightly")]
@@ -13,7 +13,7 @@ pub(crate) mod sealed {
13} 13}
14 14
15pub trait Instance: sealed::Instance + RccPeripheral + 'static { 15pub trait Instance: sealed::Instance + RccPeripheral + 'static {
16 type Interrupt: Interrupt; 16 type Interrupt: interrupt::typelevel::Interrupt;
17} 17}
18 18
19// Internal PHY pins 19// Internal PHY pins
@@ -29,7 +29,7 @@ foreach_interrupt!(
29 } 29 }
30 30
31 impl Instance for crate::peripherals::$inst { 31 impl Instance for crate::peripherals::$inst {
32 type Interrupt = crate::interrupt::$irq; 32 type Interrupt = crate::interrupt::typelevel::$irq;
33 } 33 }
34 }; 34 };
35); 35);
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index 134107978..7486bd376 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -14,7 +14,7 @@ use embassy_usb_driver::{
14 14
15use super::{DmPin, DpPin, Instance}; 15use super::{DmPin, DpPin, Instance};
16use crate::gpio::sealed::AFType; 16use crate::gpio::sealed::AFType;
17use crate::interrupt::Interrupt; 17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::usb::regs; 18use crate::pac::usb::regs;
19use crate::pac::usb::vals::{EpType, Stat}; 19use crate::pac::usb::vals::{EpType, Stat};
20use crate::pac::USBRAM; 20use crate::pac::USBRAM;
@@ -26,7 +26,7 @@ pub struct InterruptHandler<T: Instance> {
26 _phantom: PhantomData<T>, 26 _phantom: PhantomData<T>,
27} 27}
28 28
29impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 29impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
30 unsafe fn on_interrupt() { 30 unsafe fn on_interrupt() {
31 unsafe { 31 unsafe {
32 let regs = T::regs(); 32 let regs = T::regs();
@@ -255,7 +255,7 @@ pub struct Driver<'d, T: Instance> {
255impl<'d, T: Instance> Driver<'d, T> { 255impl<'d, T: Instance> Driver<'d, T> {
256 pub fn new( 256 pub fn new(
257 _usb: impl Peripheral<P = T> + 'd, 257 _usb: impl Peripheral<P = T> + 'd,
258 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 258 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
259 dp: impl Peripheral<P = impl DpPin<T>> + 'd, 259 dp: impl Peripheral<P = impl DpPin<T>> + 'd,
260 dm: impl Peripheral<P = impl DmPin<T>> + 'd, 260 dm: impl Peripheral<P = impl DmPin<T>> + 'd,
261 ) -> Self { 261 ) -> Self {
diff --git a/embassy-stm32/src/usb_otg/mod.rs b/embassy-stm32/src/usb_otg/mod.rs
index 193e0df0d..317264cbb 100644
--- a/embassy-stm32/src/usb_otg/mod.rs
+++ b/embassy-stm32/src/usb_otg/mod.rs
@@ -1,7 +1,5 @@
1use embassy_cortex_m::interrupt::Interrupt;
2
3use crate::peripherals;
4use crate::rcc::RccPeripheral; 1use crate::rcc::RccPeripheral;
2use crate::{interrupt, peripherals};
5 3
6#[cfg(feature = "nightly")] 4#[cfg(feature = "nightly")]
7mod usb; 5mod usb;
@@ -25,7 +23,7 @@ pub(crate) mod sealed {
25} 23}
26 24
27pub trait Instance: sealed::Instance + RccPeripheral { 25pub trait Instance: sealed::Instance + RccPeripheral {
28 type Interrupt: Interrupt; 26 type Interrupt: interrupt::typelevel::Interrupt;
29} 27}
30 28
31// Internal PHY pins 29// Internal PHY pins
@@ -109,7 +107,7 @@ foreach_interrupt!(
109 } 107 }
110 108
111 impl Instance for peripherals::USB_OTG_FS { 109 impl Instance for peripherals::USB_OTG_FS {
112 type Interrupt = crate::interrupt::$irq; 110 type Interrupt = crate::interrupt::typelevel::$irq;
113 } 111 }
114 }; 112 };
115 113
@@ -161,7 +159,7 @@ foreach_interrupt!(
161 } 159 }
162 160
163 impl Instance for peripherals::USB_OTG_HS { 161 impl Instance for peripherals::USB_OTG_HS {
164 type Interrupt = crate::interrupt::$irq; 162 type Interrupt = crate::interrupt::typelevel::$irq;
165 } 163 }
166 }; 164 };
167); 165);
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs
index e602bcb70..16cbf1a95 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@@ -3,7 +3,6 @@ use core::marker::PhantomData;
3use core::task::Poll; 3use core::task::Poll;
4 4
5use atomic_polyfill::{AtomicBool, AtomicU16, Ordering}; 5use atomic_polyfill::{AtomicBool, AtomicU16, Ordering};
6use embassy_cortex_m::interrupt::Interrupt;
7use embassy_hal_common::{into_ref, Peripheral}; 6use embassy_hal_common::{into_ref, Peripheral};
8use embassy_sync::waitqueue::AtomicWaker; 7use embassy_sync::waitqueue::AtomicWaker;
9use embassy_usb_driver::{ 8use embassy_usb_driver::{
@@ -15,6 +14,7 @@ use futures::future::poll_fn;
15use super::*; 14use super::*;
16use crate::gpio::sealed::AFType; 15use crate::gpio::sealed::AFType;
17use crate::interrupt; 16use crate::interrupt;
17use crate::interrupt::typelevel::Interrupt;
18use crate::pac::otg::{regs, vals}; 18use crate::pac::otg::{regs, vals};
19use crate::rcc::sealed::RccPeripheral; 19use crate::rcc::sealed::RccPeripheral;
20use crate::time::Hertz; 20use crate::time::Hertz;
@@ -24,7 +24,7 @@ pub struct InterruptHandler<T: Instance> {
24 _phantom: PhantomData<T>, 24 _phantom: PhantomData<T>,
25} 25}
26 26
27impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> { 27impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
28 unsafe fn on_interrupt() { 28 unsafe fn on_interrupt() {
29 trace!("irq"); 29 trace!("irq");
30 let r = T::regs(); 30 let r = T::regs();
@@ -291,7 +291,7 @@ impl<'d, T: Instance> Driver<'d, T> {
291 /// Endpoint allocation will fail if it is too small. 291 /// Endpoint allocation will fail if it is too small.
292 pub fn new_fs( 292 pub fn new_fs(
293 _peri: impl Peripheral<P = T> + 'd, 293 _peri: impl Peripheral<P = T> + 'd,
294 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 294 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
295 dp: impl Peripheral<P = impl DpPin<T>> + 'd, 295 dp: impl Peripheral<P = impl DpPin<T>> + 'd,
296 dm: impl Peripheral<P = impl DmPin<T>> + 'd, 296 dm: impl Peripheral<P = impl DmPin<T>> + 'd,
297 ep_out_buffer: &'d mut [u8], 297 ep_out_buffer: &'d mut [u8],
@@ -322,7 +322,7 @@ impl<'d, T: Instance> Driver<'d, T> {
322 /// Endpoint allocation will fail if it is too small. 322 /// Endpoint allocation will fail if it is too small.
323 pub fn new_hs_ulpi( 323 pub fn new_hs_ulpi(
324 _peri: impl Peripheral<P = T> + 'd, 324 _peri: impl Peripheral<P = T> + 'd,
325 _irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd, 325 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
326 ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd, 326 ulpi_clk: impl Peripheral<P = impl UlpiClkPin<T>> + 'd,
327 ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd, 327 ulpi_dir: impl Peripheral<P = impl UlpiDirPin<T>> + 'd,
328 ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd, 328 ulpi_nxt: impl Peripheral<P = impl UlpiNxtPin<T>> + 'd,
diff --git a/examples/stm32f7/build.rs b/examples/stm32f7/build.rs
index c4e15f19c..2b5d412a9 100644
--- a/examples/stm32f7/build.rs
+++ b/examples/stm32f7/build.rs
@@ -1,9 +1,8 @@
1//! adapted from https://github.com/stm32-rs/stm32f7xx-hal/blob/master/build.rs 1//! adapted from https://github.com/stm32-rs/stm32f7xx-hal/blob/master/build.rs
2use std::env;
3use std::fs::File; 2use std::fs::File;
4use std::io::prelude::*; 3use std::io::prelude::*;
5use std::io::{self};
6use std::path::PathBuf; 4use std::path::PathBuf;
5use std::{env, io};
7 6
8#[derive(Debug)] 7#[derive(Debug)]
9enum Error { 8enum Error {