Merge pull request #3104 from birdistheword96/main

Fix: Ensure I2C bus is free before master-write operation

1 files changed, 5 insertions, 0 deletions

diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 80163c287..8c8df79dd 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -109,6 +109,11 @@ impl<'d, M: Mode> I2c<'d, M> {
             timeout.check()?;
         }
 
+        // Wait for the bus to be free
+        while info.regs.isr().read().busy() {
+            timeout.check()?;
+        }
+
         let reload = if reload {
             i2c::vals::Reload::NOTCOMPLETED
         } else {