Add PIO functions.

Add some (I think) needed functions:
ConfigPins::set_sideset_pins (the other pin types are covered, why not this one?)
Several runtime StateMachine manipulations:
 - addr()
 - tx_threshold()
 - set_tx_threshold
 - rx_threshold()
 - set_rx_threshold()
 - set_thresholds() - both at once, same value

1 files changed, 55 insertions, 0 deletions

diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs
index 7632d3168..51b526400 100644
--- a/embassy-rp/src/pio/mod.rs
+++ b/embassy-rp/src/pio/mod.rs
@@ -670,6 +670,16 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
         self.exec.jmp_pin = pin.pin();
     }
 
+    /// Sets the range of pins affected by SIDE instructions. The range must be consecutive.
+    /// Set pins must configured as outputs using [`StateMachine::set_pin_dirs`] to be
+    /// effective.
+    pub fn set_sideset_pins(&mut self, pins: &[&Pin<'d, PIO>]) {
+        assert!(pins.len() <= 5);
+        assert_consecutive(pins);
+        self.pins.sideset_base = pins.first().map_or(0, |p| p.pin());
+        self.pins.sideset_count = pins.len() as u8;
+    }
+
     /// Sets the range of pins affected by SET instructions. The range must be consecutive.
     /// Set pins must configured as outputs using [`StateMachine::set_pin_dirs`] to be
     /// effective.
@@ -816,6 +826,51 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
         }
     }
 
+    /// Read current instruction address for this state machine
+    pub fn addr(&self) -> u8 {
+        let addr = Self::this_sm().addr();
+        addr.read().addr()
+    }
+
+    /// Read TX FIFO threshold for this state machine.
+    pub fn tx_threshold(&self) -> u8 {
+        let shiftctrl = Self::this_sm().shiftctrl();
+        shiftctrl.read().pull_thresh()
+    }
+
+    /// Set/change the TX FIFO threshold for this state machine.
+    pub fn set_tx_threshold(&mut self, threshold: u8) {
+        assert!(threshold <= 31);
+        let shiftctrl = Self::this_sm().shiftctrl();
+        shiftctrl.modify(|w| {
+            w.set_pull_thresh(threshold);
+        });
+    }
+
+    /// Read TX FIFO threshold for this state machine.
+    pub fn rx_threshold(&self) -> u8 {
+        Self::this_sm().shiftctrl().read().push_thresh()
+    }
+
+    /// Set/change the RX FIFO threshold for this state machine.
+    pub fn set_rx_threshold(&mut self, threshold: u8) {
+        assert!(threshold <= 31);
+        let shiftctrl = Self::this_sm().shiftctrl();
+        shiftctrl.modify(|w| {
+            w.set_push_thresh(threshold);
+        });
+    }
+
+    /// Set/change both TX and RX FIFO thresholds for this state machine.
+    pub fn set_thresholds(&mut self, threshold: u8) {
+        assert!(threshold <= 31);
+        let shiftctrl = Self::this_sm().shiftctrl();
+        shiftctrl.modify(|w| {
+            w.set_push_thresh(threshold);
+            w.set_pull_thresh(threshold);
+        });
+    }
+
     /// Set the clock divider for this state machine.
     pub fn set_clock_divider(&mut self, clock_divider: FixedU32<U8>) {
         let sm = Self::this_sm();