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authorMichael Zill <[email protected]>2024-04-09 06:56:15 +0200
committerDario Nieuwenhuis <[email protected]>2024-04-13 03:33:04 +0200
commit9f4d320d676a5177535db0e1d78159126db20644 (patch)
treec70a61ade1f1a492bb3ff3fc1f0f2e8c360ee095
parentb1902957c99ff59b10c74ca7607299ddf14217ca (diff)
stm32/spi,crc: update for new PAC
-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/src/crc/v1.rs12
-rw-r--r--embassy-stm32/src/crc/v2v3.rs16
-rw-r--r--embassy-stm32/src/spi/mod.rs17
4 files changed, 34 insertions, 15 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 89b24f0eb..93792ecf8 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -70,7 +70,7 @@ rand_core = "0.6.3"
70sdio-host = "0.5.0" 70sdio-host = "0.5.0"
71critical-section = "1.1" 71critical-section = "1.1"
72#stm32-metapac = { version = "15" } 72#stm32-metapac = { version = "15" }
73stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9" } 73stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c" }
74 74
75vcell = "0.1.3" 75vcell = "0.1.3"
76nb = "1.0.0" 76nb = "1.0.0"
@@ -96,7 +96,7 @@ proc-macro2 = "1.0.36"
96quote = "1.0.15" 96quote = "1.0.15"
97 97
98#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} 98#stm32-metapac = { version = "15", default-features = false, features = ["metadata"]}
99stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-2b7ec569a5510c324693f0515ac8ea20b12917a9", default-features = false, features = ["metadata"]} 99stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-0c4baf478324e19741c7a9795ab0aa8217c3691c", default-features = false, features = ["metadata"]}
100 100
101[features] 101[features]
102default = ["rt"] 102default = ["rt"]
diff --git a/embassy-stm32/src/crc/v1.rs b/embassy-stm32/src/crc/v1.rs
index f8909d438..e8e0270af 100644
--- a/embassy-stm32/src/crc/v1.rs
+++ b/embassy-stm32/src/crc/v1.rs
@@ -32,6 +32,9 @@ impl<'d> Crc<'d> {
32 /// Feeds a word to the peripheral and returns the current CRC value 32 /// Feeds a word to the peripheral and returns the current CRC value
33 pub fn feed_word(&mut self, word: u32) -> u32 { 33 pub fn feed_word(&mut self, word: u32) -> u32 {
34 // write a single byte to the device, and return the result 34 // write a single byte to the device, and return the result
35 #[cfg(not(crc_v1))]
36 PAC_CRC.dr32().write_value(word);
37 #[cfg(crc_v1)]
35 PAC_CRC.dr().write_value(word); 38 PAC_CRC.dr().write_value(word);
36 self.read() 39 self.read()
37 } 40 }
@@ -39,6 +42,9 @@ impl<'d> Crc<'d> {
39 /// Feed a slice of words to the peripheral and return the result. 42 /// Feed a slice of words to the peripheral and return the result.
40 pub fn feed_words(&mut self, words: &[u32]) -> u32 { 43 pub fn feed_words(&mut self, words: &[u32]) -> u32 {
41 for word in words { 44 for word in words {
45 #[cfg(not(crc_v1))]
46 PAC_CRC.dr32().write_value(*word);
47 #[cfg(crc_v1)]
42 PAC_CRC.dr().write_value(*word); 48 PAC_CRC.dr().write_value(*word);
43 } 49 }
44 50
@@ -46,6 +52,12 @@ impl<'d> Crc<'d> {
46 } 52 }
47 53
48 /// Read the CRC result value. 54 /// Read the CRC result value.
55 #[cfg(not(crc_v1))]
56 pub fn read(&self) -> u32 {
57 PAC_CRC.dr32().read()
58 }
59 /// Read the CRC result value.
60 #[cfg(crc_v1)]
49 pub fn read(&self) -> u32 { 61 pub fn read(&self) -> u32 {
50 PAC_CRC.dr().read() 62 PAC_CRC.dr().read()
51 } 63 }
diff --git a/embassy-stm32/src/crc/v2v3.rs b/embassy-stm32/src/crc/v2v3.rs
index 46f5ea1be..13fb6778c 100644
--- a/embassy-stm32/src/crc/v2v3.rs
+++ b/embassy-stm32/src/crc/v2v3.rs
@@ -136,7 +136,7 @@ impl<'d> Crc<'d> {
136 /// Feeds a byte into the CRC peripheral. Returns the computed checksum. 136 /// Feeds a byte into the CRC peripheral. Returns the computed checksum.
137 pub fn feed_byte(&mut self, byte: u8) -> u32 { 137 pub fn feed_byte(&mut self, byte: u8) -> u32 {
138 PAC_CRC.dr8().write_value(byte); 138 PAC_CRC.dr8().write_value(byte);
139 PAC_CRC.dr().read() 139 PAC_CRC.dr32().read()
140 } 140 }
141 141
142 /// Feeds an slice of bytes into the CRC peripheral. Returns the computed checksum. 142 /// Feeds an slice of bytes into the CRC peripheral. Returns the computed checksum.
@@ -144,30 +144,30 @@ impl<'d> Crc<'d> {
144 for byte in bytes { 144 for byte in bytes {
145 PAC_CRC.dr8().write_value(*byte); 145 PAC_CRC.dr8().write_value(*byte);
146 } 146 }
147 PAC_CRC.dr().read() 147 PAC_CRC.dr32().read()
148 } 148 }
149 /// Feeds a halfword into the CRC peripheral. Returns the computed checksum. 149 /// Feeds a halfword into the CRC peripheral. Returns the computed checksum.
150 pub fn feed_halfword(&mut self, halfword: u16) -> u32 { 150 pub fn feed_halfword(&mut self, halfword: u16) -> u32 {
151 PAC_CRC.dr16().write_value(halfword); 151 PAC_CRC.dr16().write_value(halfword);
152 PAC_CRC.dr().read() 152 PAC_CRC.dr32().read()
153 } 153 }
154 /// Feeds an slice of halfwords into the CRC peripheral. Returns the computed checksum. 154 /// Feeds an slice of halfwords into the CRC peripheral. Returns the computed checksum.
155 pub fn feed_halfwords(&mut self, halfwords: &[u16]) -> u32 { 155 pub fn feed_halfwords(&mut self, halfwords: &[u16]) -> u32 {
156 for halfword in halfwords { 156 for halfword in halfwords {
157 PAC_CRC.dr16().write_value(*halfword); 157 PAC_CRC.dr16().write_value(*halfword);
158 } 158 }
159 PAC_CRC.dr().read() 159 PAC_CRC.dr32().read()
160 } 160 }
161 /// Feeds a words into the CRC peripheral. Returns the computed checksum. 161 /// Feeds a words into the CRC peripheral. Returns the computed checksum.
162 pub fn feed_word(&mut self, word: u32) -> u32 { 162 pub fn feed_word(&mut self, word: u32) -> u32 {
163 PAC_CRC.dr().write_value(word as u32); 163 PAC_CRC.dr32().write_value(word as u32);
164 PAC_CRC.dr().read() 164 PAC_CRC.dr32().read()
165 } 165 }
166 /// Feeds an slice of words into the CRC peripheral. Returns the computed checksum. 166 /// Feeds an slice of words into the CRC peripheral. Returns the computed checksum.
167 pub fn feed_words(&mut self, words: &[u32]) -> u32 { 167 pub fn feed_words(&mut self, words: &[u32]) -> u32 {
168 for word in words { 168 for word in words {
169 PAC_CRC.dr().write_value(*word as u32); 169 PAC_CRC.dr32().write_value(*word as u32);
170 } 170 }
171 PAC_CRC.dr().read() 171 PAC_CRC.dr32().read()
172 } 172 }
173} 173}
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index 0b38c4288..340cfde03 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -735,18 +735,22 @@ trait RegsExt {
735 735
736impl RegsExt for Regs { 736impl RegsExt for Regs {
737 fn tx_ptr<W>(&self) -> *mut W { 737 fn tx_ptr<W>(&self) -> *mut W {
738 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] 738 #[cfg(any(spi_v1, spi_f1))]
739 let dr = self.dr(); 739 let dr = self.dr();
740 #[cfg(spi_v2)]
741 let dr = self.dr16();
740 #[cfg(any(spi_v3, spi_v4, spi_v5))] 742 #[cfg(any(spi_v3, spi_v4, spi_v5))]
741 let dr = self.txdr(); 743 let dr = self.txdr32();
742 dr.as_ptr() as *mut W 744 dr.as_ptr() as *mut W
743 } 745 }
744 746
745 fn rx_ptr<W>(&self) -> *mut W { 747 fn rx_ptr<W>(&self) -> *mut W {
746 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] 748 #[cfg(any(spi_v1, spi_f1))]
747 let dr = self.dr(); 749 let dr = self.dr();
750 #[cfg(spi_v2)]
751 let dr = self.dr16();
748 #[cfg(any(spi_v3, spi_v4, spi_v5))] 752 #[cfg(any(spi_v3, spi_v4, spi_v5))]
749 let dr = self.rxdr(); 753 let dr = self.rxdr32();
750 dr.as_ptr() as *mut W 754 dr.as_ptr() as *mut W
751 } 755 }
752} 756}
@@ -815,11 +819,14 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> {
815fn flush_rx_fifo(regs: Regs) { 819fn flush_rx_fifo(regs: Regs) {
816 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))] 820 #[cfg(not(any(spi_v3, spi_v4, spi_v5)))]
817 while regs.sr().read().rxne() { 821 while regs.sr().read().rxne() {
822 #[cfg(spi_v1)]
818 let _ = regs.dr().read(); 823 let _ = regs.dr().read();
824 #[cfg(spi_v2)]
825 let _ = regs.dr16().read();
819 } 826 }
820 #[cfg(any(spi_v3, spi_v4, spi_v5))] 827 #[cfg(any(spi_v3, spi_v4, spi_v5))]
821 while regs.sr().read().rxp() { 828 while regs.sr().read().rxp() {
822 let _ = regs.rxdr().read(); 829 let _ = regs.rxdr32().read();
823 } 830 }
824} 831}
825 832