stm32: add lp to l0

5 files changed, 48 insertions, 6 deletions

diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 24d0912f0..51909e43b 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -21,7 +21,7 @@ flavors = [
     { regex_feature = "stm32g4.*", target = "thumbv7em-none-eabi" },
     { regex_feature = "stm32h5.*", target = "thumbv8m.main-none-eabihf" },
     { regex_feature = "stm32h7.*", target = "thumbv7em-none-eabi" },
-    { regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi" },
+    { regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi", features = ["low-power"] },
     { regex_feature = "stm32l1.*", target = "thumbv7m-none-eabi" },
     { regex_feature = "stm32l4.*", target = "thumbv7em-none-eabi" },
     { regex_feature = "stm32l5.*", target = "thumbv8m.main-none-eabihf" },
diff --git a/embassy-stm32/src/low_power.rs b/embassy-stm32/src/low_power.rs
index 7e678d323..b42b674e1 100644
--- a/embassy-stm32/src/low_power.rs
+++ b/embassy-stm32/src/low_power.rs
@@ -95,8 +95,21 @@ impl Executor {
 
         self.time_driver.set_rtc(rtc);
 
+        #[cfg(not(stm32l0))]
         crate::interrupt::typelevel::RTC_WKUP::unpend();
-        unsafe { crate::interrupt::typelevel::RTC_WKUP::enable() };
+
+        #[cfg(not(stm32l0))]
+        unsafe {
+            crate::interrupt::typelevel::RTC_WKUP::enable()
+        };
+
+        #[cfg(stm32l0)]
+        crate::interrupt::typelevel::RTC::unpend();
+
+        #[cfg(stm32l0)]
+        unsafe {
+            crate::interrupt::typelevel::RTC::enable()
+        };
 
         rtc.enable_wakeup_line();
     }
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index 76d0f3a36..059a32116 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -58,13 +58,13 @@ impl BackupDomain {
     ))]
     #[allow(dead_code, unused_variables)]
     fn modify<R>(f: impl FnOnce(&mut Bdcr) -> R) -> R {
-        #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1))]
+        #[cfg(any(rtc_v2f2, rtc_v2f3, rtc_v2l1, rtc_v2l0))]
         let cr = crate::pac::PWR.cr();
         #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l4, rtc_v2wb, rtc_v3, rtc_v3u5))]
         let cr = crate::pac::PWR.cr1();
 
         // TODO: Missing from PAC for l0 and f0?
-        #[cfg(not(any(rtc_v2f0, rtc_v2l0, rtc_v3u5)))]
+        #[cfg(not(any(rtc_v2f0, rtc_v3u5)))]
         {
             cr.modify(|w| w.set_dbp(true));
             while !cr.read().dbp() {}
diff --git a/embassy-stm32/src/rcc/l0.rs b/embassy-stm32/src/rcc/l0.rs
index 7f9ab01f1..3c8511ffd 100644
--- a/embassy-stm32/src/rcc/l0.rs
+++ b/embassy-stm32/src/rcc/l0.rs
@@ -1,4 +1,6 @@
+use super::bd::BackupDomain;
 pub use super::bus::{AHBPrescaler, APBPrescaler};
+use super::RtcClockSource;
 use crate::pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
 use crate::pac::RCC;
 #[cfg(crs)]
@@ -135,6 +137,7 @@ pub struct Config {
     pub apb2_pre: APBPrescaler,
     #[cfg(crs)]
     pub enable_hsi48: bool,
+    pub rtc: Option<RtcClockSource>,
 }
 
 impl Default for Config {
@@ -147,6 +150,7 @@ impl Default for Config {
             apb2_pre: APBPrescaler::NotDivided,
             #[cfg(crs)]
             enable_hsi48: false,
+            rtc: None,
         }
     }
 }
@@ -231,6 +235,10 @@ pub(crate) unsafe fn init(config: Config) {
         }
     };
 
+    config.rtc.map(|rtc| {
+        BackupDomain::configure_ls(rtc, None);
+    });
+
     RCC.cfgr().modify(|w| {
         w.set_sw(sw);
         w.set_hpre(config.ahb_pre.into());
diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs
index 9037389ec..1fa9f2fe3 100644
--- a/embassy-stm32/src/rtc/v2.rs
+++ b/embassy-stm32/src/rtc/v2.rs
@@ -15,7 +15,7 @@ pub(crate) enum WakeupPrescaler {
     Div16 = 16,
 }
 
-#[cfg(any(stm32wb, stm32f4))]
+#[cfg(any(stm32wb, stm32f4, stm32l0))]
 impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
     fn from(val: WakeupPrescaler) -> Self {
         use crate::pac::rtc::vals::Wucksel;
@@ -29,7 +29,7 @@ impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
     }
 }
 
-#[cfg(any(stm32wb, stm32f4))]
+#[cfg(any(stm32wb, stm32f4, stm32l0))]
 impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler {
     fn from(val: crate::pac::rtc::vals::Wucksel) -> Self {
         use crate::pac::rtc::vals::Wucksel;
@@ -67,10 +67,15 @@ impl super::Rtc {
     pub(crate) fn start_wakeup_alarm(&self, requested_duration: embassy_time::Duration) {
         use embassy_time::{Duration, TICK_HZ};
 
+        #[cfg(not(stm32l0))]
         use crate::rcc::get_freqs;
 
+        #[cfg(not(stm32l0))]
         let rtc_hz = unsafe { get_freqs() }.rtc.unwrap().0 as u64;
 
+        #[cfg(stm32l0)]
+        let rtc_hz = 32_768u64;
+
         let rtc_ticks = requested_duration.as_ticks() * rtc_hz / TICK_HZ;
         let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32);
 
@@ -109,7 +114,14 @@ impl super::Rtc {
     pub(crate) fn enable_wakeup_line(&self) {
         use crate::pac::EXTI;
 
+        #[cfg(stm32l0)]
+        EXTI.rtsr(0).modify(|w| w.set_line(20, true));
+        #[cfg(stm32l0)]
+        EXTI.imr(0).modify(|w| w.set_line(20, true));
+
+        #[cfg(not(stm32l0))]
         EXTI.rtsr(0).modify(|w| w.set_line(22, true));
+        #[cfg(not(stm32l0))]
         EXTI.imr(0).modify(|w| w.set_line(22, true));
     }
 
@@ -126,8 +138,17 @@ impl super::Rtc {
             regs.cr().modify(|w| w.set_wute(false));
             regs.isr().modify(|w| w.set_wutf(false));
 
+            #[cfg(not(stm32l0))]
             crate::pac::EXTI.pr(0).modify(|w| w.set_line(22, true));
+
+            #[cfg(stm32l0)]
+            crate::pac::EXTI.pr(0).modify(|w| w.set_line(20, true));
+
+            #[cfg(not(stm32l0))]
             crate::interrupt::typelevel::RTC_WKUP::unpend();
+
+            #[cfg(stm32l0)]
+            crate::interrupt::typelevel::RTC::unpend();
         });
 
         critical_section::with(|cs| {