feat(dma): implement type-safe DMA request source API

Replace raw u8 DMA request sources with typed request system
following the embassy-imxrt pattern. This provides compile-time
verification that peripherals use correct DMA request sources.

Changes:
- Define DmaRequest trait for type-safe request sources
- Add sealed SealedDmaRequest trait to prevent external implementation
- Create Lpuart{0-5}{Tx,Rx}Request marker types for each LPUART DMA request
- Update DmaChannel::set_request_source() to accept generic R: DmaRequest
- Replace Instance::TX_DMA_REQ/RX_DMA_REQ u8 constants with associated types
- Update all LPUART DMA call sites to use typed request API

This prevents errors like using LPUART2_RX request for LPUART0
at compile time with zero runtime overhead.

Addresses felipebalbi's review comment on PR #52 line 86.

2 files changed, 138 insertions, 50 deletions

diff --git a/src/dma.rs b/src/dma.rs
index 8d82c254a..7d1588516 100644
--- a/src/dma.rs
+++ b/src/dma.rs
@@ -341,22 +341,97 @@ pub enum EnableInterrupt {
 pub const DMA_MAX_TRANSFER_SIZE: usize = 0x7FFF;
 
 // ============================================================================
-// DMA Request Source Constants
+// DMA Request Source Types (Type-Safe API)
 // ============================================================================
 
-/// DMA request source numbers for LPUART peripherals on DMA0.
-pub const DMA_REQ_LPUART0_RX: u8 = 21;
-pub const DMA_REQ_LPUART0_TX: u8 = 22;
-pub const DMA_REQ_LPUART1_RX: u8 = 23;
-pub const DMA_REQ_LPUART1_TX: u8 = 24;
-pub const DMA_REQ_LPUART2_RX: u8 = 25;
-pub const DMA_REQ_LPUART2_TX: u8 = 26;
-pub const DMA_REQ_LPUART3_RX: u8 = 27;
-pub const DMA_REQ_LPUART3_TX: u8 = 28;
-pub const DMA_REQ_LPUART4_RX: u8 = 29;
-pub const DMA_REQ_LPUART4_TX: u8 = 30;
-pub const DMA_REQ_LPUART5_RX: u8 = 31;
-pub const DMA_REQ_LPUART5_TX: u8 = 32;
+/// Trait for type-safe DMA request sources.
+///
+/// Each peripheral that can trigger DMA requests implements this trait
+/// with marker types that encode the correct request source number at
+/// compile time. This prevents using the wrong request source for a
+/// peripheral.
+///
+/// # Example
+///
+/// ```ignore
+/// // The LPUART2 RX request source is automatically derived from the type:
+/// channel.set_request_source::<Lpuart2RxRequest>();
+/// ```
+///
+/// This trait is sealed and cannot be implemented outside this crate.
+#[allow(private_bounds)]
+pub trait DmaRequest: sealed::SealedDmaRequest {
+    /// The hardware request source number for the DMA mux.
+    const REQUEST_NUMBER: u8;
+}
+
+/// Macro to define a DMA request type.
+///
+/// Creates a zero-sized marker type that implements `DmaRequest` with
+/// the specified request number.
+macro_rules! define_dma_request {
+    ($(#[$meta:meta])* $name:ident = $num:expr) => {
+        $(#[$meta])*
+        #[derive(Debug, Copy, Clone)]
+        pub struct $name;
+
+        impl sealed::SealedDmaRequest for $name {}
+
+        impl DmaRequest for $name {
+            const REQUEST_NUMBER: u8 = $num;
+        }
+    };
+}
+
+// LPUART DMA request sources (from MCXA276 reference manual Table 4-8)
+define_dma_request!(
+    /// DMA request source for LPUART0 RX.
+    Lpuart0RxRequest = 21
+);
+define_dma_request!(
+    /// DMA request source for LPUART0 TX.
+    Lpuart0TxRequest = 22
+);
+define_dma_request!(
+    /// DMA request source for LPUART1 RX.
+    Lpuart1RxRequest = 23
+);
+define_dma_request!(
+    /// DMA request source for LPUART1 TX.
+    Lpuart1TxRequest = 24
+);
+define_dma_request!(
+    /// DMA request source for LPUART2 RX.
+    Lpuart2RxRequest = 25
+);
+define_dma_request!(
+    /// DMA request source for LPUART2 TX.
+    Lpuart2TxRequest = 26
+);
+define_dma_request!(
+    /// DMA request source for LPUART3 RX.
+    Lpuart3RxRequest = 27
+);
+define_dma_request!(
+    /// DMA request source for LPUART3 TX.
+    Lpuart3TxRequest = 28
+);
+define_dma_request!(
+    /// DMA request source for LPUART4 RX.
+    Lpuart4RxRequest = 29
+);
+define_dma_request!(
+    /// DMA request source for LPUART4 TX.
+    Lpuart4TxRequest = 30
+);
+define_dma_request!(
+    /// DMA request source for LPUART5 RX.
+    Lpuart5RxRequest = 31
+);
+define_dma_request!(
+    /// DMA request source for LPUART5 TX.
+    Lpuart5TxRequest = 32
+);
 
 // ============================================================================
 // Channel Trait (Sealed Pattern)
@@ -372,6 +447,9 @@ mod sealed {
         /// Interrupt vector for this channel.
         fn interrupt(&self) -> Interrupt;
     }
+
+    /// Sealed trait for DMA request sources.
+    pub trait SealedDmaRequest {}
 }
 
 /// Marker trait implemented by HAL peripheral tokens that map to a DMA0
@@ -1452,26 +1530,40 @@ impl<C: Channel> DmaChannel<C> {
         cortex_m::asm::dsb();
     }
 
-    /// Configure the integrated channel MUX to use the given request
-    /// source value (for example [`DMA_REQ_LPUART2_TX`] or
-    /// [`DMA_REQ_LPUART2_RX`]).
+    /// Configure the integrated channel MUX to use the given typed
+    /// DMA request source (e.g., [`Lpuart2TxRequest`] or [`Lpuart2RxRequest`]).
+    ///
+    /// This is the type-safe version that uses marker types to ensure
+    /// compile-time verification of request source validity.
     ///
     /// # Safety
     ///
-    /// Caller must ensure the request source mapping matches the
-    /// peripheral that will drive this channel.
+    /// The channel must be properly configured before enabling requests.
+    /// The caller must ensure the DMA request source matches the peripheral
+    /// that will drive this channel.
     ///
     /// # Note
     ///
     /// The NXP SDK requires a two-step write sequence: first clear
     /// the mux to 0, then set the actual source. This is a hardware
     /// requirement on eDMA4 for the mux to properly latch.
+    ///
+    /// # Example
+    ///
+    /// ```ignore
+    /// use embassy_mcxa::dma::{DmaChannel, Lpuart2RxRequest};
+    ///
+    /// // Type-safe: compiler verifies this is a valid DMA request type
+    /// unsafe {
+    ///     channel.set_request_source::<Lpuart2RxRequest>();
+    /// }
+    /// ```
     #[inline]
-    pub unsafe fn set_request_source(&self, request: u8) {
+    pub unsafe fn set_request_source<R: DmaRequest>(&self) {
         // Two-step write per NXP SDK: clear to 0, then set actual source.
         self.tcd().ch_mux().write(|w| w.src().bits(0));
         cortex_m::asm::dsb(); // Ensure the clear completes before setting new source
-        self.tcd().ch_mux().write(|w| w.src().bits(request));
+        self.tcd().ch_mux().write(|w| w.src().bits(R::REQUEST_NUMBER));
     }
 
     /// Enable hardware requests for this channel (ERQ=1).
diff --git a/src/lpuart/mod.rs b/src/lpuart/mod.rs
index bcac1fdbd..a2072ae2a 100644
--- a/src/lpuart/mod.rs
+++ b/src/lpuart/mod.rs
@@ -18,7 +18,9 @@ pub mod buffered;
 // DMA INTEGRATION
 // ============================================================================
 
-use crate::dma::{Channel as DmaChannelTrait, DmaChannel, EnableInterrupt, RingBuffer, DMA_MAX_TRANSFER_SIZE};
+use crate::dma::{
+    Channel as DmaChannelTrait, DmaChannel, DmaRequest, EnableInterrupt, RingBuffer, DMA_MAX_TRANSFER_SIZE,
+};
 
 // ============================================================================
 // MISC
@@ -50,14 +52,14 @@ pub struct Info {
 pub trait Instance: SealedInstance + PeripheralType + 'static + Send + Gate<MrccPeriphConfig = LpuartConfig> {
     const CLOCK_INSTANCE: crate::clocks::periph_helpers::LpuartInstance;
     type Interrupt: interrupt::typelevel::Interrupt;
-    /// DMA request source for TX
-    const TX_DMA_REQ: u8;
-    /// DMA request source for RX
-    const RX_DMA_REQ: u8;
+    /// Type-safe DMA request source for TX
+    type TxDmaRequest: DmaRequest;
+    /// Type-safe DMA request source for RX
+    type RxDmaRequest: DmaRequest;
 }
 
 macro_rules! impl_instance {
-    ($($n:expr, $tx_req:expr, $rx_req:expr);* $(;)?) => {
+    ($($n:expr);* $(;)?) => {
         $(
             paste!{
                 impl SealedInstance for crate::peripherals::[<LPUART $n>] {
@@ -82,29 +84,23 @@ macro_rules! impl_instance {
                     const CLOCK_INSTANCE: crate::clocks::periph_helpers::LpuartInstance
                         = crate::clocks::periph_helpers::LpuartInstance::[<Lpuart $n>];
                     type Interrupt = crate::interrupt::typelevel::[<LPUART $n>];
-                    const TX_DMA_REQ: u8 = $tx_req;
-                    const RX_DMA_REQ: u8 = $rx_req;
+                    type TxDmaRequest = crate::dma::[<Lpuart $n TxRequest>];
+                    type RxDmaRequest = crate::dma::[<Lpuart $n RxRequest>];
                 }
             }
         )*
     };
 }
 
-// DMA request sources from MCXA276 reference manual
-// LPUART0: RX=21, TX=22
-// LPUART1: RX=23, TX=24
-// LPUART2: RX=25, TX=26
-// LPUART3: RX=27, TX=28
-// LPUART4: RX=29, TX=30
-// LPUART5: RX=31, TX=32
-impl_instance!(
-    0, 22, 21;
-    1, 24, 23;
-    2, 26, 25;
-    3, 28, 27;
-    4, 30, 29;
-    5, 32, 31;
-);
+// DMA request sources are now type-safe via associated types.
+// The request source numbers are defined in src/dma.rs:
+// LPUART0: RX=21, TX=22 -> Lpuart0RxRequest, Lpuart0TxRequest
+// LPUART1: RX=23, TX=24 -> Lpuart1RxRequest, Lpuart1TxRequest
+// LPUART2: RX=25, TX=26 -> Lpuart2RxRequest, Lpuart2TxRequest
+// LPUART3: RX=27, TX=28 -> Lpuart3RxRequest, Lpuart3TxRequest
+// LPUART4: RX=29, TX=30 -> Lpuart4RxRequest, Lpuart4TxRequest
+// LPUART5: RX=31, TX=32 -> Lpuart5RxRequest, Lpuart5TxRequest
+impl_instance!(0; 1; 2; 3; 4; 5);
 
 // ============================================================================
 // INSTANCE HELPER FUNCTIONS
@@ -1196,8 +1192,8 @@ impl<'a, T: Instance, C: DmaChannelTrait> LpuartTxDma<'a, T, C> {
             self.tx_dma.clear_done();
             self.tx_dma.clear_interrupt();
 
-            // Set DMA request source from instance type
-            self.tx_dma.set_request_source(T::TX_DMA_REQ);
+            // Set DMA request source from instance type (type-safe)
+            self.tx_dma.set_request_source::<T::TxDmaRequest>();
 
             // Configure TCD for memory-to-peripheral transfer
             self.tx_dma
@@ -1307,8 +1303,8 @@ impl<'a, T: Instance, C: DmaChannelTrait> LpuartRxDma<'a, T, C> {
             self.rx_dma.clear_done();
             self.rx_dma.clear_interrupt();
 
-            // Set DMA request source from instance type
-            self.rx_dma.set_request_source(T::RX_DMA_REQ);
+            // Set DMA request source from instance type (type-safe)
+            self.rx_dma.set_request_source::<T::RxDmaRequest>();
 
             // Configure TCD for peripheral-to-memory transfer
             self.rx_dma
@@ -1398,8 +1394,8 @@ impl<'a, T: Instance, C: DmaChannelTrait> LpuartRxDma<'a, T, C> {
         // Get the peripheral data register address
         let peri_addr = self.info.regs.data().as_ptr() as *const u8;
 
-        // Configure DMA request source for this LPUART instance
-        self.rx_dma.set_request_source(T::RX_DMA_REQ);
+        // Configure DMA request source for this LPUART instance (type-safe)
+        self.rx_dma.set_request_source::<T::RxDmaRequest>();
 
         // Enable RX DMA request in the LPUART peripheral
         self.info.regs.baud().modify(|_, w| w.rdmae().enabled());