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authorLiu Hancheng <[email protected]>2025-01-01 17:28:37 +0800
committerLiu Hancheng <[email protected]>2025-01-01 17:28:37 +0800
commita3a8dee57906bffdd2a6f29c46abab48bfe0b2c3 (patch)
tree44d608f32bf5e2a2812c7338b13a02f5d3d8efd8
parente2c866119f941a1fa54e95b91076d1e299757bdb (diff)
refactor: exclude stm32l0 for 32bit timer branch
Signed-off-by: Liu Hancheng <[email protected]>
-rw-r--r--embassy-stm32/src/timer/simple_pwm.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index e3c790213..0fc2a1bf0 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -423,6 +423,7 @@ macro_rules! impl_waveform_chx {
423 ) 423 )
424 .await 424 .await
425 } 425 }
426 #[cfg(not(stm32l0))]
426 TimerBits::Bits32 => { 427 TimerBits::Bits32 => {
427 // the data must be aligned to quad words 428 // the data must be aligned to quad words
428 assert!(duty.len() % 4 == 0); 429 assert!(duty.len() % 4 == 0);