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authorkbleeke <[email protected]>2023-03-19 16:43:46 +0100
committerkbleeke <[email protected]>2023-03-19 17:00:45 +0100
commita6a2a035d57ced9a7a9bb2ef325885063ea83295 (patch)
tree35481496cc4a9fbd7870b594be7458503c80b300
parent0ff606dfc151b1b3812087b7508fdf4bee3b240b (diff)
even faster pio speed are possible
-rw-r--r--examples/rpi-pico-w/src/pio.rs22
-rw-r--r--rust-toolchain.toml2
-rw-r--r--src/bus.rs31
3 files changed, 43 insertions, 12 deletions
diff --git a/examples/rpi-pico-w/src/pio.rs b/examples/rpi-pico-w/src/pio.rs
index abb71b5de..1bf304d5d 100644
--- a/examples/rpi-pico-w/src/pio.rs
+++ b/examples/rpi-pico-w/src/pio.rs
@@ -2,7 +2,7 @@ use core::slice;
2 2
3use cyw43::SpiBusCyw43; 3use cyw43::SpiBusCyw43;
4use embassy_rp::dma::Channel; 4use embassy_rp::dma::Channel;
5use embassy_rp::gpio::{Pin, Pull}; 5use embassy_rp::gpio::{Drive, Pin, Pull, SlewRate};
6use embassy_rp::pio::{PioStateMachine, ShiftDirection}; 6use embassy_rp::pio::{PioStateMachine, ShiftDirection};
7use embassy_rp::relocate::RelocatedProgram; 7use embassy_rp::relocate::RelocatedProgram;
8use embassy_rp::{pio_instr_util, Peripheral}; 8use embassy_rp::{pio_instr_util, Peripheral};
@@ -43,10 +43,11 @@ where
43 "out pins, 1 side 0" 43 "out pins, 1 side 0"
44 "jmp x-- lp side 1" 44 "jmp x-- lp side 1"
45 "set pindirs, 0 side 0" 45 "set pindirs, 0 side 0"
46 // "nop side 1" 46 "nop side 1"
47 "lp2:" 47 "lp2:"
48 "in pins, 1 side 0" 48 "in pins, 1 side 1"
49 "jmp y-- lp2 side 1" 49 "jmp y-- lp2 side 0"
50
50 ".wrap" 51 ".wrap"
51 ); 52 );
52 53
@@ -55,15 +56,22 @@ where
55 let mut pin_io = sm.make_pio_pin(dio); 56 let mut pin_io = sm.make_pio_pin(dio);
56 pin_io.set_pull(Pull::Down); 57 pin_io.set_pull(Pull::Down);
57 pin_io.set_schmitt(true); 58 pin_io.set_schmitt(true);
58 let pin_clk = sm.make_pio_pin(clk); 59 pin_io.set_input_sync_bypass(true);
60
61 let mut pin_clk = sm.make_pio_pin(clk);
62 pin_clk.set_drive_strength(Drive::_12mA);
63 pin_clk.set_slew_rate(SlewRate::Fast);
59 64
60 sm.write_instr(relocated.origin() as usize, relocated.code()); 65 sm.write_instr(relocated.origin() as usize, relocated.code());
61 66
67 // 32 Mhz
68 sm.set_clkdiv(0x03E8);
69
62 // 16 Mhz 70 // 16 Mhz
63 sm.set_clkdiv(0x07d0); 71 // sm.set_clkdiv(0x07d0);
64 72
65 // 8Mhz 73 // 8Mhz
66 sm.set_clkdiv(0x0a_00); 74 // sm.set_clkdiv(0x0a_00);
67 75
68 // 1Mhz 76 // 1Mhz
69 // sm.set_clkdiv(0x7d_00); 77 // sm.set_clkdiv(0x7d_00);
diff --git a/rust-toolchain.toml b/rust-toolchain.toml
index ffbcbd6f9..20c10c3f1 100644
--- a/rust-toolchain.toml
+++ b/rust-toolchain.toml
@@ -1,7 +1,7 @@
1# Before upgrading check that everything is available on all tier1 targets here: 1# Before upgrading check that everything is available on all tier1 targets here:
2# https://rust-lang.github.io/rustup-components-history 2# https://rust-lang.github.io/rustup-components-history
3[toolchain] 3[toolchain]
4channel = "nightly-2022-11-22" 4channel = "nightly-2023-03-19"
5components = [ "rust-src", "rustfmt" ] 5components = [ "rust-src", "rustfmt" ]
6targets = [ 6targets = [
7 "thumbv6m-none-eabi", 7 "thumbv6m-none-eabi",
diff --git a/src/bus.rs b/src/bus.rs
index aaa79b198..e4f9a69bb 100644
--- a/src/bus.rs
+++ b/src/bus.rs
@@ -4,6 +4,7 @@ use embassy_time::{Duration, Timer};
4use embedded_hal_1::digital::OutputPin; 4use embedded_hal_1::digital::OutputPin;
5use embedded_hal_1::spi::ErrorType; 5use embedded_hal_1::spi::ErrorType;
6use embedded_hal_async::spi::{transaction, SpiDevice}; 6use embedded_hal_async::spi::{transaction, SpiDevice};
7use futures::FutureExt;
7 8
8use crate::consts::*; 9use crate::consts::*;
9 10
@@ -46,18 +47,40 @@ where
46 self.pwr.set_high().unwrap(); 47 self.pwr.set_high().unwrap();
47 Timer::after(Duration::from_millis(250)).await; 48 Timer::after(Duration::from_millis(250)).await;
48 49
49 while self.read32_swapped(REG_BUS_TEST_RO).await != FEEDBEAD {} 50 while self
51 .read32_swapped(REG_BUS_TEST_RO)
52 .inspect(|v| defmt::trace!("{:#x}", v))
53 .await
54 != FEEDBEAD
55 {}
50 56
51 self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await; 57 self.write32_swapped(REG_BUS_TEST_RW, TEST_PATTERN).await;
52 let val = self.read32_swapped(REG_BUS_TEST_RW).await; 58 let val = self
59 .read32_swapped(REG_BUS_TEST_RW)
60 .inspect(|v| defmt::trace!("{:#x}", v))
61 .await;
53 assert_eq!(val, TEST_PATTERN); 62 assert_eq!(val, TEST_PATTERN);
54 63
64 self.read32_swapped(REG_BUS_CTRL)
65 .inspect(|v| defmt::trace!("{:#010b}", (v & 0xff)))
66 .await;
67
55 // 32-bit word length, little endian (which is the default endianess). 68 // 32-bit word length, little endian (which is the default endianess).
56 self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await; 69 self.write32_swapped(REG_BUS_CTRL, WORD_LENGTH_32 | HIGH_SPEED).await;
57 70
58 let val = self.read32(FUNC_BUS, REG_BUS_TEST_RO).await; 71 self.read8(FUNC_BUS, REG_BUS_CTRL)
72 .inspect(|v| defmt::trace!("{:#b}", v))
73 .await;
74
75 let val = self
76 .read32(FUNC_BUS, REG_BUS_TEST_RO)
77 .inspect(|v| defmt::trace!("{:#x}", v))
78 .await;
59 assert_eq!(val, FEEDBEAD); 79 assert_eq!(val, FEEDBEAD);
60 let val = self.read32(FUNC_BUS, REG_BUS_TEST_RW).await; 80 let val = self
81 .read32(FUNC_BUS, REG_BUS_TEST_RW)
82 .inspect(|v| defmt::trace!("{:#x}", v))
83 .await;
61 assert_eq!(val, TEST_PATTERN); 84 assert_eq!(val, TEST_PATTERN);
62 } 85 }
63 86