diff options
| author | Torin Cooper-Bennun <[email protected]> | 2024-02-27 23:45:53 +0000 |
|---|---|---|
| committer | Torin Cooper-Bennun <[email protected]> | 2024-02-27 23:47:41 +0000 |
| commit | a8da42943fdd57ded612399d18846398cbd011d3 (patch) | |
| tree | 9ae705ce7d13d67da34a42945f60368c04d23ae5 | |
| parent | 0ed402fd79a6dfbe4f3b2187a97d160ce7c3140b (diff) | |
stm32: can: fd: rm some irrelevant commented code and dead code
| -rw-r--r-- | embassy-stm32/src/can/fd/peripheral.rs | 42 | ||||
| -rw-r--r-- | embassy-stm32/src/can/frame.rs | 2 |
2 files changed, 0 insertions, 44 deletions
diff --git a/embassy-stm32/src/can/fd/peripheral.rs b/embassy-stm32/src/can/fd/peripheral.rs index 7d26a5fe0..c5606b883 100644 --- a/embassy-stm32/src/can/fd/peripheral.rs +++ b/embassy-stm32/src/can/fd/peripheral.rs | |||
| @@ -62,11 +62,6 @@ impl Registers { | |||
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | pub fn put_tx_frame(&self, bufidx: usize, header: &Header, buffer: &[u8]) { | 64 | pub fn put_tx_frame(&self, bufidx: usize, header: &Header, buffer: &[u8]) { |
| 65 | // Fill level - do we have a msg? | ||
| 66 | //if self.regs.rxfs(fifonr).read().ffl() < 1 { return None; } | ||
| 67 | |||
| 68 | //let read_idx = self.regs.rxfs(fifonr).read().fgi(); | ||
| 69 | |||
| 70 | let mailbox = self.tx_buffer_element(bufidx); | 65 | let mailbox = self.tx_buffer_element(bufidx); |
| 71 | 66 | ||
| 72 | mailbox.reset(); | 67 | mailbox.reset(); |
| @@ -169,9 +164,6 @@ impl Registers { | |||
| 169 | } | 164 | } |
| 170 | 165 | ||
| 171 | #[inline] | 166 | #[inline] |
| 172 | //fn abort_pending_mailbox<PTX, R>(&mut self, idx: Mailbox, pending: PTX) -> Option<R> | ||
| 173 | //where | ||
| 174 | // PTX: FnOnce(Mailbox, TxFrameHeader, &[u32]) -> R, | ||
| 175 | pub fn abort_pending_mailbox_generic<F: embedded_can::Frame>(&self, bufidx: usize) -> Option<F> { | 167 | pub fn abort_pending_mailbox_generic<F: embedded_can::Frame>(&self, bufidx: usize) -> Option<F> { |
| 176 | if self.abort(bufidx) { | 168 | if self.abort(bufidx) { |
| 177 | let mailbox = self.tx_buffer_element(bufidx); | 169 | let mailbox = self.tx_buffer_element(bufidx); |
| @@ -187,7 +179,6 @@ impl Registers { | |||
| 187 | return None; | 179 | return None; |
| 188 | } | 180 | } |
| 189 | 181 | ||
| 190 | //let tx_ram = self.tx_msg_ram(); | ||
| 191 | let mut data = [0u8; 64]; | 182 | let mut data = [0u8; 64]; |
| 192 | data_from_tx_buffer(&mut data, mailbox, len as usize); | 183 | data_from_tx_buffer(&mut data, mailbox, len as usize); |
| 193 | 184 | ||
| @@ -205,9 +196,6 @@ impl Registers { | |||
| 205 | } | 196 | } |
| 206 | } | 197 | } |
| 207 | 198 | ||
| 208 | /// As Transmit, but if there is a pending frame, `pending` will be called so that the frame can | ||
| 209 | /// be preserved. | ||
| 210 | //pub fn transmit_preserve<PTX, P>( | ||
| 211 | pub fn write<F: embedded_can::Frame + CanHeader>(&self, frame: &F) -> nb::Result<Option<F>, Infallible> { | 199 | pub fn write<F: embedded_can::Frame + CanHeader>(&self, frame: &F) -> nb::Result<Option<F>, Infallible> { |
| 212 | let queue_is_full = self.tx_queue_is_full(); | 200 | let queue_is_full = self.tx_queue_is_full(); |
| 213 | 201 | ||
| @@ -459,8 +447,6 @@ impl Registers { | |||
| 459 | /// parameter to this method. | 447 | /// parameter to this method. |
| 460 | #[inline] | 448 | #[inline] |
| 461 | pub fn set_nominal_bit_timing(&mut self, btr: NominalBitTiming) { | 449 | pub fn set_nominal_bit_timing(&mut self, btr: NominalBitTiming) { |
| 462 | //self.control.config.nbtr = btr; | ||
| 463 | |||
| 464 | self.regs.nbtp().write(|w| { | 450 | self.regs.nbtp().write(|w| { |
| 465 | w.set_nbrp(btr.nbrp() - 1); | 451 | w.set_nbrp(btr.nbrp() - 1); |
| 466 | w.set_ntseg1(btr.ntseg1() - 1); | 452 | w.set_ntseg1(btr.ntseg1() - 1); |
| @@ -473,8 +459,6 @@ impl Registers { | |||
| 473 | /// This is not used when frame_transmit is set to anything other than AllowFdCanAndBRS. | 459 | /// This is not used when frame_transmit is set to anything other than AllowFdCanAndBRS. |
| 474 | #[inline] | 460 | #[inline] |
| 475 | pub fn set_data_bit_timing(&mut self, btr: DataBitTiming) { | 461 | pub fn set_data_bit_timing(&mut self, btr: DataBitTiming) { |
| 476 | //self.control.config.dbtr = btr; | ||
| 477 | |||
| 478 | self.regs.dbtp().write(|w| { | 462 | self.regs.dbtp().write(|w| { |
| 479 | w.set_dbrp(btr.dbrp() - 1); | 463 | w.set_dbrp(btr.dbrp() - 1); |
| 480 | w.set_dtseg1(btr.dtseg1() - 1); | 464 | w.set_dtseg1(btr.dtseg1() - 1); |
| @@ -492,7 +476,6 @@ impl Registers { | |||
| 492 | #[inline] | 476 | #[inline] |
| 493 | pub fn set_automatic_retransmit(&mut self, enabled: bool) { | 477 | pub fn set_automatic_retransmit(&mut self, enabled: bool) { |
| 494 | self.regs.cccr().modify(|w| w.set_dar(!enabled)); | 478 | self.regs.cccr().modify(|w| w.set_dar(!enabled)); |
| 495 | //self.control.config.automatic_retransmit = enabled; | ||
| 496 | } | 479 | } |
| 497 | 480 | ||
| 498 | /// Configures the transmit pause feature. See | 481 | /// Configures the transmit pause feature. See |
| @@ -500,21 +483,18 @@ impl Registers { | |||
| 500 | #[inline] | 483 | #[inline] |
| 501 | pub fn set_transmit_pause(&mut self, enabled: bool) { | 484 | pub fn set_transmit_pause(&mut self, enabled: bool) { |
| 502 | self.regs.cccr().modify(|w| w.set_txp(!enabled)); | 485 | self.regs.cccr().modify(|w| w.set_txp(!enabled)); |
| 503 | //self.control.config.transmit_pause = enabled; | ||
| 504 | } | 486 | } |
| 505 | 487 | ||
| 506 | /// Configures non-iso mode. See [`FdCanConfig::set_non_iso_mode`] | 488 | /// Configures non-iso mode. See [`FdCanConfig::set_non_iso_mode`] |
| 507 | #[inline] | 489 | #[inline] |
| 508 | pub fn set_non_iso_mode(&mut self, enabled: bool) { | 490 | pub fn set_non_iso_mode(&mut self, enabled: bool) { |
| 509 | self.regs.cccr().modify(|w| w.set_niso(enabled)); | 491 | self.regs.cccr().modify(|w| w.set_niso(enabled)); |
| 510 | //self.control.config.non_iso_mode = enabled; | ||
| 511 | } | 492 | } |
| 512 | 493 | ||
| 513 | /// Configures edge filtering. See [`FdCanConfig::set_edge_filtering`] | 494 | /// Configures edge filtering. See [`FdCanConfig::set_edge_filtering`] |
| 514 | #[inline] | 495 | #[inline] |
| 515 | pub fn set_edge_filtering(&mut self, enabled: bool) { | 496 | pub fn set_edge_filtering(&mut self, enabled: bool) { |
| 516 | self.regs.cccr().modify(|w| w.set_efbi(enabled)); | 497 | self.regs.cccr().modify(|w| w.set_efbi(enabled)); |
| 517 | //self.control.config.edge_filtering = enabled; | ||
| 518 | } | 498 | } |
| 519 | 499 | ||
| 520 | /// Configures frame transmission mode. See | 500 | /// Configures frame transmission mode. See |
| @@ -534,16 +514,12 @@ impl Registers { | |||
| 534 | #[cfg(not(stm32h7))] | 514 | #[cfg(not(stm32h7))] |
| 535 | w.set_brse(brse); | 515 | w.set_brse(brse); |
| 536 | }); | 516 | }); |
| 537 | |||
| 538 | //self.control.config.frame_transmit = fts; | ||
| 539 | } | 517 | } |
| 540 | 518 | ||
| 541 | /// Sets the protocol exception handling on/off | 519 | /// Sets the protocol exception handling on/off |
| 542 | #[inline] | 520 | #[inline] |
| 543 | pub fn set_protocol_exception_handling(&mut self, enabled: bool) { | 521 | pub fn set_protocol_exception_handling(&mut self, enabled: bool) { |
| 544 | self.regs.cccr().modify(|w| w.set_pxhd(!enabled)); | 522 | self.regs.cccr().modify(|w| w.set_pxhd(!enabled)); |
| 545 | |||
| 546 | //self.control.config.protocol_exception_handling = enabled; | ||
| 547 | } | 523 | } |
| 548 | 524 | ||
| 549 | /// Configures and resets the timestamp counter | 525 | /// Configures and resets the timestamp counter |
| @@ -567,8 +543,6 @@ impl Registers { | |||
| 567 | w.set_tcp(tcp); | 543 | w.set_tcp(tcp); |
| 568 | w.set_tss(tss); | 544 | w.set_tss(tss); |
| 569 | }); | 545 | }); |
| 570 | |||
| 571 | //self.control.config.timestamp_source = select; | ||
| 572 | } | 546 | } |
| 573 | 547 | ||
| 574 | #[cfg(not(stm32h7))] | 548 | #[cfg(not(stm32h7))] |
| @@ -696,22 +670,6 @@ fn data_from_tx_buffer(buffer: &mut [u8], mailbox: &TxBufferElement, len: usize) | |||
| 696 | } | 670 | } |
| 697 | } | 671 | } |
| 698 | 672 | ||
| 699 | impl From<&RxFifoElement> for ClassicFrame { | ||
| 700 | fn from(mailbox: &RxFifoElement) -> Self { | ||
| 701 | let header_reg = mailbox.header.read(); | ||
| 702 | |||
| 703 | let id = make_id(header_reg.id().bits(), header_reg.xtd().bits()); | ||
| 704 | let dlc = header_reg.to_data_length().len(); | ||
| 705 | let len = dlc as usize; | ||
| 706 | |||
| 707 | let mut buffer: [u8; 64] = [0; 64]; | ||
| 708 | data_from_fifo(&mut buffer, mailbox, len); | ||
| 709 | let data = ClassicData::new(&buffer[0..len]); | ||
| 710 | let header = Header::new(id, dlc, header_reg.rtr().bits()); | ||
| 711 | ClassicFrame::new(header, data.unwrap()) | ||
| 712 | } | ||
| 713 | } | ||
| 714 | |||
| 715 | fn extract_frame(mailbox: &RxFifoElement, buffer: &mut [u8]) -> Option<(Header, u16)> { | 673 | fn extract_frame(mailbox: &RxFifoElement, buffer: &mut [u8]) -> Option<(Header, u16)> { |
| 716 | let header_reg = mailbox.header.read(); | 674 | let header_reg = mailbox.header.read(); |
| 717 | 675 | ||
diff --git a/embassy-stm32/src/can/frame.rs b/embassy-stm32/src/can/frame.rs index 59b9fb08c..00a441db6 100644 --- a/embassy-stm32/src/can/frame.rs +++ b/embassy-stm32/src/can/frame.rs | |||
| @@ -292,8 +292,6 @@ pub struct FdFrame { | |||
| 292 | } | 292 | } |
| 293 | 293 | ||
| 294 | impl FdFrame { | 294 | impl FdFrame { |
| 295 | pub(crate) const MAX_DATA_LEN: usize = 64; | ||
| 296 | |||
| 297 | /// Create a new CAN classic Frame | 295 | /// Create a new CAN classic Frame |
| 298 | pub fn new(can_header: Header, data: FdData) -> FdFrame { | 296 | pub fn new(can_header: Header, data: FdData) -> FdFrame { |
| 299 | FdFrame { can_header, data } | 297 | FdFrame { can_header, data } |
