diff options
| author | xoviat <[email protected]> | 2025-11-13 10:26:56 -0600 |
|---|---|---|
| committer | xoviat <[email protected]> | 2025-11-13 10:26:56 -0600 |
| commit | a8de2ccb8c0721284281715ce6eda28271db3950 (patch) | |
| tree | aabbbf939da5decd47a228c115798d62b43ff83c | |
| parent | 1a3da1c582b4a9fec1af561e2f4a7ed0352aff33 (diff) | |
remove allow dead_code
| -rw-r--r-- | embassy-stm32/src/adc/adc4.rs | 1 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/mod.rs | 14 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v3.rs | 1 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v4.rs | 1 |
4 files changed, 10 insertions, 7 deletions
diff --git a/embassy-stm32/src/adc/adc4.rs b/embassy-stm32/src/adc/adc4.rs index d816eea57..babdebfdb 100644 --- a/embassy-stm32/src/adc/adc4.rs +++ b/embassy-stm32/src/adc/adc4.rs | |||
| @@ -158,6 +158,7 @@ foreach_adc!( | |||
| 158 | reg.set_chselrmod(Chselrmod::ENABLE_INPUT) | 158 | reg.set_chselrmod(Chselrmod::ENABLE_INPUT) |
| 159 | }); | 159 | }); |
| 160 | } | 160 | } |
| 161 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))] | ||
| 161 | _ => unreachable!(), | 162 | _ => unreachable!(), |
| 162 | } | 163 | } |
| 163 | } | 164 | } |
diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index c91d68e87..fd5b94224 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs | |||
| @@ -88,19 +88,17 @@ pub(crate) trait SealedAdcChannel<T> { | |||
| 88 | } | 88 | } |
| 89 | 89 | ||
| 90 | // Temporary patch for ADCs that have not implemented the standard iface yet | 90 | // Temporary patch for ADCs that have not implemented the standard iface yet |
| 91 | #[cfg(not(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4)))] | 91 | #[cfg(any(adc_v1, adc_l0, adc_f1, adc_f3v1, adc_f3v2, adc_f3v3, adc_v1, adc_c0))] |
| 92 | trait_set::trait_set! { | 92 | trait_set::trait_set! { |
| 93 | pub trait AnyInstance = Instance; | 93 | pub trait AnyInstance = Instance; |
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | #[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4))] | 96 | #[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4))] |
| 97 | #[allow(dead_code)] | ||
| 98 | pub trait BasicAnyInstance { | 97 | pub trait BasicAnyInstance { |
| 99 | type SampleTime; | 98 | type SampleTime; |
| 100 | } | 99 | } |
| 101 | 100 | ||
| 102 | #[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4))] | 101 | #[cfg(any(adc_v2, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba, adc_g4))] |
| 103 | #[allow(dead_code)] | ||
| 104 | pub(self) trait SealedAnyInstance: BasicAnyInstance { | 102 | pub(self) trait SealedAnyInstance: BasicAnyInstance { |
| 105 | fn enable(); | 103 | fn enable(); |
| 106 | fn start(); | 104 | fn start(); |
| @@ -108,6 +106,7 @@ pub(self) trait SealedAnyInstance: BasicAnyInstance { | |||
| 108 | fn convert() -> u16; | 106 | fn convert() -> u16; |
| 109 | fn configure_dma(conversion_mode: ConversionMode); | 107 | fn configure_dma(conversion_mode: ConversionMode); |
| 110 | fn configure_sequence(sequence: impl ExactSizeIterator<Item = ((u8, bool), Self::SampleTime)>); | 108 | fn configure_sequence(sequence: impl ExactSizeIterator<Item = ((u8, bool), Self::SampleTime)>); |
| 109 | #[allow(dead_code)] | ||
| 111 | fn dr() -> *mut u16; | 110 | fn dr() -> *mut u16; |
| 112 | } | 111 | } |
| 113 | 112 | ||
| @@ -169,17 +168,18 @@ pub enum Averaging { | |||
| 169 | } | 168 | } |
| 170 | 169 | ||
| 171 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba))] | 170 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba))] |
| 172 | #[allow(dead_code)] | ||
| 173 | pub(crate) enum ConversionMode { | 171 | pub(crate) enum ConversionMode { |
| 172 | // Should match the cfg on "read" below | ||
| 174 | #[cfg(any(adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba))] | 173 | #[cfg(any(adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba))] |
| 175 | Singular, | 174 | Singular, |
| 176 | #[allow(dead_code)] | 175 | // Should match the cfg on "into_ring_buffered" below |
| 176 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))] | ||
| 177 | Repeated(RegularConversionMode), | 177 | Repeated(RegularConversionMode), |
| 178 | } | 178 | } |
| 179 | 179 | ||
| 180 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_h5, adc_h7rs, adc_u0, adc_v4, adc_u5, adc_wba))] | 180 | // Should match the cfg on "into_ring_buffered" below |
| 181 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))] | ||
| 181 | // Conversion mode for regular ADC channels | 182 | // Conversion mode for regular ADC channels |
| 182 | #[allow(dead_code)] | ||
| 183 | #[derive(Copy, Clone)] | 183 | #[derive(Copy, Clone)] |
| 184 | pub enum RegularConversionMode { | 184 | pub enum RegularConversionMode { |
| 185 | // Samples as fast as possible | 185 | // Samples as fast as possible |
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index fa191c663..78b497727 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs | |||
| @@ -259,6 +259,7 @@ impl<T: Instance> super::SealedAnyInstance for T { | |||
| 259 | reg.set_cont(true); | 259 | reg.set_cont(true); |
| 260 | reg.set_dmacfg(match conversion_mode { | 260 | reg.set_dmacfg(match conversion_mode { |
| 261 | ConversionMode::Singular => Dmacfg::ONE_SHOT, | 261 | ConversionMode::Singular => Dmacfg::ONE_SHOT, |
| 262 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))] | ||
| 262 | ConversionMode::Repeated(_) => Dmacfg::CIRCULAR, | 263 | ConversionMode::Repeated(_) => Dmacfg::CIRCULAR, |
| 263 | }); | 264 | }); |
| 264 | reg.set_dmaen(true); | 265 | reg.set_dmaen(true); |
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 5c4a1975f..804e63db6 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs | |||
| @@ -143,6 +143,7 @@ impl<T: Instance> super::SealedAnyInstance for T { | |||
| 143 | reg.set_dmngt(Dmngt::DMA_ONE_SHOT); | 143 | reg.set_dmngt(Dmngt::DMA_ONE_SHOT); |
| 144 | }); | 144 | }); |
| 145 | } | 145 | } |
| 146 | #[cfg(any(adc_v2, adc_g4, adc_v3, adc_g0, adc_u0))] | ||
| 146 | _ => unreachable!(), | 147 | _ => unreachable!(), |
| 147 | } | 148 | } |
| 148 | } | 149 | } |
