diff options
| author | Dario Nieuwenhuis <[email protected]> | 2024-03-10 22:42:03 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-03-10 22:42:03 +0000 |
| commit | ac06ca2fa0aa061a0053336433fa9cbfad5212ca (patch) | |
| tree | 966612be781cad238c399c2ef262358bf182d8f4 | |
| parent | a58891891b14783ca1c6a6f7bbede8924fc043d2 (diff) | |
| parent | 4a5b6e05fb806d70747e2abb2da7c90eeba0dc41 (diff) | |
Merge pull request #2680 from caleb-garrett/dma-priority
Configurable DMA Request Priority
| -rw-r--r-- | embassy-stm32/src/dma/dma_bdma.rs | 52 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/mod.rs | 8 | ||||
| -rw-r--r-- | embassy-stm32/src/sdmmc/mod.rs | 2 |
3 files changed, 52 insertions, 10 deletions
diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index 08aba2795..7b5b3cf58 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs | |||
| @@ -10,8 +10,7 @@ use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer, WritableDm | |||
| 10 | use super::word::{Word, WordSize}; | 10 | use super::word::{Word, WordSize}; |
| 11 | use super::{AnyChannel, Channel, Dir, Request, STATE}; | 11 | use super::{AnyChannel, Channel, Dir, Request, STATE}; |
| 12 | use crate::interrupt::typelevel::Interrupt; | 12 | use crate::interrupt::typelevel::Interrupt; |
| 13 | use crate::interrupt::Priority; | 13 | use crate::{interrupt, pac}; |
| 14 | use crate::pac; | ||
| 15 | 14 | ||
| 16 | pub(crate) struct ChannelInfo { | 15 | pub(crate) struct ChannelInfo { |
| 17 | pub(crate) dma: DmaInfo, | 16 | pub(crate) dma: DmaInfo, |
| @@ -45,6 +44,8 @@ pub struct TransferOptions { | |||
| 45 | /// FIFO threshold for DMA FIFO mode. If none, direct mode is used. | 44 | /// FIFO threshold for DMA FIFO mode. If none, direct mode is used. |
| 46 | #[cfg(dma)] | 45 | #[cfg(dma)] |
| 47 | pub fifo_threshold: Option<FifoThreshold>, | 46 | pub fifo_threshold: Option<FifoThreshold>, |
| 47 | /// Request priority level | ||
| 48 | pub priority: Priority, | ||
| 48 | /// Enable circular DMA | 49 | /// Enable circular DMA |
| 49 | /// | 50 | /// |
| 50 | /// Note: | 51 | /// Note: |
| @@ -68,6 +69,7 @@ impl Default for TransferOptions { | |||
| 68 | flow_ctrl: FlowControl::Dma, | 69 | flow_ctrl: FlowControl::Dma, |
| 69 | #[cfg(dma)] | 70 | #[cfg(dma)] |
| 70 | fifo_threshold: None, | 71 | fifo_threshold: None, |
| 72 | priority: Priority::VeryHigh, | ||
| 71 | circular: false, | 73 | circular: false, |
| 72 | half_transfer_ir: false, | 74 | half_transfer_ir: false, |
| 73 | complete_transfer_ir: true, | 75 | complete_transfer_ir: true, |
| @@ -75,6 +77,44 @@ impl Default for TransferOptions { | |||
| 75 | } | 77 | } |
| 76 | } | 78 | } |
| 77 | 79 | ||
| 80 | /// DMA request priority | ||
| 81 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] | ||
| 82 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | ||
| 83 | pub enum Priority { | ||
| 84 | /// Low Priority | ||
| 85 | Low, | ||
| 86 | /// Medium Priority | ||
| 87 | Medium, | ||
| 88 | /// High Priority | ||
| 89 | High, | ||
| 90 | /// Very High Priority | ||
| 91 | VeryHigh, | ||
| 92 | } | ||
| 93 | |||
| 94 | #[cfg(dma)] | ||
| 95 | impl From<Priority> for pac::dma::vals::Pl { | ||
| 96 | fn from(value: Priority) -> Self { | ||
| 97 | match value { | ||
| 98 | Priority::Low => pac::dma::vals::Pl::LOW, | ||
| 99 | Priority::Medium => pac::dma::vals::Pl::MEDIUM, | ||
| 100 | Priority::High => pac::dma::vals::Pl::HIGH, | ||
| 101 | Priority::VeryHigh => pac::dma::vals::Pl::VERYHIGH, | ||
| 102 | } | ||
| 103 | } | ||
| 104 | } | ||
| 105 | |||
| 106 | #[cfg(bdma)] | ||
| 107 | impl From<Priority> for pac::bdma::vals::Pl { | ||
| 108 | fn from(value: Priority) -> Self { | ||
| 109 | match value { | ||
| 110 | Priority::Low => pac::bdma::vals::Pl::LOW, | ||
| 111 | Priority::Medium => pac::bdma::vals::Pl::MEDIUM, | ||
| 112 | Priority::High => pac::bdma::vals::Pl::HIGH, | ||
| 113 | Priority::VeryHigh => pac::bdma::vals::Pl::VERYHIGH, | ||
| 114 | } | ||
| 115 | } | ||
| 116 | } | ||
| 117 | |||
| 78 | #[cfg(dma)] | 118 | #[cfg(dma)] |
| 79 | pub use dma_only::*; | 119 | pub use dma_only::*; |
| 80 | #[cfg(dma)] | 120 | #[cfg(dma)] |
| @@ -213,8 +253,8 @@ impl ChannelState { | |||
| 213 | /// safety: must be called only once | 253 | /// safety: must be called only once |
| 214 | pub(crate) unsafe fn init( | 254 | pub(crate) unsafe fn init( |
| 215 | cs: critical_section::CriticalSection, | 255 | cs: critical_section::CriticalSection, |
| 216 | #[cfg(dma)] dma_priority: Priority, | 256 | #[cfg(dma)] dma_priority: interrupt::Priority, |
| 217 | #[cfg(bdma)] bdma_priority: Priority, | 257 | #[cfg(bdma)] bdma_priority: interrupt::Priority, |
| 218 | ) { | 258 | ) { |
| 219 | foreach_interrupt! { | 259 | foreach_interrupt! { |
| 220 | ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => { | 260 | ($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => { |
| @@ -334,7 +374,7 @@ impl AnyChannel { | |||
| 334 | w.set_dir(dir.into()); | 374 | w.set_dir(dir.into()); |
| 335 | w.set_msize(data_size.into()); | 375 | w.set_msize(data_size.into()); |
| 336 | w.set_psize(data_size.into()); | 376 | w.set_psize(data_size.into()); |
| 337 | w.set_pl(pac::dma::vals::Pl::VERYHIGH); | 377 | w.set_pl(options.priority.into()); |
| 338 | w.set_minc(incr_mem); | 378 | w.set_minc(incr_mem); |
| 339 | w.set_pinc(false); | 379 | w.set_pinc(false); |
| 340 | w.set_teie(true); | 380 | w.set_teie(true); |
| @@ -374,7 +414,7 @@ impl AnyChannel { | |||
| 374 | w.set_tcie(options.complete_transfer_ir); | 414 | w.set_tcie(options.complete_transfer_ir); |
| 375 | w.set_htie(options.half_transfer_ir); | 415 | w.set_htie(options.half_transfer_ir); |
| 376 | w.set_circ(options.circular); | 416 | w.set_circ(options.circular); |
| 377 | w.set_pl(pac::bdma::vals::Pl::VERYHIGH); | 417 | w.set_pl(options.priority.into()); |
| 378 | w.set_en(false); // don't start yet | 418 | w.set_en(false); // don't start yet |
| 379 | }); | 419 | }); |
| 380 | } | 420 | } |
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index 960483f34..d5e88a20a 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs | |||
| @@ -23,7 +23,7 @@ use core::mem; | |||
| 23 | 23 | ||
| 24 | use embassy_hal_internal::{impl_peripheral, Peripheral}; | 24 | use embassy_hal_internal::{impl_peripheral, Peripheral}; |
| 25 | 25 | ||
| 26 | use crate::interrupt::Priority; | 26 | use crate::interrupt; |
| 27 | 27 | ||
| 28 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] | 28 | #[derive(Debug, Copy, Clone, PartialEq, Eq)] |
| 29 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 29 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| @@ -131,9 +131,9 @@ pub(crate) fn slice_ptr_parts_mut<T>(slice: *mut [T]) -> (usize, usize) { | |||
| 131 | // safety: must be called only once at startup | 131 | // safety: must be called only once at startup |
| 132 | pub(crate) unsafe fn init( | 132 | pub(crate) unsafe fn init( |
| 133 | cs: critical_section::CriticalSection, | 133 | cs: critical_section::CriticalSection, |
| 134 | #[cfg(bdma)] bdma_priority: Priority, | 134 | #[cfg(bdma)] bdma_priority: interrupt::Priority, |
| 135 | #[cfg(dma)] dma_priority: Priority, | 135 | #[cfg(dma)] dma_priority: interrupt::Priority, |
| 136 | #[cfg(gpdma)] gpdma_priority: Priority, | 136 | #[cfg(gpdma)] gpdma_priority: interrupt::Priority, |
| 137 | ) { | 137 | ) { |
| 138 | #[cfg(any(dma, bdma))] | 138 | #[cfg(any(dma, bdma))] |
| 139 | dma_bdma::init( | 139 | dma_bdma::init( |
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs index bf1d2ca9b..fa1f710d8 100644 --- a/embassy-stm32/src/sdmmc/mod.rs +++ b/embassy-stm32/src/sdmmc/mod.rs | |||
| @@ -240,12 +240,14 @@ const DMA_TRANSFER_OPTIONS: crate::dma::TransferOptions = crate::dma::TransferOp | |||
| 240 | mburst: crate::dma::Burst::Incr4, | 240 | mburst: crate::dma::Burst::Incr4, |
| 241 | flow_ctrl: crate::dma::FlowControl::Peripheral, | 241 | flow_ctrl: crate::dma::FlowControl::Peripheral, |
| 242 | fifo_threshold: Some(crate::dma::FifoThreshold::Full), | 242 | fifo_threshold: Some(crate::dma::FifoThreshold::Full), |
| 243 | priority: crate::dma::Priority::VeryHigh, | ||
| 243 | circular: false, | 244 | circular: false, |
| 244 | half_transfer_ir: false, | 245 | half_transfer_ir: false, |
| 245 | complete_transfer_ir: true, | 246 | complete_transfer_ir: true, |
| 246 | }; | 247 | }; |
| 247 | #[cfg(all(sdmmc_v1, not(dma)))] | 248 | #[cfg(all(sdmmc_v1, not(dma)))] |
| 248 | const DMA_TRANSFER_OPTIONS: crate::dma::TransferOptions = crate::dma::TransferOptions { | 249 | const DMA_TRANSFER_OPTIONS: crate::dma::TransferOptions = crate::dma::TransferOptions { |
| 250 | priority: crate::dma::Priority::VeryHigh, | ||
| 249 | circular: false, | 251 | circular: false, |
| 250 | half_transfer_ir: false, | 252 | half_transfer_ir: false, |
| 251 | complete_transfer_ir: true, | 253 | complete_transfer_ir: true, |
