diff options
| author | chemicstry <[email protected]> | 2022-10-24 22:39:13 +0300 |
|---|---|---|
| committer | chemicstry <[email protected]> | 2022-10-24 22:39:13 +0300 |
| commit | ac61e0ee9fcec2792c73806afe4c998019b0db75 (patch) | |
| tree | 362c60b3cd97f7c1ddfe25eddcb25a2559d4f901 | |
| parent | 33f75419e542ef52d7d6a1403c9e3dbfd1c39abe (diff) | |
fmt
| -rw-r--r-- | embassy-stm32/src/i2c/v2.rs | 106 |
1 files changed, 88 insertions, 18 deletions
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs index 876f6223f..aa4e6bb08 100644 --- a/embassy-stm32/src/i2c/v2.rs +++ b/embassy-stm32/src/i2c/v2.rs | |||
| @@ -189,7 +189,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 189 | Ok(()) | 189 | Ok(()) |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | unsafe fn master_write(address: u8, length: usize, stop: Stop, reload: bool, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 192 | unsafe fn master_write( |
| 193 | address: u8, | ||
| 194 | length: usize, | ||
| 195 | stop: Stop, | ||
| 196 | reload: bool, | ||
| 197 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 198 | ) -> Result<(), Error> { | ||
| 193 | assert!(length < 256); | 199 | assert!(length < 256); |
| 194 | 200 | ||
| 195 | // Wait for any previous address sequence to end | 201 | // Wait for any previous address sequence to end |
| @@ -221,7 +227,11 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 221 | Ok(()) | 227 | Ok(()) |
| 222 | } | 228 | } |
| 223 | 229 | ||
| 224 | unsafe fn master_continue(length: usize, reload: bool, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 230 | unsafe fn master_continue( |
| 231 | length: usize, | ||
| 232 | reload: bool, | ||
| 233 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 234 | ) -> Result<(), Error> { | ||
| 225 | assert!(length < 256 && length > 0); | 235 | assert!(length < 256 && length > 0); |
| 226 | 236 | ||
| 227 | while !T::regs().isr().read().tcr() { | 237 | while !T::regs().isr().read().tcr() { |
| @@ -331,7 +341,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 331 | } | 341 | } |
| 332 | } | 342 | } |
| 333 | 343 | ||
| 334 | fn read_internal(&mut self, address: u8, buffer: &mut [u8], restart: bool, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 344 | fn read_internal( |
| 345 | &mut self, | ||
| 346 | address: u8, | ||
| 347 | buffer: &mut [u8], | ||
| 348 | restart: bool, | ||
| 349 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 350 | ) -> Result<(), Error> { | ||
| 335 | let completed_chunks = buffer.len() / 255; | 351 | let completed_chunks = buffer.len() / 255; |
| 336 | let total_chunks = if completed_chunks * 255 == buffer.len() { | 352 | let total_chunks = if completed_chunks * 255 == buffer.len() { |
| 337 | completed_chunks | 353 | completed_chunks |
| @@ -347,7 +363,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 347 | Stop::Automatic, | 363 | Stop::Automatic, |
| 348 | last_chunk_idx != 0, | 364 | last_chunk_idx != 0, |
| 349 | restart, | 365 | restart, |
| 350 | &check_timeout | 366 | &check_timeout, |
| 351 | )?; | 367 | )?; |
| 352 | } | 368 | } |
| 353 | 369 | ||
| @@ -371,7 +387,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 371 | Ok(()) | 387 | Ok(()) |
| 372 | } | 388 | } |
| 373 | 389 | ||
| 374 | fn write_internal(&mut self, address: u8, bytes: &[u8], send_stop: bool, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 390 | fn write_internal( |
| 391 | &mut self, | ||
| 392 | address: u8, | ||
| 393 | bytes: &[u8], | ||
| 394 | send_stop: bool, | ||
| 395 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 396 | ) -> Result<(), Error> { | ||
| 375 | let completed_chunks = bytes.len() / 255; | 397 | let completed_chunks = bytes.len() / 255; |
| 376 | let total_chunks = if completed_chunks * 255 == bytes.len() { | 398 | let total_chunks = if completed_chunks * 255 == bytes.len() { |
| 377 | completed_chunks | 399 | completed_chunks |
| @@ -385,7 +407,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 385 | // ST SAD+W | 407 | // ST SAD+W |
| 386 | // NOTE(unsafe) We have &mut self | 408 | // NOTE(unsafe) We have &mut self |
| 387 | unsafe { | 409 | unsafe { |
| 388 | Self::master_write(address, bytes.len().min(255), Stop::Software, last_chunk_idx != 0, &check_timeout)?; | 410 | Self::master_write( |
| 411 | address, | ||
| 412 | bytes.len().min(255), | ||
| 413 | Stop::Software, | ||
| 414 | last_chunk_idx != 0, | ||
| 415 | &check_timeout, | ||
| 416 | )?; | ||
| 389 | } | 417 | } |
| 390 | 418 | ||
| 391 | for (number, chunk) in bytes.chunks(255).enumerate() { | 419 | for (number, chunk) in bytes.chunks(255).enumerate() { |
| @@ -422,7 +450,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 422 | bytes: &[u8], | 450 | bytes: &[u8], |
| 423 | first_slice: bool, | 451 | first_slice: bool, |
| 424 | last_slice: bool, | 452 | last_slice: bool, |
| 425 | check_timeout: impl Fn() -> Result<(), Error> | 453 | check_timeout: impl Fn() -> Result<(), Error>, |
| 426 | ) -> Result<(), Error> | 454 | ) -> Result<(), Error> |
| 427 | where | 455 | where |
| 428 | TXDMA: crate::i2c::TxDma<T>, | 456 | TXDMA: crate::i2c::TxDma<T>, |
| @@ -474,7 +502,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 474 | total_len.min(255), | 502 | total_len.min(255), |
| 475 | Stop::Software, | 503 | Stop::Software, |
| 476 | (total_chunks != 1) || !last_slice, | 504 | (total_chunks != 1) || !last_slice, |
| 477 | &check_timeout | 505 | &check_timeout, |
| 478 | )?; | 506 | )?; |
| 479 | } | 507 | } |
| 480 | } else { | 508 | } else { |
| @@ -516,7 +544,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 516 | Ok(()) | 544 | Ok(()) |
| 517 | } | 545 | } |
| 518 | 546 | ||
| 519 | async fn read_dma_internal(&mut self, address: u8, buffer: &mut [u8], restart: bool, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> | 547 | async fn read_dma_internal( |
| 548 | &mut self, | ||
| 549 | address: u8, | ||
| 550 | buffer: &mut [u8], | ||
| 551 | restart: bool, | ||
| 552 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 553 | ) -> Result<(), Error> | ||
| 520 | where | 554 | where |
| 521 | RXDMA: crate::i2c::RxDma<T>, | 555 | RXDMA: crate::i2c::RxDma<T>, |
| 522 | { | 556 | { |
| @@ -557,7 +591,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 557 | 591 | ||
| 558 | // NOTE(unsafe) self.rx_dma does not fiddle with the i2c registers | 592 | // NOTE(unsafe) self.rx_dma does not fiddle with the i2c registers |
| 559 | unsafe { | 593 | unsafe { |
| 560 | Self::master_read(address, total_len.min(255), Stop::Software, total_chunks != 1, restart, &check_timeout)?; | 594 | Self::master_read( |
| 595 | address, | ||
| 596 | total_len.min(255), | ||
| 597 | Stop::Software, | ||
| 598 | total_chunks != 1, | ||
| 599 | restart, | ||
| 600 | &check_timeout, | ||
| 601 | )?; | ||
| 561 | } | 602 | } |
| 562 | 603 | ||
| 563 | poll_fn(|cx| { | 604 | poll_fn(|cx| { |
| @@ -573,7 +614,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 573 | // NOTE(unsafe) self.rx_dma does not fiddle with the i2c registers | 614 | // NOTE(unsafe) self.rx_dma does not fiddle with the i2c registers |
| 574 | unsafe { | 615 | unsafe { |
| 575 | if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, &check_timeout) { | 616 | if let Err(e) = Self::master_continue(remaining_len.min(255), !last_piece, &check_timeout) { |
| 576 | return Poll::Ready(Err(e)) | 617 | return Poll::Ready(Err(e)); |
| 577 | } | 618 | } |
| 578 | T::regs().cr1().modify(|w| w.set_tcie(true)); | 619 | T::regs().cr1().modify(|w| w.set_tcie(true)); |
| 579 | } | 620 | } |
| @@ -660,7 +701,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 660 | // ========================= | 701 | // ========================= |
| 661 | // Blocking public API | 702 | // Blocking public API |
| 662 | 703 | ||
| 663 | pub fn blocking_read_timeout(&mut self, address: u8, buffer: &mut [u8], check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 704 | pub fn blocking_read_timeout( |
| 705 | &mut self, | ||
| 706 | address: u8, | ||
| 707 | buffer: &mut [u8], | ||
| 708 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 709 | ) -> Result<(), Error> { | ||
| 664 | self.read_internal(address, buffer, false, &check_timeout) | 710 | self.read_internal(address, buffer, false, &check_timeout) |
| 665 | // Automatic Stop | 711 | // Automatic Stop |
| 666 | } | 712 | } |
| @@ -669,7 +715,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 669 | self.blocking_read_timeout(address, buffer, || Ok(())) | 715 | self.blocking_read_timeout(address, buffer, || Ok(())) |
| 670 | } | 716 | } |
| 671 | 717 | ||
| 672 | pub fn blocking_write_timeout(&mut self, address: u8, bytes: &[u8], check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 718 | pub fn blocking_write_timeout( |
| 719 | &mut self, | ||
| 720 | address: u8, | ||
| 721 | bytes: &[u8], | ||
| 722 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 723 | ) -> Result<(), Error> { | ||
| 673 | self.write_internal(address, bytes, true, &check_timeout) | 724 | self.write_internal(address, bytes, true, &check_timeout) |
| 674 | } | 725 | } |
| 675 | 726 | ||
| @@ -677,7 +728,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 677 | self.blocking_write_timeout(address, bytes, || Ok(())) | 728 | self.blocking_write_timeout(address, bytes, || Ok(())) |
| 678 | } | 729 | } |
| 679 | 730 | ||
| 680 | pub fn blocking_write_read_timeout(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8], check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 731 | pub fn blocking_write_read_timeout( |
| 732 | &mut self, | ||
| 733 | address: u8, | ||
| 734 | bytes: &[u8], | ||
| 735 | buffer: &mut [u8], | ||
| 736 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 737 | ) -> Result<(), Error> { | ||
| 681 | self.write_internal(address, bytes, false, &check_timeout)?; | 738 | self.write_internal(address, bytes, false, &check_timeout)?; |
| 682 | self.read_internal(address, buffer, true, &check_timeout) | 739 | self.read_internal(address, buffer, true, &check_timeout) |
| 683 | // Automatic Stop | 740 | // Automatic Stop |
| @@ -687,7 +744,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 687 | self.blocking_write_read_timeout(address, bytes, buffer, || Ok(())) | 744 | self.blocking_write_read_timeout(address, bytes, buffer, || Ok(())) |
| 688 | } | 745 | } |
| 689 | 746 | ||
| 690 | pub fn blocking_write_vectored_timeout(&mut self, address: u8, bytes: &[&[u8]], check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> { | 747 | pub fn blocking_write_vectored_timeout( |
| 748 | &mut self, | ||
| 749 | address: u8, | ||
| 750 | bytes: &[&[u8]], | ||
| 751 | check_timeout: impl Fn() -> Result<(), Error>, | ||
| 752 | ) -> Result<(), Error> { | ||
| 691 | if bytes.is_empty() { | 753 | if bytes.is_empty() { |
| 692 | return Err(Error::ZeroLengthTransfer); | 754 | return Err(Error::ZeroLengthTransfer); |
| 693 | } | 755 | } |
| @@ -701,7 +763,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 701 | first_length.min(255), | 763 | first_length.min(255), |
| 702 | Stop::Software, | 764 | Stop::Software, |
| 703 | (first_length > 255) || (last_slice_index != 0), | 765 | (first_length > 255) || (last_slice_index != 0), |
| 704 | &check_timeout | 766 | &check_timeout, |
| 705 | )?; | 767 | )?; |
| 706 | } | 768 | } |
| 707 | 769 | ||
| @@ -718,7 +780,11 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 718 | if idx != 0 { | 780 | if idx != 0 { |
| 719 | // NOTE(unsafe) We have &mut self | 781 | // NOTE(unsafe) We have &mut self |
| 720 | unsafe { | 782 | unsafe { |
| 721 | Self::master_continue(slice_len.min(255), (idx != last_slice_index) || (slice_len > 255), &check_timeout)?; | 783 | Self::master_continue( |
| 784 | slice_len.min(255), | ||
| 785 | (idx != last_slice_index) || (slice_len > 255), | ||
| 786 | &check_timeout, | ||
| 787 | )?; | ||
| 722 | } | 788 | } |
| 723 | } | 789 | } |
| 724 | 790 | ||
| @@ -726,7 +792,11 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> { | |||
| 726 | if number != 0 { | 792 | if number != 0 { |
| 727 | // NOTE(unsafe) We have &mut self | 793 | // NOTE(unsafe) We have &mut self |
| 728 | unsafe { | 794 | unsafe { |
| 729 | Self::master_continue(chunk.len(), (number != last_chunk_idx) || (idx != last_slice_index), &check_timeout)?; | 795 | Self::master_continue( |
| 796 | chunk.len(), | ||
| 797 | (number != last_chunk_idx) || (idx != last_slice_index), | ||
| 798 | &check_timeout, | ||
| 799 | )?; | ||
| 730 | } | 800 | } |
| 731 | } | 801 | } |
| 732 | 802 | ||
