diff options
| author | Michael van Niekerk <[email protected]> | 2023-08-30 21:42:27 +0200 |
|---|---|---|
| committer | Michael van Niekerk <[email protected]> | 2023-08-30 21:42:27 +0200 |
| commit | ae174fd0e0102ad77d18c33754dc5493e58dfdb5 (patch) | |
| tree | 635ead81eba7f327205f8603370fcade0c5cb4b5 | |
| parent | 5c936d33d4891b42832745c50de4e35afeabd809 (diff) | |
RP2040: XOSC delay multiplier
| -rw-r--r-- | embassy-rp/src/clocks.rs | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs index 7b25ecffb..4637ae058 100644 --- a/embassy-rp/src/clocks.rs +++ b/embassy-rp/src/clocks.rs | |||
| @@ -94,6 +94,7 @@ impl ClockConfig { | |||
| 94 | post_div1: 6, | 94 | post_div1: 6, |
| 95 | post_div2: 5, | 95 | post_div2: 5, |
| 96 | }), | 96 | }), |
| 97 | delay_multiplier: 1 | ||
| 97 | }), | 98 | }), |
| 98 | ref_clk: RefClkConfig { | 99 | ref_clk: RefClkConfig { |
| 99 | src: RefClkSrc::Xosc, | 100 | src: RefClkSrc::Xosc, |
| @@ -203,6 +204,7 @@ pub struct XoscConfig { | |||
| 203 | pub hz: u32, | 204 | pub hz: u32, |
| 204 | pub sys_pll: Option<PllConfig>, | 205 | pub sys_pll: Option<PllConfig>, |
| 205 | pub usb_pll: Option<PllConfig>, | 206 | pub usb_pll: Option<PllConfig>, |
| 207 | pub delay_multiplier: u32, | ||
| 206 | } | 208 | } |
| 207 | 209 | ||
| 208 | pub struct PllConfig { | 210 | pub struct PllConfig { |
| @@ -363,7 +365,7 @@ pub(crate) unsafe fn init(config: ClockConfig) { | |||
| 363 | // start XOSC | 365 | // start XOSC |
| 364 | // datasheet mentions support for clock inputs into XIN, but doesn't go into | 366 | // datasheet mentions support for clock inputs into XIN, but doesn't go into |
| 365 | // how this is achieved. pico-sdk doesn't support this at all. | 367 | // how this is achieved. pico-sdk doesn't support this at all. |
| 366 | start_xosc(config.hz); | 368 | start_xosc(config.hz, config.delay_multiplier); |
| 367 | 369 | ||
| 368 | let pll_sys_freq = match config.sys_pll { | 370 | let pll_sys_freq = match config.sys_pll { |
| 369 | Some(sys_pll_config) => configure_pll(pac::PLL_SYS, config.hz, sys_pll_config), | 371 | Some(sys_pll_config) => configure_pll(pac::PLL_SYS, config.hz, sys_pll_config), |
| @@ -624,12 +626,12 @@ pub fn clk_rtc_freq() -> u16 { | |||
| 624 | CLOCKS.rtc.load(Ordering::Relaxed) | 626 | CLOCKS.rtc.load(Ordering::Relaxed) |
| 625 | } | 627 | } |
| 626 | 628 | ||
| 627 | fn start_xosc(crystal_hz: u32) { | 629 | fn start_xosc(crystal_hz: u32, delay_multiplier: u32) { |
| 628 | pac::XOSC | 630 | pac::XOSC |
| 629 | .ctrl() | 631 | .ctrl() |
| 630 | .write(|w| w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ)); | 632 | .write(|w| w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ)); |
| 631 | 633 | ||
| 632 | let startup_delay = ((crystal_hz / 1000) + 128) / 256; | 634 | let startup_delay = (((crystal_hz / 1000) + 128) * delay_multiplier) / 256; |
| 633 | pac::XOSC.startup().write(|w| w.set_delay(startup_delay as u16)); | 635 | pac::XOSC.startup().write(|w| w.set_delay(startup_delay as u16)); |
| 634 | pac::XOSC.ctrl().write(|w| { | 636 | pac::XOSC.ctrl().write(|w| { |
| 635 | w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ); | 637 | w.set_freq_range(pac::xosc::vals::CtrlFreqRange::_1_15MHZ); |
