diff options
| author | Timo Kröger <[email protected]> | 2024-03-12 20:40:47 +0100 |
|---|---|---|
| committer | Timo Kröger <[email protected]> | 2024-03-14 21:55:05 +0100 |
| commit | b634f8f5111001a51a8a80559aeab11e8209d65f (patch) | |
| tree | 5a072df5b23cc248d0b543add6c96749bec835eb | |
| parent | 6e5bb8003acf98e20592dd1e86fc1a5f1928e14f (diff) | |
[UCPD] Fix hard reset interrupt disable flags
| -rw-r--r-- | embassy-stm32/src/ucpd.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index 01cf42672..54d4bb132 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs | |||
| @@ -484,8 +484,8 @@ impl<'d, T: Instance> PdPhy<'d, T> { | |||
| 484 | 484 | ||
| 485 | // Clear the hardreset interrupt flags. | 485 | // Clear the hardreset interrupt flags. |
| 486 | T::REGS.icr().write(|w| { | 486 | T::REGS.icr().write(|w| { |
| 487 | w.set_txmsgdisccf(true); | 487 | w.set_hrstdisccf(true); |
| 488 | w.set_txmsgsentcf(true); | 488 | w.set_hrstsentcf(true); |
| 489 | }); | 489 | }); |
| 490 | 490 | ||
| 491 | // Trigger hard reset transmission. | 491 | // Trigger hard reset transmission. |