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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-05-08 21:12:04 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-05-08 21:12:04 +0000 |
| commit | b7a27113f054de558bd0649ea98462544e9129fb (patch) | |
| tree | ed559e992d4713500b890c69f94ab323e8d28f19 | |
| parent | e9ab960ebf1ab5da2e062663079b77aebf51c40f (diff) | |
| parent | 01fb447e9d8eec19c8bf766b5ae7f17c95233fd1 (diff) | |
Merge #762
762: Allow maximal clock for F7 HCLK r=Dirbaio a=matoushybl
Fixes a type in clock calculations, see: https://github.com/stm32-rs/stm32f7xx-hal/blob/aaf2034cab697577e6f4fc6079fc7e4691d7ad9d/src/rcc.rs#L347
Co-authored-by: Matous Hybl <[email protected]>
| -rw-r--r-- | embassy-stm32/src/rcc/f7.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/rcc/f7.rs b/embassy-stm32/src/rcc/f7.rs index 9f2c63c16..f45a725ce 100644 --- a/embassy-stm32/src/rcc/f7.rs +++ b/embassy-stm32/src/rcc/f7.rs | |||
| @@ -170,7 +170,7 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 170 | // Calculate real AHB clock | 170 | // Calculate real AHB clock |
| 171 | let hclk = sysclk / hpre_div; | 171 | let hclk = sysclk / hpre_div; |
| 172 | 172 | ||
| 173 | assert!(hclk < max::HCLK_MAX); | 173 | assert!(hclk <= max::HCLK_MAX); |
| 174 | 174 | ||
| 175 | let pclk1 = config | 175 | let pclk1 = config |
| 176 | .pclk1 | 176 | .pclk1 |