diff options
| author | xoviat <[email protected]> | 2023-07-29 19:25:18 -0500 |
|---|---|---|
| committer | xoviat <[email protected]> | 2023-07-29 19:25:18 -0500 |
| commit | bae31ebce7f5cf30a24e0af2157f962feb74f72c (patch) | |
| tree | a5988b2ef97ea4599931cc224b8593c09e8fc891 | |
| parent | fcbfd224a729c38d5ff94d94a25321a819254630 (diff) | |
stm32/dma: rename ringbuf
| -rw-r--r-- | embassy-stm32/src/dma/bdma.rs | 16 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/dma.rs | 12 | ||||
| -rw-r--r-- | embassy-stm32/src/dma/ringbuffer.rs | 18 | ||||
| -rw-r--r-- | embassy-stm32/src/usart/ringbuffered.rs | 6 |
4 files changed, 26 insertions, 26 deletions
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index d956047d5..1dad364b6 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs | |||
| @@ -9,7 +9,7 @@ use atomic_polyfill::AtomicUsize; | |||
| 9 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; | 9 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; |
| 10 | use embassy_sync::waitqueue::AtomicWaker; | 10 | use embassy_sync::waitqueue::AtomicWaker; |
| 11 | 11 | ||
| 12 | use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; | 12 | use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer}; |
| 13 | use super::word::{Word, WordSize}; | 13 | use super::word::{Word, WordSize}; |
| 14 | use super::Dir; | 14 | use super::Dir; |
| 15 | use crate::_generated::BDMA_CHANNEL_COUNT; | 15 | use crate::_generated::BDMA_CHANNEL_COUNT; |
| @@ -395,13 +395,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> { | |||
| 395 | } | 395 | } |
| 396 | } | 396 | } |
| 397 | 397 | ||
| 398 | pub struct RingBuffer<'a, C: Channel, W: Word> { | 398 | pub struct ReadableRingBuffer<'a, C: Channel, W: Word> { |
| 399 | cr: regs::Cr, | 399 | cr: regs::Cr, |
| 400 | channel: PeripheralRef<'a, C>, | 400 | channel: PeripheralRef<'a, C>, |
| 401 | ringbuf: DmaRingBuffer<'a, W>, | 401 | ringbuf: ReadableDmaRingBuffer<'a, W>, |
| 402 | } | 402 | } |
| 403 | 403 | ||
| 404 | impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | 404 | impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> { |
| 405 | pub unsafe fn new_read( | 405 | pub unsafe fn new_read( |
| 406 | channel: impl Peripheral<P = C> + 'a, | 406 | channel: impl Peripheral<P = C> + 'a, |
| 407 | _request: Request, | 407 | _request: Request, |
| @@ -442,7 +442,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 442 | let mut this = Self { | 442 | let mut this = Self { |
| 443 | channel, | 443 | channel, |
| 444 | cr: w, | 444 | cr: w, |
| 445 | ringbuf: DmaRingBuffer::new(buffer), | 445 | ringbuf: ReadableDmaRingBuffer::new(buffer), |
| 446 | }; | 446 | }; |
| 447 | this.clear_irqs(); | 447 | this.clear_irqs(); |
| 448 | 448 | ||
| @@ -475,7 +475,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 475 | self.ringbuf.read(DmaCtrlImpl(self.channel.reborrow()), buf) | 475 | self.ringbuf.read(DmaCtrlImpl(self.channel.reborrow()), buf) |
| 476 | } | 476 | } |
| 477 | 477 | ||
| 478 | /// Read an exact number of elements from the ringbuffer. | 478 | /// Read an exact number of elements from the ReadableRingBuffer. |
| 479 | /// | 479 | /// |
| 480 | /// Returns the remaining number of elements available for immediate reading. | 480 | /// Returns the remaining number of elements available for immediate reading. |
| 481 | /// OverrunError is returned if the portion to be read was overwritten by the DMA controller. | 481 | /// OverrunError is returned if the portion to be read was overwritten by the DMA controller. |
| @@ -513,7 +513,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 513 | .await | 513 | .await |
| 514 | } | 514 | } |
| 515 | 515 | ||
| 516 | /// The capacity of the ringbuffer | 516 | /// The capacity of the ReadableRingBuffer |
| 517 | pub fn cap(&self) -> usize { | 517 | pub fn cap(&self) -> usize { |
| 518 | self.ringbuf.cap() | 518 | self.ringbuf.cap() |
| 519 | } | 519 | } |
| @@ -550,7 +550,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 550 | } | 550 | } |
| 551 | } | 551 | } |
| 552 | 552 | ||
| 553 | impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> { | 553 | impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> { |
| 554 | fn drop(&mut self) { | 554 | fn drop(&mut self) { |
| 555 | self.request_stop(); | 555 | self.request_stop(); |
| 556 | while self.is_running() {} | 556 | while self.is_running() {} |
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 219ef2eb0..9157f72db 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs | |||
| @@ -7,7 +7,7 @@ use core::task::{Context, Poll, Waker}; | |||
| 7 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; | 7 | use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; |
| 8 | use embassy_sync::waitqueue::AtomicWaker; | 8 | use embassy_sync::waitqueue::AtomicWaker; |
| 9 | 9 | ||
| 10 | use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError}; | 10 | use super::ringbuffer::{DmaCtrl, OverrunError, ReadableDmaRingBuffer}; |
| 11 | use super::word::{Word, WordSize}; | 11 | use super::word::{Word, WordSize}; |
| 12 | use super::Dir; | 12 | use super::Dir; |
| 13 | use crate::_generated::DMA_CHANNEL_COUNT; | 13 | use crate::_generated::DMA_CHANNEL_COUNT; |
| @@ -625,13 +625,13 @@ impl<'a, C: Channel> DmaCtrl for DmaCtrlImpl<'a, C> { | |||
| 625 | } | 625 | } |
| 626 | } | 626 | } |
| 627 | 627 | ||
| 628 | pub struct RingBuffer<'a, C: Channel, W: Word> { | 628 | pub struct ReadableRingBuffer<'a, C: Channel, W: Word> { |
| 629 | cr: regs::Cr, | 629 | cr: regs::Cr, |
| 630 | channel: PeripheralRef<'a, C>, | 630 | channel: PeripheralRef<'a, C>, |
| 631 | ringbuf: DmaRingBuffer<'a, W>, | 631 | ringbuf: ReadableDmaRingBuffer<'a, W>, |
| 632 | } | 632 | } |
| 633 | 633 | ||
| 634 | impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | 634 | impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> { |
| 635 | pub unsafe fn new_read( | 635 | pub unsafe fn new_read( |
| 636 | channel: impl Peripheral<P = C> + 'a, | 636 | channel: impl Peripheral<P = C> + 'a, |
| 637 | _request: Request, | 637 | _request: Request, |
| @@ -677,7 +677,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 677 | let mut this = Self { | 677 | let mut this = Self { |
| 678 | channel, | 678 | channel, |
| 679 | cr: w, | 679 | cr: w, |
| 680 | ringbuf: DmaRingBuffer::new(buffer), | 680 | ringbuf: ReadableDmaRingBuffer::new(buffer), |
| 681 | }; | 681 | }; |
| 682 | this.clear_irqs(); | 682 | this.clear_irqs(); |
| 683 | 683 | ||
| @@ -797,7 +797,7 @@ impl<'a, C: Channel, W: Word> RingBuffer<'a, C, W> { | |||
| 797 | } | 797 | } |
| 798 | } | 798 | } |
| 799 | 799 | ||
| 800 | impl<'a, C: Channel, W: Word> Drop for RingBuffer<'a, C, W> { | 800 | impl<'a, C: Channel, W: Word> Drop for ReadableRingBuffer<'a, C, W> { |
| 801 | fn drop(&mut self) { | 801 | fn drop(&mut self) { |
| 802 | self.request_stop(); | 802 | self.request_stop(); |
| 803 | while self.is_running() {} | 803 | while self.is_running() {} |
diff --git a/embassy-stm32/src/dma/ringbuffer.rs b/embassy-stm32/src/dma/ringbuffer.rs index 190793974..92be3334f 100644 --- a/embassy-stm32/src/dma/ringbuffer.rs +++ b/embassy-stm32/src/dma/ringbuffer.rs | |||
| @@ -29,7 +29,7 @@ use super::word::Word; | |||
| 29 | /// | | | | | 29 | /// | | | | |
| 30 | /// +- end --------------------+ +- start ----------------+ | 30 | /// +- end --------------------+ +- start ----------------+ |
| 31 | /// ``` | 31 | /// ``` |
| 32 | pub struct DmaRingBuffer<'a, W: Word> { | 32 | pub struct ReadableDmaRingBuffer<'a, W: Word> { |
| 33 | pub(crate) dma_buf: &'a mut [W], | 33 | pub(crate) dma_buf: &'a mut [W], |
| 34 | start: usize, | 34 | start: usize, |
| 35 | } | 35 | } |
| @@ -51,7 +51,7 @@ pub trait DmaCtrl { | |||
| 51 | fn reset_complete_count(&mut self) -> usize; | 51 | fn reset_complete_count(&mut self) -> usize; |
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | impl<'a, W: Word> DmaRingBuffer<'a, W> { | 54 | impl<'a, W: Word> ReadableDmaRingBuffer<'a, W> { |
| 55 | pub fn new(dma_buf: &'a mut [W]) -> Self { | 55 | pub fn new(dma_buf: &'a mut [W]) -> Self { |
| 56 | Self { dma_buf, start: 0 } | 56 | Self { dma_buf, start: 0 } |
| 57 | } | 57 | } |
| @@ -263,7 +263,7 @@ mod tests { | |||
| 263 | #[test] | 263 | #[test] |
| 264 | fn empty_and_read_not_started() { | 264 | fn empty_and_read_not_started() { |
| 265 | let mut dma_buf = [0u8; 16]; | 265 | let mut dma_buf = [0u8; 16]; |
| 266 | let ringbuf = DmaRingBuffer::new(&mut dma_buf); | 266 | let ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 267 | 267 | ||
| 268 | assert_eq!(0, ringbuf.start); | 268 | assert_eq!(0, ringbuf.start); |
| 269 | } | 269 | } |
| @@ -273,7 +273,7 @@ mod tests { | |||
| 273 | let mut dma = TestCircularTransfer::new(16); | 273 | let mut dma = TestCircularTransfer::new(16); |
| 274 | 274 | ||
| 275 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 275 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 276 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 276 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 277 | 277 | ||
| 278 | assert_eq!(0, ringbuf.start); | 278 | assert_eq!(0, ringbuf.start); |
| 279 | assert_eq!(16, ringbuf.cap()); | 279 | assert_eq!(16, ringbuf.cap()); |
| @@ -314,7 +314,7 @@ mod tests { | |||
| 314 | let mut dma = TestCircularTransfer::new(16); | 314 | let mut dma = TestCircularTransfer::new(16); |
| 315 | 315 | ||
| 316 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 316 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 317 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 317 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 318 | 318 | ||
| 319 | assert_eq!(0, ringbuf.start); | 319 | assert_eq!(0, ringbuf.start); |
| 320 | assert_eq!(16, ringbuf.cap()); | 320 | assert_eq!(16, ringbuf.cap()); |
| @@ -349,7 +349,7 @@ mod tests { | |||
| 349 | let mut dma = TestCircularTransfer::new(16); | 349 | let mut dma = TestCircularTransfer::new(16); |
| 350 | 350 | ||
| 351 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 351 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 352 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 352 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 353 | 353 | ||
| 354 | assert_eq!(0, ringbuf.start); | 354 | assert_eq!(0, ringbuf.start); |
| 355 | assert_eq!(16, ringbuf.cap()); | 355 | assert_eq!(16, ringbuf.cap()); |
| @@ -384,7 +384,7 @@ mod tests { | |||
| 384 | let mut dma = TestCircularTransfer::new(16); | 384 | let mut dma = TestCircularTransfer::new(16); |
| 385 | 385 | ||
| 386 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 386 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 387 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 387 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 388 | 388 | ||
| 389 | assert_eq!(0, ringbuf.start); | 389 | assert_eq!(0, ringbuf.start); |
| 390 | assert_eq!(16, ringbuf.cap()); | 390 | assert_eq!(16, ringbuf.cap()); |
| @@ -420,7 +420,7 @@ mod tests { | |||
| 420 | let mut dma = TestCircularTransfer::new(16); | 420 | let mut dma = TestCircularTransfer::new(16); |
| 421 | 421 | ||
| 422 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 422 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 423 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 423 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 424 | 424 | ||
| 425 | assert_eq!(0, ringbuf.start); | 425 | assert_eq!(0, ringbuf.start); |
| 426 | assert_eq!(16, ringbuf.cap()); | 426 | assert_eq!(16, ringbuf.cap()); |
| @@ -454,7 +454,7 @@ mod tests { | |||
| 454 | let mut dma = TestCircularTransfer::new(16); | 454 | let mut dma = TestCircularTransfer::new(16); |
| 455 | 455 | ||
| 456 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 | 456 | let mut dma_buf: [u8; 16] = array::from_fn(|idx| idx as u8); // 0, 1, ..., 15 |
| 457 | let mut ringbuf = DmaRingBuffer::new(&mut dma_buf); | 457 | let mut ringbuf = ReadableDmaRingBuffer::new(&mut dma_buf); |
| 458 | 458 | ||
| 459 | assert_eq!(0, ringbuf.start); | 459 | assert_eq!(0, ringbuf.start); |
| 460 | assert_eq!(16, ringbuf.cap()); | 460 | assert_eq!(16, ringbuf.cap()); |
diff --git a/embassy-stm32/src/usart/ringbuffered.rs b/embassy-stm32/src/usart/ringbuffered.rs index 80261d048..71077c070 100644 --- a/embassy-stm32/src/usart/ringbuffered.rs +++ b/embassy-stm32/src/usart/ringbuffered.rs | |||
| @@ -6,12 +6,12 @@ use embassy_hal_internal::PeripheralRef; | |||
| 6 | use futures::future::{select, Either}; | 6 | use futures::future::{select, Either}; |
| 7 | 7 | ||
| 8 | use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx}; | 8 | use super::{clear_interrupt_flags, rdr, sr, BasicInstance, Error, UartRx}; |
| 9 | use crate::dma::RingBuffer; | 9 | use crate::dma::ReadableRingBuffer; |
| 10 | use crate::usart::{Regs, Sr}; | 10 | use crate::usart::{Regs, Sr}; |
| 11 | 11 | ||
| 12 | pub struct RingBufferedUartRx<'d, T: BasicInstance, RxDma: super::RxDma<T>> { | 12 | pub struct RingBufferedUartRx<'d, T: BasicInstance, RxDma: super::RxDma<T>> { |
| 13 | _peri: PeripheralRef<'d, T>, | 13 | _peri: PeripheralRef<'d, T>, |
| 14 | ring_buf: RingBuffer<'d, RxDma, u8>, | 14 | ring_buf: ReadableRingBuffer<'d, RxDma, u8>, |
| 15 | } | 15 | } |
| 16 | 16 | ||
| 17 | impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> { | 17 | impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> { |
| @@ -24,7 +24,7 @@ impl<'d, T: BasicInstance, RxDma: super::RxDma<T>> UartRx<'d, T, RxDma> { | |||
| 24 | let request = self.rx_dma.request(); | 24 | let request = self.rx_dma.request(); |
| 25 | let opts = Default::default(); | 25 | let opts = Default::default(); |
| 26 | 26 | ||
| 27 | let ring_buf = unsafe { RingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) }; | 27 | let ring_buf = unsafe { ReadableRingBuffer::new_read(self.rx_dma, request, rdr(T::regs()), dma_buf, opts) }; |
| 28 | 28 | ||
| 29 | RingBufferedUartRx { | 29 | RingBufferedUartRx { |
| 30 | _peri: self._peri, | 30 | _peri: self._peri, |
