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authorDario Nieuwenhuis <[email protected]>2021-05-11 03:04:59 +0200
committerDario Nieuwenhuis <[email protected]>2021-05-17 00:57:20 +0200
commitbd9589d0ce71a2aa41c9fdf439d6de6349a09d83 (patch)
treebed94fa0d977604b1f9cbcb09d27b44791aca404
parentcd4111736c0384b1ef957df7f6aa51e3727c29b2 (diff)
nrf: add support for nrf52805, nrf52811, nrf52820
Diffstat
-rw-r--r--.github/workflows/rust.yml21
-rw-r--r--embassy-macros/src/lib.rs2
-rw-r--r--embassy-nrf-examples/Cargo.toml2
-rw-r--r--embassy-nrf-examples/src/bin/spim.rs9
-rw-r--r--embassy-nrf/Cargo.toml16
-rw-r--r--embassy-nrf/src/chips/nrf52805.rs182
-rw-r--r--embassy-nrf/src/chips/nrf52810.rs183
-rw-r--r--embassy-nrf/src/chips/nrf52811.rs184
-rw-r--r--embassy-nrf/src/chips/nrf52820.rs185
-rw-r--r--embassy-nrf/src/chips/nrf52832.rs202
-rw-r--r--embassy-nrf/src/chips/nrf52833.rs244
-rw-r--r--embassy-nrf/src/chips/nrf52840.rs251
-rw-r--r--embassy-nrf/src/gpio.rs70
-rw-r--r--embassy-nrf/src/gpiote.rs16
-rw-r--r--embassy-nrf/src/interrupt.rs210
-rw-r--r--embassy-nrf/src/lib.rs282
-rw-r--r--embassy-nrf/src/qspi.rs22
-rw-r--r--embassy-nrf/src/spim.rs47
-rw-r--r--embassy-nrf/src/timer.rs34
-rw-r--r--embassy-nrf/src/uarte.rs26
-rw-r--r--embassy-nrf/src/util.rs18
21 files changed, 1602 insertions, 604 deletions
diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml
index 8613f7e0d..cf70e2e5c 100644
--- a/.github/workflows/rust.yml
+++ b/.github/workflows/rust.yml
@@ -30,22 +30,31 @@ jobs:
30 target: thumbv7em-none-eabi 30 target: thumbv7em-none-eabi
31 - package: embassy-nrf 31 - package: embassy-nrf
32 target: thumbv7em-none-eabi 32 target: thumbv7em-none-eabi
33 features: 52810 33 features: nrf52805
34 - package: embassy-nrf 34 - package: embassy-nrf
35 target: thumbv7em-none-eabi 35 target: thumbv7em-none-eabi
36 features: 52832 36 features: nrf52810
37 - package: embassy-nrf 37 - package: embassy-nrf
38 target: thumbv7em-none-eabi 38 target: thumbv7em-none-eabi
39 features: 52833 39 features: nrf52811
40 - package: embassy-nrf 40 - package: embassy-nrf
41 target: thumbv7em-none-eabi 41 target: thumbv7em-none-eabi
42 features: 52840 42 features: nrf52820
43 - package: embassy-nrf 43 - package: embassy-nrf
44 target: thumbv7em-none-eabi 44 target: thumbv7em-none-eabi
45 features: 52840,log 45 features: nrf52832
46 - package: embassy-nrf 46 - package: embassy-nrf
47 target: thumbv7em-none-eabi 47 target: thumbv7em-none-eabi
48 features: 52840,defmt 48 features: nrf52833
49 - package: embassy-nrf
50 target: thumbv7em-none-eabi
51 features: nrf52840
52 - package: embassy-nrf
53 target: thumbv7em-none-eabi
54 features: nrf52840,log
55 - package: embassy-nrf
56 target: thumbv7em-none-eabi
57 features: nrf52840,defmt
49 - package: embassy-stm32-examples 58 - package: embassy-stm32-examples
50 target: thumbv7em-none-eabi 59 target: thumbv7em-none-eabi
51 features: stm32f405 60 features: stm32f405
diff --git a/embassy-macros/src/lib.rs b/embassy-macros/src/lib.rs
index 64411f5b4..ce643ae89 100644
--- a/embassy-macros/src/lib.rs
+++ b/embassy-macros/src/lib.rs
@@ -130,7 +130,7 @@ pub fn interrupt_declare(item: TokenStream) -> TokenStream {
130 let result = quote! { 130 let result = quote! {
131 #[allow(non_camel_case_types)] 131 #[allow(non_camel_case_types)]
132 pub struct #name_interrupt(()); 132 pub struct #name_interrupt(());
133 unsafe impl Interrupt for #name_interrupt { 133 unsafe impl ::embassy::interrupt::Interrupt for #name_interrupt {
134 type Priority = crate::interrupt::Priority; 134 type Priority = crate::interrupt::Priority;
135 fn number(&self) -> u16 { 135 fn number(&self) -> u16 {
136 use cortex_m::interrupt::InterruptNumber; 136 use cortex_m::interrupt::InterruptNumber;
diff --git a/embassy-nrf-examples/Cargo.toml b/embassy-nrf-examples/Cargo.toml
index 29614f133..4cec37522 100644
--- a/embassy-nrf-examples/Cargo.toml
+++ b/embassy-nrf-examples/Cargo.toml
@@ -19,7 +19,7 @@ defmt-error = []
19[dependencies] 19[dependencies]
20embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] } 20embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
21embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] } 21embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] }
22embassy-nrf = { version = "0.1.0", path = "../embassy-nrf", features = ["defmt", "defmt-trace", "52840"] } 22embassy-nrf = { version = "0.1.0", path = "../embassy-nrf", features = ["defmt", "defmt-trace", "nrf52840"] }
23 23
24defmt = "0.2.0" 24defmt = "0.2.0"
25defmt-rtt = "0.2.0" 25defmt-rtt = "0.2.0"
diff --git a/embassy-nrf-examples/src/bin/spim.rs b/embassy-nrf-examples/src/bin/spim.rs
index 27486374f..ccda75765 100644
--- a/embassy-nrf-examples/src/bin/spim.rs
+++ b/embassy-nrf-examples/src/bin/spim.rs
@@ -24,14 +24,11 @@ async fn main(spawner: Spawner) {
24 24
25 let p = unsafe { Peripherals::steal() }; 25 let p = unsafe { Peripherals::steal() };
26 26
27 let config = spim::Config { 27 let mut config = spim::Config::default();
28 frequency: spim::Frequency::M16, 28 config.frequency = spim::Frequency::M16;
29 mode: spim::MODE_0,
30 orc: 0x00,
31 };
32 29
33 let irq = interrupt::take!(SPIM3); 30 let irq = interrupt::take!(SPIM3);
34 let mut spim = spim::Spim::new(p.SPIM3, irq, p.P0_29, p.P0_28, p.P0_30, config); 31 let mut spim = spim::Spim::new(p.SPI3, irq, p.P0_29, p.P0_28, p.P0_30, config);
35 32
36 let mut ncs = Output::new(p.P0_31, Level::High, OutputDrive::Standard); 33 let mut ncs = Output::new(p.P0_31, Level::High, OutputDrive::Standard);
37 34
diff --git a/embassy-nrf/Cargo.toml b/embassy-nrf/Cargo.toml
index f482f0493..07524fa2d 100644
--- a/embassy-nrf/Cargo.toml
+++ b/embassy-nrf/Cargo.toml
@@ -11,11 +11,13 @@ defmt-info = [ ]
11defmt-warn = [ ] 11defmt-warn = [ ]
12defmt-error = [ ] 12defmt-error = [ ]
13 13
1452810 = ["nrf52810-pac"] 14nrf52805 = ["nrf52805-pac"]
1552811 = ["nrf52811-pac"] 15nrf52810 = ["nrf52810-pac"]
1652832 = ["nrf52832-pac"] 16nrf52811 = ["nrf52811-pac"]
1752833 = ["nrf52833-pac"] 17nrf52820 = ["nrf52820-pac"]
1852840 = ["nrf52840-pac"] 18nrf52832 = ["nrf52832-pac"]
19nrf52833 = ["nrf52833-pac"]
20nrf52840 = ["nrf52840-pac"]
19 21
20 22
21[dependencies] 23[dependencies]
@@ -30,10 +32,12 @@ cortex-m = "0.7.1"
30embedded-hal = { version = "0.2.4" } 32embedded-hal = { version = "0.2.4" }
31embedded-dma = { version = "0.1.2" } 33embedded-dma = { version = "0.1.2" }
32futures = { version = "0.3.5", default-features = false } 34futures = { version = "0.3.5", default-features = false }
35critical-section = "0.2.1"
33 36
37nrf52805-pac = { version = "0.1.0", optional = true, features = [ "rt" ], git = "https://github.com/Dirbaio/nrf52805-pac"}
34nrf52810-pac = { version = "0.9.0", optional = true, features = [ "rt" ]} 38nrf52810-pac = { version = "0.9.0", optional = true, features = [ "rt" ]}
35nrf52811-pac = { version = "0.9.1", optional = true, features = [ "rt" ]} 39nrf52811-pac = { version = "0.9.1", optional = true, features = [ "rt" ]}
40nrf52820-pac = { version = "0.1.0", optional = true, features = [ "rt" ], git = "https://github.com/Dirbaio/nrf52820-pac"}
36nrf52832-pac = { version = "0.9.0", optional = true, features = [ "rt" ]} 41nrf52832-pac = { version = "0.9.0", optional = true, features = [ "rt" ]}
37nrf52833-pac = { version = "0.9.0", optional = true, features = [ "rt" ]} 42nrf52833-pac = { version = "0.9.0", optional = true, features = [ "rt" ]}
38nrf52840-pac = { version = "0.9.0", optional = true, features = [ "rt" ]} 43nrf52840-pac = { version = "0.9.0", optional = true, features = [ "rt" ]}
39critical-section = "0.2.1"
diff --git a/embassy-nrf/src/chips/nrf52805.rs b/embassy-nrf/src/chips/nrf52805.rs
new file mode 100644
index 000000000..8b2ba7c00
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52805.rs
@@ -0,0 +1,182 @@
1pub use nrf52805_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 14) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10
11 // UARTE
12 UARTE0,
13
14 // SPI/TWI
15 TWI0,
16 SPI0,
17
18 // SAADC
19 SAADC,
20
21 // TIMER
22 TIMER0,
23 TIMER1,
24 TIMER2,
25
26 // GPIOTE
27 GPIOTE,
28 GPIOTE_CH0,
29 GPIOTE_CH1,
30 GPIOTE_CH2,
31 GPIOTE_CH3,
32 GPIOTE_CH4,
33 GPIOTE_CH5,
34 GPIOTE_CH6,
35 GPIOTE_CH7,
36
37 // PPI
38 PPI_CH0,
39 PPI_CH1,
40 PPI_CH2,
41 PPI_CH3,
42 PPI_CH4,
43 PPI_CH5,
44 PPI_CH6,
45 PPI_CH7,
46 PPI_CH8,
47 PPI_CH9,
48 PPI_CH10,
49 PPI_CH11,
50 PPI_CH12,
51 PPI_CH13,
52 PPI_CH14,
53 PPI_CH15,
54 PPI_CH16,
55 PPI_CH17,
56 PPI_CH18,
57 PPI_CH19,
58 PPI_CH20,
59 PPI_CH21,
60 PPI_CH22,
61 PPI_CH23,
62 PPI_CH24,
63 PPI_CH25,
64 PPI_CH26,
65 PPI_CH27,
66 PPI_CH28,
67 PPI_CH29,
68 PPI_CH30,
69 PPI_CH31,
70
71 PPI_GROUP0,
72 PPI_GROUP1,
73 PPI_GROUP2,
74 PPI_GROUP3,
75 PPI_GROUP4,
76 PPI_GROUP5,
77
78 // GPIO port 0
79 P0_00,
80 P0_01,
81 P0_02,
82 P0_03,
83 P0_04,
84 P0_05,
85 P0_06,
86 P0_07,
87 P0_08,
88 P0_09,
89 P0_10,
90 P0_11,
91 P0_12,
92 P0_13,
93 P0_14,
94 P0_15,
95 P0_16,
96 P0_17,
97 P0_18,
98 P0_19,
99 P0_20,
100 P0_21,
101 P0_22,
102 P0_23,
103 P0_24,
104 P0_25,
105 P0_26,
106 P0_27,
107 P0_28,
108 P0_29,
109 P0_30,
110 P0_31,
111}
112
113impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
114
115impl_spim!(SPI0, SPIM0, SPIM0_SPIS0_SPI0);
116
117impl_twim!(TWI0, TWIM0, TWIM0_TWIS0_TWI0);
118
119impl_timer!(TIMER0, TIMER0, TIMER0);
120impl_timer!(TIMER1, TIMER1, TIMER1);
121impl_timer!(TIMER2, TIMER2, TIMER2);
122
123impl_pin!(P0_00, 0, 0);
124impl_pin!(P0_01, 0, 1);
125impl_pin!(P0_02, 0, 2);
126impl_pin!(P0_03, 0, 3);
127impl_pin!(P0_04, 0, 4);
128impl_pin!(P0_05, 0, 5);
129impl_pin!(P0_06, 0, 6);
130impl_pin!(P0_07, 0, 7);
131impl_pin!(P0_08, 0, 8);
132impl_pin!(P0_09, 0, 9);
133impl_pin!(P0_10, 0, 10);
134impl_pin!(P0_11, 0, 11);
135impl_pin!(P0_12, 0, 12);
136impl_pin!(P0_13, 0, 13);
137impl_pin!(P0_14, 0, 14);
138impl_pin!(P0_15, 0, 15);
139impl_pin!(P0_16, 0, 16);
140impl_pin!(P0_17, 0, 17);
141impl_pin!(P0_18, 0, 18);
142impl_pin!(P0_19, 0, 19);
143impl_pin!(P0_20, 0, 20);
144impl_pin!(P0_21, 0, 21);
145impl_pin!(P0_22, 0, 22);
146impl_pin!(P0_23, 0, 23);
147impl_pin!(P0_24, 0, 24);
148impl_pin!(P0_25, 0, 25);
149impl_pin!(P0_26, 0, 26);
150impl_pin!(P0_27, 0, 27);
151impl_pin!(P0_28, 0, 28);
152impl_pin!(P0_29, 0, 29);
153impl_pin!(P0_30, 0, 30);
154impl_pin!(P0_31, 0, 31);
155
156pub mod irqs {
157 use embassy_macros::interrupt_declare as declare;
158 declare!(POWER_CLOCK);
159 declare!(RADIO);
160 declare!(UARTE0_UART0);
161 declare!(TWIM0_TWIS0_TWI0);
162 declare!(SPIM0_SPIS0_SPI0);
163 declare!(GPIOTE);
164 declare!(SAADC);
165 declare!(TIMER0);
166 declare!(TIMER1);
167 declare!(TIMER2);
168 declare!(RTC0);
169 declare!(TEMP);
170 declare!(RNG);
171 declare!(ECB);
172 declare!(CCM_AAR);
173 declare!(WDT);
174 declare!(RTC1);
175 declare!(QDEC);
176 declare!(SWI0_EGU0);
177 declare!(SWI1_EGU1);
178 declare!(SWI2);
179 declare!(SWI3);
180 declare!(SWI4);
181 declare!(SWI5);
182}
diff --git a/embassy-nrf/src/chips/nrf52810.rs b/embassy-nrf/src/chips/nrf52810.rs
new file mode 100644
index 000000000..7fe35b27f
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52810.rs
@@ -0,0 +1,183 @@
1pub use nrf52810_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 10) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10
11 // UARTE
12 UARTE0,
13
14 // SPI/TWI
15 TWI0,
16 SPI0,
17
18 // SAADC
19 SAADC,
20
21 // TIMER
22 TIMER0,
23 TIMER1,
24 TIMER2,
25
26 // GPIOTE
27 GPIOTE,
28 GPIOTE_CH0,
29 GPIOTE_CH1,
30 GPIOTE_CH2,
31 GPIOTE_CH3,
32 GPIOTE_CH4,
33 GPIOTE_CH5,
34 GPIOTE_CH6,
35 GPIOTE_CH7,
36
37 // PPI
38 PPI_CH0,
39 PPI_CH1,
40 PPI_CH2,
41 PPI_CH3,
42 PPI_CH4,
43 PPI_CH5,
44 PPI_CH6,
45 PPI_CH7,
46 PPI_CH8,
47 PPI_CH9,
48 PPI_CH10,
49 PPI_CH11,
50 PPI_CH12,
51 PPI_CH13,
52 PPI_CH14,
53 PPI_CH15,
54 PPI_CH16,
55 PPI_CH17,
56 PPI_CH18,
57 PPI_CH19,
58 PPI_CH20,
59 PPI_CH21,
60 PPI_CH22,
61 PPI_CH23,
62 PPI_CH24,
63 PPI_CH25,
64 PPI_CH26,
65 PPI_CH27,
66 PPI_CH28,
67 PPI_CH29,
68 PPI_CH30,
69 PPI_CH31,
70
71 PPI_GROUP0,
72 PPI_GROUP1,
73 PPI_GROUP2,
74 PPI_GROUP3,
75 PPI_GROUP4,
76 PPI_GROUP5,
77
78 // GPIO port 0
79 P0_00,
80 P0_01,
81 P0_02,
82 P0_03,
83 P0_04,
84 P0_05,
85 P0_06,
86 P0_07,
87 P0_08,
88 P0_09,
89 P0_10,
90 P0_11,
91 P0_12,
92 P0_13,
93 P0_14,
94 P0_15,
95 P0_16,
96 P0_17,
97 P0_18,
98 P0_19,
99 P0_20,
100 P0_21,
101 P0_22,
102 P0_23,
103 P0_24,
104 P0_25,
105 P0_26,
106 P0_27,
107 P0_28,
108 P0_29,
109 P0_30,
110 P0_31,
111}
112
113impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
114
115impl_spim!(SPI0, SPIM0, SPIM0_SPIS0_SPI0);
116
117impl_timer!(TIMER0, TIMER0, TIMER0);
118impl_timer!(TIMER1, TIMER1, TIMER1);
119impl_timer!(TIMER2, TIMER2, TIMER2);
120
121impl_pin!(P0_00, 0, 0);
122impl_pin!(P0_01, 0, 1);
123impl_pin!(P0_02, 0, 2);
124impl_pin!(P0_03, 0, 3);
125impl_pin!(P0_04, 0, 4);
126impl_pin!(P0_05, 0, 5);
127impl_pin!(P0_06, 0, 6);
128impl_pin!(P0_07, 0, 7);
129impl_pin!(P0_08, 0, 8);
130impl_pin!(P0_09, 0, 9);
131impl_pin!(P0_10, 0, 10);
132impl_pin!(P0_11, 0, 11);
133impl_pin!(P0_12, 0, 12);
134impl_pin!(P0_13, 0, 13);
135impl_pin!(P0_14, 0, 14);
136impl_pin!(P0_15, 0, 15);
137impl_pin!(P0_16, 0, 16);
138impl_pin!(P0_17, 0, 17);
139impl_pin!(P0_18, 0, 18);
140impl_pin!(P0_19, 0, 19);
141impl_pin!(P0_20, 0, 20);
142impl_pin!(P0_21, 0, 21);
143impl_pin!(P0_22, 0, 22);
144impl_pin!(P0_23, 0, 23);
145impl_pin!(P0_24, 0, 24);
146impl_pin!(P0_25, 0, 25);
147impl_pin!(P0_26, 0, 26);
148impl_pin!(P0_27, 0, 27);
149impl_pin!(P0_28, 0, 28);
150impl_pin!(P0_29, 0, 29);
151impl_pin!(P0_30, 0, 30);
152impl_pin!(P0_31, 0, 31);
153
154pub mod irqs {
155 use embassy_macros::interrupt_declare as declare;
156 declare!(POWER_CLOCK);
157 declare!(RADIO);
158 declare!(UARTE0_UART0);
159 declare!(TWIM0_TWIS0_TWI0);
160 declare!(SPIM0_SPIS0_SPI0);
161 declare!(GPIOTE);
162 declare!(SAADC);
163 declare!(TIMER0);
164 declare!(TIMER1);
165 declare!(TIMER2);
166 declare!(RTC0);
167 declare!(TEMP);
168 declare!(RNG);
169 declare!(ECB);
170 declare!(CCM_AAR);
171 declare!(WDT);
172 declare!(RTC1);
173 declare!(QDEC);
174 declare!(COMP);
175 declare!(SWI0_EGU0);
176 declare!(SWI1_EGU1);
177 declare!(SWI2);
178 declare!(SWI3);
179 declare!(SWI4);
180 declare!(SWI5);
181 declare!(PWM0);
182 declare!(PDM);
183}
diff --git a/embassy-nrf/src/chips/nrf52811.rs b/embassy-nrf/src/chips/nrf52811.rs
new file mode 100644
index 000000000..e3f4f18ba
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52811.rs
@@ -0,0 +1,184 @@
1pub use nrf52811_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 14) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 256;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10
11 // UARTE
12 UARTE0,
13
14 // SPI/TWI
15 TWISPI0,
16 SPI1,
17
18 // SAADC
19 SAADC,
20
21 // TIMER
22 TIMER0,
23 TIMER1,
24 TIMER2,
25
26 // GPIOTE
27 GPIOTE,
28 GPIOTE_CH0,
29 GPIOTE_CH1,
30 GPIOTE_CH2,
31 GPIOTE_CH3,
32 GPIOTE_CH4,
33 GPIOTE_CH5,
34 GPIOTE_CH6,
35 GPIOTE_CH7,
36
37 // PPI
38 PPI_CH0,
39 PPI_CH1,
40 PPI_CH2,
41 PPI_CH3,
42 PPI_CH4,
43 PPI_CH5,
44 PPI_CH6,
45 PPI_CH7,
46 PPI_CH8,
47 PPI_CH9,
48 PPI_CH10,
49 PPI_CH11,
50 PPI_CH12,
51 PPI_CH13,
52 PPI_CH14,
53 PPI_CH15,
54 PPI_CH16,
55 PPI_CH17,
56 PPI_CH18,
57 PPI_CH19,
58 PPI_CH20,
59 PPI_CH21,
60 PPI_CH22,
61 PPI_CH23,
62 PPI_CH24,
63 PPI_CH25,
64 PPI_CH26,
65 PPI_CH27,
66 PPI_CH28,
67 PPI_CH29,
68 PPI_CH30,
69 PPI_CH31,
70
71 PPI_GROUP0,
72 PPI_GROUP1,
73 PPI_GROUP2,
74 PPI_GROUP3,
75 PPI_GROUP4,
76 PPI_GROUP5,
77
78 // GPIO port 0
79 P0_00,
80 P0_01,
81 P0_02,
82 P0_03,
83 P0_04,
84 P0_05,
85 P0_06,
86 P0_07,
87 P0_08,
88 P0_09,
89 P0_10,
90 P0_11,
91 P0_12,
92 P0_13,
93 P0_14,
94 P0_15,
95 P0_16,
96 P0_17,
97 P0_18,
98 P0_19,
99 P0_20,
100 P0_21,
101 P0_22,
102 P0_23,
103 P0_24,
104 P0_25,
105 P0_26,
106 P0_27,
107 P0_28,
108 P0_29,
109 P0_30,
110 P0_31,
111}
112
113impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
114
115impl_spim!(TWISPI0, SPIM0, TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0);
116impl_spim!(SPI1, SPIM1, SPIM1_SPIS1_SPI1);
117
118impl_timer!(TIMER0, TIMER0, TIMER0);
119impl_timer!(TIMER1, TIMER1, TIMER1);
120impl_timer!(TIMER2, TIMER2, TIMER2);
121
122impl_pin!(P0_00, 0, 0);
123impl_pin!(P0_01, 0, 1);
124impl_pin!(P0_02, 0, 2);
125impl_pin!(P0_03, 0, 3);
126impl_pin!(P0_04, 0, 4);
127impl_pin!(P0_05, 0, 5);
128impl_pin!(P0_06, 0, 6);
129impl_pin!(P0_07, 0, 7);
130impl_pin!(P0_08, 0, 8);
131impl_pin!(P0_09, 0, 9);
132impl_pin!(P0_10, 0, 10);
133impl_pin!(P0_11, 0, 11);
134impl_pin!(P0_12, 0, 12);
135impl_pin!(P0_13, 0, 13);
136impl_pin!(P0_14, 0, 14);
137impl_pin!(P0_15, 0, 15);
138impl_pin!(P0_16, 0, 16);
139impl_pin!(P0_17, 0, 17);
140impl_pin!(P0_18, 0, 18);
141impl_pin!(P0_19, 0, 19);
142impl_pin!(P0_20, 0, 20);
143impl_pin!(P0_21, 0, 21);
144impl_pin!(P0_22, 0, 22);
145impl_pin!(P0_23, 0, 23);
146impl_pin!(P0_24, 0, 24);
147impl_pin!(P0_25, 0, 25);
148impl_pin!(P0_26, 0, 26);
149impl_pin!(P0_27, 0, 27);
150impl_pin!(P0_28, 0, 28);
151impl_pin!(P0_29, 0, 29);
152impl_pin!(P0_30, 0, 30);
153impl_pin!(P0_31, 0, 31);
154
155pub mod irqs {
156 use embassy_macros::interrupt_declare as declare;
157 declare!(POWER_CLOCK);
158 declare!(RADIO);
159 declare!(UARTE0_UART0);
160 declare!(TWIM0_TWIS0_TWI0_SPIM0_SPIS0_SPI0);
161 declare!(SPIM1_SPIS1_SPI1);
162 declare!(GPIOTE);
163 declare!(SAADC);
164 declare!(TIMER0);
165 declare!(TIMER1);
166 declare!(TIMER2);
167 declare!(RTC0);
168 declare!(TEMP);
169 declare!(RNG);
170 declare!(ECB);
171 declare!(CCM_AAR);
172 declare!(WDT);
173 declare!(RTC1);
174 declare!(QDEC);
175 declare!(COMP);
176 declare!(SWI0_EGU0);
177 declare!(SWI1_EGU1);
178 declare!(SWI2);
179 declare!(SWI3);
180 declare!(SWI4);
181 declare!(SWI5);
182 declare!(PWM0);
183 declare!(PDM);
184}
diff --git a/embassy-nrf/src/chips/nrf52820.rs b/embassy-nrf/src/chips/nrf52820.rs
new file mode 100644
index 000000000..e367a7916
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52820.rs
@@ -0,0 +1,185 @@
1pub use nrf52820_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 15) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10
11 // UARTE
12 UARTE0,
13
14 // SPI/TWI
15 TWISPI0,
16 TWISPI1,
17
18 // SAADC
19 SAADC,
20
21 // TIMER
22 TIMER0,
23 TIMER1,
24 TIMER2,
25 TIMER3,
26
27 // GPIOTE
28 GPIOTE,
29 GPIOTE_CH0,
30 GPIOTE_CH1,
31 GPIOTE_CH2,
32 GPIOTE_CH3,
33 GPIOTE_CH4,
34 GPIOTE_CH5,
35 GPIOTE_CH6,
36 GPIOTE_CH7,
37
38 // PPI
39 PPI_CH0,
40 PPI_CH1,
41 PPI_CH2,
42 PPI_CH3,
43 PPI_CH4,
44 PPI_CH5,
45 PPI_CH6,
46 PPI_CH7,
47 PPI_CH8,
48 PPI_CH9,
49 PPI_CH10,
50 PPI_CH11,
51 PPI_CH12,
52 PPI_CH13,
53 PPI_CH14,
54 PPI_CH15,
55 PPI_CH16,
56 PPI_CH17,
57 PPI_CH18,
58 PPI_CH19,
59 PPI_CH20,
60 PPI_CH21,
61 PPI_CH22,
62 PPI_CH23,
63 PPI_CH24,
64 PPI_CH25,
65 PPI_CH26,
66 PPI_CH27,
67 PPI_CH28,
68 PPI_CH29,
69 PPI_CH30,
70 PPI_CH31,
71
72 PPI_GROUP0,
73 PPI_GROUP1,
74 PPI_GROUP2,
75 PPI_GROUP3,
76 PPI_GROUP4,
77 PPI_GROUP5,
78
79 // GPIO port 0
80 P0_00,
81 P0_01,
82 P0_02,
83 P0_03,
84 P0_04,
85 P0_05,
86 P0_06,
87 P0_07,
88 P0_08,
89 P0_09,
90 P0_10,
91 P0_11,
92 P0_12,
93 P0_13,
94 P0_14,
95 P0_15,
96 P0_16,
97 P0_17,
98 P0_18,
99 P0_19,
100 P0_20,
101 P0_21,
102 P0_22,
103 P0_23,
104 P0_24,
105 P0_25,
106 P0_26,
107 P0_27,
108 P0_28,
109 P0_29,
110 P0_30,
111 P0_31,
112}
113
114impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
115
116impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
117impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
118
119impl_timer!(TIMER0, TIMER0, TIMER0);
120impl_timer!(TIMER1, TIMER1, TIMER1);
121impl_timer!(TIMER2, TIMER2, TIMER2);
122impl_timer!(TIMER3, TIMER3, TIMER3, extended);
123
124impl_pin!(P0_00, 0, 0);
125impl_pin!(P0_01, 0, 1);
126impl_pin!(P0_02, 0, 2);
127impl_pin!(P0_03, 0, 3);
128impl_pin!(P0_04, 0, 4);
129impl_pin!(P0_05, 0, 5);
130impl_pin!(P0_06, 0, 6);
131impl_pin!(P0_07, 0, 7);
132impl_pin!(P0_08, 0, 8);
133impl_pin!(P0_09, 0, 9);
134impl_pin!(P0_10, 0, 10);
135impl_pin!(P0_11, 0, 11);
136impl_pin!(P0_12, 0, 12);
137impl_pin!(P0_13, 0, 13);
138impl_pin!(P0_14, 0, 14);
139impl_pin!(P0_15, 0, 15);
140impl_pin!(P0_16, 0, 16);
141impl_pin!(P0_17, 0, 17);
142impl_pin!(P0_18, 0, 18);
143impl_pin!(P0_19, 0, 19);
144impl_pin!(P0_20, 0, 20);
145impl_pin!(P0_21, 0, 21);
146impl_pin!(P0_22, 0, 22);
147impl_pin!(P0_23, 0, 23);
148impl_pin!(P0_24, 0, 24);
149impl_pin!(P0_25, 0, 25);
150impl_pin!(P0_26, 0, 26);
151impl_pin!(P0_27, 0, 27);
152impl_pin!(P0_28, 0, 28);
153impl_pin!(P0_29, 0, 29);
154impl_pin!(P0_30, 0, 30);
155impl_pin!(P0_31, 0, 31);
156
157pub mod irqs {
158 use embassy_macros::interrupt_declare as declare;
159 declare!(POWER_CLOCK);
160 declare!(RADIO);
161 declare!(UARTE0_UART0);
162 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
163 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
164 declare!(GPIOTE);
165 declare!(TIMER0);
166 declare!(TIMER1);
167 declare!(TIMER2);
168 declare!(RTC0);
169 declare!(TEMP);
170 declare!(RNG);
171 declare!(ECB);
172 declare!(CCM_AAR);
173 declare!(WDT);
174 declare!(RTC1);
175 declare!(QDEC);
176 declare!(COMP);
177 declare!(SWI0_EGU0);
178 declare!(SWI1_EGU1);
179 declare!(SWI2_EGU2);
180 declare!(SWI3_EGU3);
181 declare!(SWI4_EGU4);
182 declare!(SWI5_EGU5);
183 declare!(TIMER3);
184 declare!(USBD);
185}
diff --git a/embassy-nrf/src/chips/nrf52832.rs b/embassy-nrf/src/chips/nrf52832.rs
new file mode 100644
index 000000000..e0669d93e
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52832.rs
@@ -0,0 +1,202 @@
1pub use nrf52832_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 8) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 255;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10 RTC2,
11
12 // UARTE
13 UARTE0,
14
15 // SPI/TWI
16 TWISPI0,
17 TWISPI1,
18 SPI2,
19 SPI3,
20
21 // SAADC
22 SAADC,
23
24 // TIMER
25 TIMER0,
26 TIMER1,
27 TIMER2,
28 TIMER3,
29 TIMER4,
30
31 // GPIOTE
32 GPIOTE,
33 GPIOTE_CH0,
34 GPIOTE_CH1,
35 GPIOTE_CH2,
36 GPIOTE_CH3,
37 GPIOTE_CH4,
38 GPIOTE_CH5,
39 GPIOTE_CH6,
40 GPIOTE_CH7,
41
42 // PPI
43 PPI_CH0,
44 PPI_CH1,
45 PPI_CH2,
46 PPI_CH3,
47 PPI_CH4,
48 PPI_CH5,
49 PPI_CH6,
50 PPI_CH7,
51 PPI_CH8,
52 PPI_CH9,
53 PPI_CH10,
54 PPI_CH11,
55 PPI_CH12,
56 PPI_CH13,
57 PPI_CH14,
58 PPI_CH15,
59 PPI_CH16,
60 PPI_CH17,
61 PPI_CH18,
62 PPI_CH19,
63 PPI_CH20,
64 PPI_CH21,
65 PPI_CH22,
66 PPI_CH23,
67 PPI_CH24,
68 PPI_CH25,
69 PPI_CH26,
70 PPI_CH27,
71 PPI_CH28,
72 PPI_CH29,
73 PPI_CH30,
74 PPI_CH31,
75
76 PPI_GROUP0,
77 PPI_GROUP1,
78 PPI_GROUP2,
79 PPI_GROUP3,
80 PPI_GROUP4,
81 PPI_GROUP5,
82
83 // GPIO port 0
84 P0_00,
85 P0_01,
86 P0_02,
87 P0_03,
88 P0_04,
89 P0_05,
90 P0_06,
91 P0_07,
92 P0_08,
93 P0_09,
94 P0_10,
95 P0_11,
96 P0_12,
97 P0_13,
98 P0_14,
99 P0_15,
100 P0_16,
101 P0_17,
102 P0_18,
103 P0_19,
104 P0_20,
105 P0_21,
106 P0_22,
107 P0_23,
108 P0_24,
109 P0_25,
110 P0_26,
111 P0_27,
112 P0_28,
113 P0_29,
114 P0_30,
115 P0_31,
116}
117
118impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
119
120impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
121impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
122impl_spim!(SPI2, SPIM2, SPIM2_SPIS2_SPI2);
123
124impl_timer!(TIMER0, TIMER0, TIMER0);
125impl_timer!(TIMER1, TIMER1, TIMER1);
126impl_timer!(TIMER2, TIMER2, TIMER2);
127impl_timer!(TIMER3, TIMER3, TIMER3, extended);
128impl_timer!(TIMER4, TIMER4, TIMER4, extended);
129
130impl_pin!(P0_00, 0, 0);
131impl_pin!(P0_01, 0, 1);
132impl_pin!(P0_02, 0, 2);
133impl_pin!(P0_03, 0, 3);
134impl_pin!(P0_04, 0, 4);
135impl_pin!(P0_05, 0, 5);
136impl_pin!(P0_06, 0, 6);
137impl_pin!(P0_07, 0, 7);
138impl_pin!(P0_08, 0, 8);
139impl_pin!(P0_09, 0, 9);
140impl_pin!(P0_10, 0, 10);
141impl_pin!(P0_11, 0, 11);
142impl_pin!(P0_12, 0, 12);
143impl_pin!(P0_13, 0, 13);
144impl_pin!(P0_14, 0, 14);
145impl_pin!(P0_15, 0, 15);
146impl_pin!(P0_16, 0, 16);
147impl_pin!(P0_17, 0, 17);
148impl_pin!(P0_18, 0, 18);
149impl_pin!(P0_19, 0, 19);
150impl_pin!(P0_20, 0, 20);
151impl_pin!(P0_21, 0, 21);
152impl_pin!(P0_22, 0, 22);
153impl_pin!(P0_23, 0, 23);
154impl_pin!(P0_24, 0, 24);
155impl_pin!(P0_25, 0, 25);
156impl_pin!(P0_26, 0, 26);
157impl_pin!(P0_27, 0, 27);
158impl_pin!(P0_28, 0, 28);
159impl_pin!(P0_29, 0, 29);
160impl_pin!(P0_30, 0, 30);
161impl_pin!(P0_31, 0, 31);
162
163pub mod irqs {
164 use embassy_macros::interrupt_declare as declare;
165 declare!(POWER_CLOCK);
166 declare!(RADIO);
167 declare!(UARTE0_UART0);
168 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
169 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
170 declare!(NFCT);
171 declare!(GPIOTE);
172 declare!(SAADC);
173 declare!(TIMER0);
174 declare!(TIMER1);
175 declare!(TIMER2);
176 declare!(RTC0);
177 declare!(TEMP);
178 declare!(RNG);
179 declare!(ECB);
180 declare!(CCM_AAR);
181 declare!(WDT);
182 declare!(RTC1);
183 declare!(QDEC);
184 declare!(COMP_LPCOMP);
185 declare!(SWI0_EGU0);
186 declare!(SWI1_EGU1);
187 declare!(SWI2_EGU2);
188 declare!(SWI3_EGU3);
189 declare!(SWI4_EGU4);
190 declare!(SWI5_EGU5);
191 declare!(TIMER3);
192 declare!(TIMER4);
193 declare!(PWM0);
194 declare!(PDM);
195 declare!(MWU);
196 declare!(PWM1);
197 declare!(PWM2);
198 declare!(SPIM2_SPIS2_SPI2);
199 declare!(RTC2);
200 declare!(I2S);
201 declare!(FPU);
202}
diff --git a/embassy-nrf/src/chips/nrf52833.rs b/embassy-nrf/src/chips/nrf52833.rs
new file mode 100644
index 000000000..a0b434229
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52833.rs
@@ -0,0 +1,244 @@
1pub use nrf52833_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10 RTC2,
11
12 // UARTE
13 UARTE0,
14 UARTE1,
15
16 // SPI/TWI
17 TWISPI0,
18 TWISPI1,
19 SPI2,
20 SPI3,
21
22 // SAADC
23 SAADC,
24
25 // TIMER
26 TIMER0,
27 TIMER1,
28 TIMER2,
29 TIMER3,
30 TIMER4,
31
32 // GPIOTE
33 GPIOTE,
34 GPIOTE_CH0,
35 GPIOTE_CH1,
36 GPIOTE_CH2,
37 GPIOTE_CH3,
38 GPIOTE_CH4,
39 GPIOTE_CH5,
40 GPIOTE_CH6,
41 GPIOTE_CH7,
42
43 // PPI
44 PPI_CH0,
45 PPI_CH1,
46 PPI_CH2,
47 PPI_CH3,
48 PPI_CH4,
49 PPI_CH5,
50 PPI_CH6,
51 PPI_CH7,
52 PPI_CH8,
53 PPI_CH9,
54 PPI_CH10,
55 PPI_CH11,
56 PPI_CH12,
57 PPI_CH13,
58 PPI_CH14,
59 PPI_CH15,
60 PPI_CH16,
61 PPI_CH17,
62 PPI_CH18,
63 PPI_CH19,
64 PPI_CH20,
65 PPI_CH21,
66 PPI_CH22,
67 PPI_CH23,
68 PPI_CH24,
69 PPI_CH25,
70 PPI_CH26,
71 PPI_CH27,
72 PPI_CH28,
73 PPI_CH29,
74 PPI_CH30,
75 PPI_CH31,
76
77 PPI_GROUP0,
78 PPI_GROUP1,
79 PPI_GROUP2,
80 PPI_GROUP3,
81 PPI_GROUP4,
82 PPI_GROUP5,
83
84 // GPIO port 0
85 P0_00,
86 P0_01,
87 P0_02,
88 P0_03,
89 P0_04,
90 P0_05,
91 P0_06,
92 P0_07,
93 P0_08,
94 P0_09,
95 P0_10,
96 P0_11,
97 P0_12,
98 P0_13,
99 P0_14,
100 P0_15,
101 P0_16,
102 P0_17,
103 P0_18,
104 P0_19,
105 P0_20,
106 P0_21,
107 P0_22,
108 P0_23,
109 P0_24,
110 P0_25,
111 P0_26,
112 P0_27,
113 P0_28,
114 P0_29,
115 P0_30,
116 P0_31,
117
118 // GPIO port 1
119 P1_00,
120 P1_01,
121 P1_02,
122 P1_03,
123 P1_04,
124 P1_05,
125 P1_06,
126 P1_07,
127 P1_08,
128 P1_09,
129 P1_10,
130 P1_11,
131 P1_12,
132 P1_13,
133 P1_14,
134 P1_15,
135}
136
137impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
138impl_uarte!(UARTE1, UARTE1, UARTE1);
139
140impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
141impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
142impl_spim!(SPI2, SPIM2, SPIM2_SPIS2_SPI2);
143impl_spim!(SPI3, SPIM3, SPIM3);
144
145impl_timer!(TIMER0, TIMER0, TIMER0);
146impl_timer!(TIMER1, TIMER1, TIMER1);
147impl_timer!(TIMER2, TIMER2, TIMER2);
148impl_timer!(TIMER3, TIMER3, TIMER3, extended);
149impl_timer!(TIMER4, TIMER4, TIMER4, extended);
150
151impl_pin!(P0_00, 0, 0);
152impl_pin!(P0_01, 0, 1);
153impl_pin!(P0_02, 0, 2);
154impl_pin!(P0_03, 0, 3);
155impl_pin!(P0_04, 0, 4);
156impl_pin!(P0_05, 0, 5);
157impl_pin!(P0_06, 0, 6);
158impl_pin!(P0_07, 0, 7);
159impl_pin!(P0_08, 0, 8);
160impl_pin!(P0_09, 0, 9);
161impl_pin!(P0_10, 0, 10);
162impl_pin!(P0_11, 0, 11);
163impl_pin!(P0_12, 0, 12);
164impl_pin!(P0_13, 0, 13);
165impl_pin!(P0_14, 0, 14);
166impl_pin!(P0_15, 0, 15);
167impl_pin!(P0_16, 0, 16);
168impl_pin!(P0_17, 0, 17);
169impl_pin!(P0_18, 0, 18);
170impl_pin!(P0_19, 0, 19);
171impl_pin!(P0_20, 0, 20);
172impl_pin!(P0_21, 0, 21);
173impl_pin!(P0_22, 0, 22);
174impl_pin!(P0_23, 0, 23);
175impl_pin!(P0_24, 0, 24);
176impl_pin!(P0_25, 0, 25);
177impl_pin!(P0_26, 0, 26);
178impl_pin!(P0_27, 0, 27);
179impl_pin!(P0_28, 0, 28);
180impl_pin!(P0_29, 0, 29);
181impl_pin!(P0_30, 0, 30);
182impl_pin!(P0_31, 0, 31);
183
184impl_pin!(P1_00, 1, 0);
185impl_pin!(P1_01, 1, 1);
186impl_pin!(P1_02, 1, 2);
187impl_pin!(P1_03, 1, 3);
188impl_pin!(P1_04, 1, 4);
189impl_pin!(P1_05, 1, 5);
190impl_pin!(P1_06, 1, 6);
191impl_pin!(P1_07, 1, 7);
192impl_pin!(P1_08, 1, 8);
193impl_pin!(P1_09, 1, 9);
194impl_pin!(P1_10, 1, 10);
195impl_pin!(P1_11, 1, 11);
196impl_pin!(P1_12, 1, 12);
197impl_pin!(P1_13, 1, 13);
198impl_pin!(P1_14, 1, 14);
199impl_pin!(P1_15, 1, 15);
200
201pub mod irqs {
202 use embassy_macros::interrupt_declare as declare;
203 declare!(POWER_CLOCK);
204 declare!(RADIO);
205 declare!(UARTE0_UART0);
206 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
207 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
208 declare!(NFCT);
209 declare!(GPIOTE);
210 declare!(SAADC);
211 declare!(TIMER0);
212 declare!(TIMER1);
213 declare!(TIMER2);
214 declare!(RTC0);
215 declare!(TEMP);
216 declare!(RNG);
217 declare!(ECB);
218 declare!(CCM_AAR);
219 declare!(WDT);
220 declare!(RTC1);
221 declare!(QDEC);
222 declare!(COMP_LPCOMP);
223 declare!(SWI0_EGU0);
224 declare!(SWI1_EGU1);
225 declare!(SWI2_EGU2);
226 declare!(SWI3_EGU3);
227 declare!(SWI4_EGU4);
228 declare!(SWI5_EGU5);
229 declare!(TIMER3);
230 declare!(TIMER4);
231 declare!(PWM0);
232 declare!(PDM);
233 declare!(MWU);
234 declare!(PWM1);
235 declare!(PWM2);
236 declare!(SPIM2_SPIS2_SPI2);
237 declare!(RTC2);
238 declare!(I2S);
239 declare!(FPU);
240 declare!(USBD);
241 declare!(UARTE1);
242 declare!(PWM3);
243 declare!(SPIM3);
244}
diff --git a/embassy-nrf/src/chips/nrf52840.rs b/embassy-nrf/src/chips/nrf52840.rs
new file mode 100644
index 000000000..9a9f99201
--- /dev/null
+++ b/embassy-nrf/src/chips/nrf52840.rs
@@ -0,0 +1,251 @@
1pub use nrf52840_pac as pac;
2
3pub const EASY_DMA_SIZE: usize = (1 << 16) - 1;
4pub const FORCE_COPY_BUFFER_SIZE: usize = 512;
5
6embassy_extras::peripherals! {
7 // RTC
8 RTC0,
9 RTC1,
10 RTC2,
11
12 // QSPI
13 QSPI,
14
15 // UARTE
16 UARTE0,
17 UARTE1,
18
19 // SPI/TWI
20 TWISPI0,
21 TWISPI1,
22 SPI2,
23 SPI3,
24
25 // SAADC
26 SAADC,
27
28 // TIMER
29 TIMER0,
30 TIMER1,
31 TIMER2,
32 TIMER3,
33 TIMER4,
34
35 // GPIOTE
36 GPIOTE,
37 GPIOTE_CH0,
38 GPIOTE_CH1,
39 GPIOTE_CH2,
40 GPIOTE_CH3,
41 GPIOTE_CH4,
42 GPIOTE_CH5,
43 GPIOTE_CH6,
44 GPIOTE_CH7,
45
46 // PPI
47 PPI_CH0,
48 PPI_CH1,
49 PPI_CH2,
50 PPI_CH3,
51 PPI_CH4,
52 PPI_CH5,
53 PPI_CH6,
54 PPI_CH7,
55 PPI_CH8,
56 PPI_CH9,
57 PPI_CH10,
58 PPI_CH11,
59 PPI_CH12,
60 PPI_CH13,
61 PPI_CH14,
62 PPI_CH15,
63 PPI_CH16,
64 PPI_CH17,
65 PPI_CH18,
66 PPI_CH19,
67 PPI_CH20,
68 PPI_CH21,
69 PPI_CH22,
70 PPI_CH23,
71 PPI_CH24,
72 PPI_CH25,
73 PPI_CH26,
74 PPI_CH27,
75 PPI_CH28,
76 PPI_CH29,
77 PPI_CH30,
78 PPI_CH31,
79
80 PPI_GROUP0,
81 PPI_GROUP1,
82 PPI_GROUP2,
83 PPI_GROUP3,
84 PPI_GROUP4,
85 PPI_GROUP5,
86
87 // GPIO port 0
88 P0_00,
89 P0_01,
90 P0_02,
91 P0_03,
92 P0_04,
93 P0_05,
94 P0_06,
95 P0_07,
96 P0_08,
97 P0_09,
98 P0_10,
99 P0_11,
100 P0_12,
101 P0_13,
102 P0_14,
103 P0_15,
104 P0_16,
105 P0_17,
106 P0_18,
107 P0_19,
108 P0_20,
109 P0_21,
110 P0_22,
111 P0_23,
112 P0_24,
113 P0_25,
114 P0_26,
115 P0_27,
116 P0_28,
117 P0_29,
118 P0_30,
119 P0_31,
120
121 // GPIO port 1
122 P1_00,
123 P1_01,
124 P1_02,
125 P1_03,
126 P1_04,
127 P1_05,
128 P1_06,
129 P1_07,
130 P1_08,
131 P1_09,
132 P1_10,
133 P1_11,
134 P1_12,
135 P1_13,
136 P1_14,
137 P1_15,
138}
139
140impl_uarte!(UARTE0, UARTE0, UARTE0_UART0);
141impl_uarte!(UARTE1, UARTE1, UARTE1);
142
143impl_spim!(TWISPI0, SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
144impl_spim!(TWISPI1, SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
145impl_spim!(SPI2, SPIM2, SPIM2_SPIS2_SPI2);
146impl_spim!(SPI3, SPIM3, SPIM3);
147
148impl_timer!(TIMER0, TIMER0, TIMER0);
149impl_timer!(TIMER1, TIMER1, TIMER1);
150impl_timer!(TIMER2, TIMER2, TIMER2);
151impl_timer!(TIMER3, TIMER3, TIMER3, extended);
152impl_timer!(TIMER4, TIMER4, TIMER4, extended);
153
154impl_qspi!(QSPI, QSPI, QSPI);
155
156impl_pin!(P0_00, 0, 0);
157impl_pin!(P0_01, 0, 1);
158impl_pin!(P0_02, 0, 2);
159impl_pin!(P0_03, 0, 3);
160impl_pin!(P0_04, 0, 4);
161impl_pin!(P0_05, 0, 5);
162impl_pin!(P0_06, 0, 6);
163impl_pin!(P0_07, 0, 7);
164impl_pin!(P0_08, 0, 8);
165impl_pin!(P0_09, 0, 9);
166impl_pin!(P0_10, 0, 10);
167impl_pin!(P0_11, 0, 11);
168impl_pin!(P0_12, 0, 12);
169impl_pin!(P0_13, 0, 13);
170impl_pin!(P0_14, 0, 14);
171impl_pin!(P0_15, 0, 15);
172impl_pin!(P0_16, 0, 16);
173impl_pin!(P0_17, 0, 17);
174impl_pin!(P0_18, 0, 18);
175impl_pin!(P0_19, 0, 19);
176impl_pin!(P0_20, 0, 20);
177impl_pin!(P0_21, 0, 21);
178impl_pin!(P0_22, 0, 22);
179impl_pin!(P0_23, 0, 23);
180impl_pin!(P0_24, 0, 24);
181impl_pin!(P0_25, 0, 25);
182impl_pin!(P0_26, 0, 26);
183impl_pin!(P0_27, 0, 27);
184impl_pin!(P0_28, 0, 28);
185impl_pin!(P0_29, 0, 29);
186impl_pin!(P0_30, 0, 30);
187impl_pin!(P0_31, 0, 31);
188
189impl_pin!(P1_00, 1, 0);
190impl_pin!(P1_01, 1, 1);
191impl_pin!(P1_02, 1, 2);
192impl_pin!(P1_03, 1, 3);
193impl_pin!(P1_04, 1, 4);
194impl_pin!(P1_05, 1, 5);
195impl_pin!(P1_06, 1, 6);
196impl_pin!(P1_07, 1, 7);
197impl_pin!(P1_08, 1, 8);
198impl_pin!(P1_09, 1, 9);
199impl_pin!(P1_10, 1, 10);
200impl_pin!(P1_11, 1, 11);
201impl_pin!(P1_12, 1, 12);
202impl_pin!(P1_13, 1, 13);
203impl_pin!(P1_14, 1, 14);
204impl_pin!(P1_15, 1, 15);
205
206pub mod irqs {
207 use embassy_macros::interrupt_declare as declare;
208 declare!(POWER_CLOCK);
209 declare!(RADIO);
210 declare!(UARTE0_UART0);
211 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
212 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
213 declare!(NFCT);
214 declare!(GPIOTE);
215 declare!(SAADC);
216 declare!(TIMER0);
217 declare!(TIMER1);
218 declare!(TIMER2);
219 declare!(RTC0);
220 declare!(TEMP);
221 declare!(RNG);
222 declare!(ECB);
223 declare!(CCM_AAR);
224 declare!(WDT);
225 declare!(RTC1);
226 declare!(QDEC);
227 declare!(COMP_LPCOMP);
228 declare!(SWI0_EGU0);
229 declare!(SWI1_EGU1);
230 declare!(SWI2_EGU2);
231 declare!(SWI3_EGU3);
232 declare!(SWI4_EGU4);
233 declare!(SWI5_EGU5);
234 declare!(TIMER3);
235 declare!(TIMER4);
236 declare!(PWM0);
237 declare!(PDM);
238 declare!(MWU);
239 declare!(PWM1);
240 declare!(PWM2);
241 declare!(SPIM2_SPIS2_SPI2);
242 declare!(RTC2);
243 declare!(I2S);
244 declare!(FPU);
245 declare!(USBD);
246 declare!(UARTE1);
247 declare!(QSPI);
248 declare!(CRYPTOCELL);
249 declare!(PWM3);
250 declare!(SPIM3);
251}
diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs
index 14ac61822..2cdb685d3 100644
--- a/embassy-nrf/src/gpio.rs
+++ b/embassy-nrf/src/gpio.rs
@@ -1,3 +1,5 @@
1#![macro_use]
2
1use core::convert::Infallible; 3use core::convert::Infallible;
2use core::hint::unreachable_unchecked; 4use core::hint::unreachable_unchecked;
3use core::marker::PhantomData; 5use core::marker::PhantomData;
@@ -18,7 +20,7 @@ pub enum Port {
18 Port0, 20 Port0,
19 21
20 /// Port 1, only available on some nRF52 MCUs. 22 /// Port 1, only available on some nRF52 MCUs.
21 #[cfg(any(feature = "52833", feature = "52840"))] 23 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
22 Port1, 24 Port1,
23} 25}
24 26
@@ -281,12 +283,12 @@ pub(crate) mod sealed {
281 283
282 #[inline] 284 #[inline]
283 fn _pin(&self) -> u8 { 285 fn _pin(&self) -> u8 {
284 #[cfg(any(feature = "52833", feature = "52840"))] 286 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
285 { 287 {
286 self.pin_port() % 32 288 self.pin_port() % 32
287 } 289 }
288 290
289 #[cfg(not(any(feature = "52833", feature = "52840")))] 291 #[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
290 { 292 {
291 self.pin_port() 293 self.pin_port()
292 } 294 }
@@ -297,7 +299,7 @@ pub(crate) mod sealed {
297 unsafe { 299 unsafe {
298 match self.pin_port() / 32 { 300 match self.pin_port() / 32 {
299 0 => &*pac::P0::ptr(), 301 0 => &*pac::P0::ptr(),
300 #[cfg(any(feature = "52833", feature = "52840"))] 302 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
301 1 => &*pac::P1::ptr(), 303 1 => &*pac::P1::ptr(),
302 _ => unreachable_unchecked(), 304 _ => unreachable_unchecked(),
303 } 305 }
@@ -341,7 +343,7 @@ pub trait Pin: sealed::Pin + Sized {
341 fn port(&self) -> Port { 343 fn port(&self) -> Port {
342 match self.pin_port() / 32 { 344 match self.pin_port() / 32 {
343 0 => Port::Port0, 345 0 => Port::Port0,
344 #[cfg(any(feature = "52833", feature = "52840"))] 346 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
345 1 => Port::Port1, 347 1 => Port::Port1,
346 _ => unsafe { unreachable_unchecked() }, 348 _ => unsafe { unreachable_unchecked() },
347 } 349 }
@@ -488,8 +490,8 @@ impl OptionalPin for NoPin {
488 490
489macro_rules! impl_pin { 491macro_rules! impl_pin {
490 ($type:ident, $port_num:expr, $pin_num:expr) => { 492 ($type:ident, $port_num:expr, $pin_num:expr) => {
491 impl Pin for peripherals::$type {} 493 impl crate::gpio::Pin for peripherals::$type {}
492 impl sealed::Pin for peripherals::$type { 494 impl crate::gpio::sealed::Pin for peripherals::$type {
493 #[inline] 495 #[inline]
494 fn pin_port(&self) -> u8 { 496 fn pin_port(&self) -> u8 {
495 $port_num * 32 + $pin_num 497 $port_num * 32 + $pin_num
@@ -497,57 +499,3 @@ macro_rules! impl_pin {
497 } 499 }
498 }; 500 };
499} 501}
500
501impl_pin!(P0_00, 0, 0);
502impl_pin!(P0_01, 0, 1);
503impl_pin!(P0_02, 0, 2);
504impl_pin!(P0_03, 0, 3);
505impl_pin!(P0_04, 0, 4);
506impl_pin!(P0_05, 0, 5);
507impl_pin!(P0_06, 0, 6);
508impl_pin!(P0_07, 0, 7);
509impl_pin!(P0_08, 0, 8);
510impl_pin!(P0_09, 0, 9);
511impl_pin!(P0_10, 0, 10);
512impl_pin!(P0_11, 0, 11);
513impl_pin!(P0_12, 0, 12);
514impl_pin!(P0_13, 0, 13);
515impl_pin!(P0_14, 0, 14);
516impl_pin!(P0_15, 0, 15);
517impl_pin!(P0_16, 0, 16);
518impl_pin!(P0_17, 0, 17);
519impl_pin!(P0_18, 0, 18);
520impl_pin!(P0_19, 0, 19);
521impl_pin!(P0_20, 0, 20);
522impl_pin!(P0_21, 0, 21);
523impl_pin!(P0_22, 0, 22);
524impl_pin!(P0_23, 0, 23);
525impl_pin!(P0_24, 0, 24);
526impl_pin!(P0_25, 0, 25);
527impl_pin!(P0_26, 0, 26);
528impl_pin!(P0_27, 0, 27);
529impl_pin!(P0_28, 0, 28);
530impl_pin!(P0_29, 0, 29);
531impl_pin!(P0_30, 0, 30);
532impl_pin!(P0_31, 0, 31);
533
534#[cfg(any(feature = "52833", feature = "52840"))]
535mod _p1 {
536 use super::*;
537 impl_pin!(P1_00, 1, 0);
538 impl_pin!(P1_01, 1, 1);
539 impl_pin!(P1_02, 1, 2);
540 impl_pin!(P1_03, 1, 3);
541 impl_pin!(P1_04, 1, 4);
542 impl_pin!(P1_05, 1, 5);
543 impl_pin!(P1_06, 1, 6);
544 impl_pin!(P1_07, 1, 7);
545 impl_pin!(P1_08, 1, 8);
546 impl_pin!(P1_09, 1, 9);
547 impl_pin!(P1_10, 1, 10);
548 impl_pin!(P1_11, 1, 11);
549 impl_pin!(P1_12, 1, 12);
550 impl_pin!(P1_13, 1, 13);
551 impl_pin!(P1_14, 1, 14);
552 impl_pin!(P1_15, 1, 15);
553}
diff --git a/embassy-nrf/src/gpiote.rs b/embassy-nrf/src/gpiote.rs
index fbd8c093c..bfa5ba68b 100644
--- a/embassy-nrf/src/gpiote.rs
+++ b/embassy-nrf/src/gpiote.rs
@@ -17,9 +17,9 @@ use crate::{interrupt, peripherals};
17 17
18pub const CHANNEL_COUNT: usize = 8; 18pub const CHANNEL_COUNT: usize = 8;
19 19
20#[cfg(any(feature = "52833", feature = "52840"))] 20#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
21pub const PIN_COUNT: usize = 48; 21pub const PIN_COUNT: usize = 48;
22#[cfg(not(any(feature = "52833", feature = "52840")))] 22#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
23pub const PIN_COUNT: usize = 32; 23pub const PIN_COUNT: usize = 32;
24 24
25const NEW_AW: AtomicWaker = AtomicWaker::new(); 25const NEW_AW: AtomicWaker = AtomicWaker::new();
@@ -49,9 +49,9 @@ pub struct Initialized {
49} 49}
50 50
51pub fn initialize(_gpiote: peripherals::GPIOTE, irq: interrupt::GPIOTE) -> Initialized { 51pub fn initialize(_gpiote: peripherals::GPIOTE, irq: interrupt::GPIOTE) -> Initialized {
52 #[cfg(any(feature = "52833", feature = "52840"))] 52 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
53 let ports = unsafe { &[&*pac::P0::ptr(), &*pac::P1::ptr()] }; 53 let ports = unsafe { &[&*pac::P0::ptr(), &*pac::P1::ptr()] };
54 #[cfg(not(any(feature = "52833", feature = "52840")))] 54 #[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
55 let ports = unsafe { &[&*pac::P0::ptr()] }; 55 let ports = unsafe { &[&*pac::P0::ptr()] };
56 56
57 for &p in ports { 57 for &p in ports {
@@ -85,9 +85,9 @@ unsafe fn on_irq(_ctx: *mut ()) {
85 if g.events_port.read().bits() != 0 { 85 if g.events_port.read().bits() != 0 {
86 g.events_port.write(|w| w); 86 g.events_port.write(|w| w);
87 87
88 #[cfg(any(feature = "52833", feature = "52840"))] 88 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
89 let ports = &[&*pac::P0::ptr(), &*pac::P1::ptr()]; 89 let ports = &[&*pac::P0::ptr(), &*pac::P1::ptr()];
90 #[cfg(not(any(feature = "52833", feature = "52840")))] 90 #[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
91 let ports = &[&*pac::P0::ptr()]; 91 let ports = &[&*pac::P0::ptr()];
92 92
93 for (port, &p) in ports.iter().enumerate() { 93 for (port, &p) in ports.iter().enumerate() {
@@ -149,7 +149,7 @@ impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
149 InputChannelPolarity::None => w.mode().event().polarity().none(), 149 InputChannelPolarity::None => w.mode().event().polarity().none(),
150 InputChannelPolarity::Toggle => w.mode().event().polarity().toggle(), 150 InputChannelPolarity::Toggle => w.mode().event().polarity().toggle(),
151 }; 151 };
152 #[cfg(any(feature = "52833", feature = "52840"))] 152 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
153 w.port().bit(match pin.pin.port() { 153 w.port().bit(match pin.pin.port() {
154 Port::Port0 => false, 154 Port::Port0 => false,
155 Port::Port1 => true, 155 Port::Port1 => true,
@@ -237,7 +237,7 @@ impl<'d, C: Channel, T: GpioPin> OutputChannel<'d, C, T> {
237 OutputChannelPolarity::Clear => w.polarity().hi_to_lo(), 237 OutputChannelPolarity::Clear => w.polarity().hi_to_lo(),
238 OutputChannelPolarity::Toggle => w.polarity().toggle(), 238 OutputChannelPolarity::Toggle => w.polarity().toggle(),
239 }; 239 };
240 #[cfg(any(feature = "52833", feature = "52840"))] 240 #[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
241 w.port().bit(match pin.pin.port() { 241 w.port().bit(match pin.pin.port() {
242 Port::Port0 => false, 242 Port::Port0 => false,
243 Port::Port1 => true, 243 Port::Port1 => true,
diff --git a/embassy-nrf/src/interrupt.rs b/embassy-nrf/src/interrupt.rs
deleted file mode 100644
index a29861977..000000000
--- a/embassy-nrf/src/interrupt.rs
+++ /dev/null
@@ -1,210 +0,0 @@
1//! Interrupt management
2//!
3//! This module implements an API for managing interrupts compatible with
4//! nrf_softdevice::interrupt. Intended for switching between the two at compile-time.
5
6// Re-exports
7pub use embassy::interrupt::{declare, take, Interrupt};
8pub use embassy_extras::interrupt::Priority3 as Priority;
9
10#[cfg(feature = "52810")]
11mod irqs {
12 use super::*;
13 declare!(POWER_CLOCK);
14 declare!(RADIO);
15 declare!(UARTE0_UART0);
16 declare!(TWIM0_TWIS0_TWI0);
17 declare!(SPIM0_SPIS0_SPI0);
18 declare!(GPIOTE);
19 declare!(SAADC);
20 declare!(TIMER0);
21 declare!(TIMER1);
22 declare!(TIMER2);
23 declare!(RTC0);
24 declare!(TEMP);
25 declare!(RNG);
26 declare!(ECB);
27 declare!(CCM_AAR);
28 declare!(WDT);
29 declare!(RTC1);
30 declare!(QDEC);
31 declare!(COMP);
32 declare!(SWI0_EGU0);
33 declare!(SWI1_EGU1);
34 declare!(SWI2);
35 declare!(SWI3);
36 declare!(SWI4);
37 declare!(SWI5);
38 declare!(PWM0);
39 declare!(PDM);
40}
41
42#[cfg(feature = "52811")]
43mod irqs {
44 use super::*;
45 declare!(POWER_CLOCK);
46 declare!(RADIO);
47 declare!(UARTE0_UART0);
48 declare!(TWIM0_TWIS0_TWI0_SPIM1_SPIS1_SPI1);
49 declare!(SPIM0_SPIS0_SPI0);
50 declare!(GPIOTE);
51 declare!(SAADC);
52 declare!(TIMER0);
53 declare!(TIMER1);
54 declare!(TIMER2);
55 declare!(RTC0);
56 declare!(TEMP);
57 declare!(RNG);
58 declare!(ECB);
59 declare!(CCM_AAR);
60 declare!(WDT);
61 declare!(RTC1);
62 declare!(QDEC);
63 declare!(COMP);
64 declare!(SWI0_EGU0);
65 declare!(SWI1_EGU1);
66 declare!(SWI2);
67 declare!(SWI3);
68 declare!(SWI4);
69 declare!(SWI5);
70 declare!(PWM0);
71 declare!(PDM);
72}
73
74#[cfg(feature = "52832")]
75mod irqs {
76 use super::*;
77 declare!(POWER_CLOCK);
78 declare!(RADIO);
79 declare!(UARTE0_UART0);
80 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
81 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
82 declare!(NFCT);
83 declare!(GPIOTE);
84 declare!(SAADC);
85 declare!(TIMER0);
86 declare!(TIMER1);
87 declare!(TIMER2);
88 declare!(RTC0);
89 declare!(TEMP);
90 declare!(RNG);
91 declare!(ECB);
92 declare!(CCM_AAR);
93 declare!(WDT);
94 declare!(RTC1);
95 declare!(QDEC);
96 declare!(COMP_LPCOMP);
97 declare!(SWI0_EGU0);
98 declare!(SWI1_EGU1);
99 declare!(SWI2_EGU2);
100 declare!(SWI3_EGU3);
101 declare!(SWI4_EGU4);
102 declare!(SWI5_EGU5);
103 declare!(TIMER3);
104 declare!(TIMER4);
105 declare!(PWM0);
106 declare!(PDM);
107 declare!(MWU);
108 declare!(PWM1);
109 declare!(PWM2);
110 declare!(SPIM2_SPIS2_SPI2);
111 declare!(RTC2);
112 declare!(I2S);
113 declare!(FPU);
114}
115
116#[cfg(feature = "52833")]
117mod irqs {
118 use super::*;
119 declare!(POWER_CLOCK);
120 declare!(RADIO);
121 declare!(UARTE0_UART0);
122 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
123 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
124 declare!(NFCT);
125 declare!(GPIOTE);
126 declare!(SAADC);
127 declare!(TIMER0);
128 declare!(TIMER1);
129 declare!(TIMER2);
130 declare!(RTC0);
131 declare!(TEMP);
132 declare!(RNG);
133 declare!(ECB);
134 declare!(CCM_AAR);
135 declare!(WDT);
136 declare!(RTC1);
137 declare!(QDEC);
138 declare!(COMP_LPCOMP);
139 declare!(SWI0_EGU0);
140 declare!(SWI1_EGU1);
141 declare!(SWI2_EGU2);
142 declare!(SWI3_EGU3);
143 declare!(SWI4_EGU4);
144 declare!(SWI5_EGU5);
145 declare!(TIMER3);
146 declare!(TIMER4);
147 declare!(PWM0);
148 declare!(PDM);
149 declare!(MWU);
150 declare!(PWM1);
151 declare!(PWM2);
152 declare!(SPIM2_SPIS2_SPI2);
153 declare!(RTC2);
154 declare!(I2S);
155 declare!(FPU);
156 declare!(USBD);
157 declare!(UARTE1);
158 declare!(PWM3);
159 declare!(SPIM3);
160}
161
162#[cfg(feature = "52840")]
163mod irqs {
164 use super::*;
165 declare!(POWER_CLOCK);
166 declare!(RADIO);
167 declare!(UARTE0_UART0);
168 declare!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
169 declare!(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
170 declare!(NFCT);
171 declare!(GPIOTE);
172 declare!(SAADC);
173 declare!(TIMER0);
174 declare!(TIMER1);
175 declare!(TIMER2);
176 declare!(RTC0);
177 declare!(TEMP);
178 declare!(RNG);
179 declare!(ECB);
180 declare!(CCM_AAR);
181 declare!(WDT);
182 declare!(RTC1);
183 declare!(QDEC);
184 declare!(COMP_LPCOMP);
185 declare!(SWI0_EGU0);
186 declare!(SWI1_EGU1);
187 declare!(SWI2_EGU2);
188 declare!(SWI3_EGU3);
189 declare!(SWI4_EGU4);
190 declare!(SWI5_EGU5);
191 declare!(TIMER3);
192 declare!(TIMER4);
193 declare!(PWM0);
194 declare!(PDM);
195 declare!(MWU);
196 declare!(PWM1);
197 declare!(PWM2);
198 declare!(SPIM2_SPIS2_SPI2);
199 declare!(RTC2);
200 declare!(I2S);
201 declare!(FPU);
202 declare!(USBD);
203 declare!(UARTE1);
204 declare!(QSPI);
205 declare!(CRYPTOCELL);
206 declare!(PWM3);
207 declare!(SPIM3);
208}
209
210pub use irqs::*;
diff --git a/embassy-nrf/src/lib.rs b/embassy-nrf/src/lib.rs
index 33d764fba..066bf5f6f 100644
--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@@ -7,257 +7,67 @@
7#![allow(incomplete_features)] 7#![allow(incomplete_features)]
8 8
9#[cfg(not(any( 9#[cfg(not(any(
10 feature = "52810", 10 feature = "nrf51",
11 feature = "52811", 11 feature = "nrf52805",
12 feature = "52832", 12 feature = "nrf52810",
13 feature = "52833", 13 feature = "nrf52811",
14 feature = "52840", 14 feature = "nrf52820",
15 feature = "nrf52832",
16 feature = "nrf52833",
17 feature = "nrf52840",
18 feature = "nrf5340-app",
19 feature = "nrf5340-net",
20 feature = "nrf9160",
15)))] 21)))]
16compile_error!("No chip feature activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840"); 22compile_error!("No chip feature activated. You must activate exactly one of the following features: nrf52810, nrf52811, nrf52832, nrf52833, nrf52840");
17
18#[cfg(any(
19 all(feature = "52810", feature = "52811"),
20 all(feature = "52810", feature = "52832"),
21 all(feature = "52810", feature = "52833"),
22 all(feature = "52810", feature = "52840"),
23 all(feature = "52811", feature = "52832"),
24 all(feature = "52811", feature = "52833"),
25 all(feature = "52811", feature = "52840"),
26 all(feature = "52832", feature = "52833"),
27 all(feature = "52832", feature = "52840"),
28 all(feature = "52833", feature = "52840"),
29))]
30compile_error!("Multile chip features activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840");
31
32#[cfg(feature = "52810")]
33pub use nrf52810_pac as pac;
34#[cfg(feature = "52811")]
35pub use nrf52811_pac as pac;
36#[cfg(feature = "52832")]
37pub use nrf52832_pac as pac;
38#[cfg(feature = "52833")]
39pub use nrf52833_pac as pac;
40#[cfg(feature = "52840")]
41pub use nrf52840_pac as pac;
42
43/// Length of Nordic EasyDMA differs for MCUs
44#[cfg(any(
45 feature = "52810",
46 feature = "52811",
47 feature = "52832",
48 feature = "51"
49))]
50pub mod target_constants {
51 // NRF52832 8 bits1..0xFF
52 pub const EASY_DMA_SIZE: usize = 255;
53 // Easy DMA can only read from data ram
54 pub const SRAM_LOWER: usize = 0x2000_0000;
55 pub const SRAM_UPPER: usize = 0x3000_0000;
56}
57#[cfg(any(feature = "52840", feature = "52833", feature = "9160"))]
58pub mod target_constants {
59 // NRF52840 and NRF9160 16 bits 1..0xFFFF
60 pub const EASY_DMA_SIZE: usize = 65535;
61 // Limits for Easy DMA - it can only read from data ram
62 pub const SRAM_LOWER: usize = 0x2000_0000;
63 pub const SRAM_UPPER: usize = 0x3000_0000;
64}
65
66/// Does this slice reside entirely within RAM?
67pub(crate) fn slice_in_ram(slice: &[u8]) -> bool {
68 let ptr = slice.as_ptr() as usize;
69 ptr >= target_constants::SRAM_LOWER && (ptr + slice.len()) < target_constants::SRAM_UPPER
70}
71
72/// Return an error if slice is not in RAM.
73#[cfg(not(feature = "51"))]
74pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> {
75 if slice.len() == 0 || slice_in_ram(slice) {
76 Ok(())
77 } else {
78 Err(err)
79 }
80}
81 23
82// This mod MUST go first, so that the others see its macros. 24// This mod MUST go first, so that the others see its macros.
83pub(crate) mod fmt; 25pub(crate) mod fmt;
26pub(crate) mod util;
84 27
85pub mod buffered_uarte; 28pub mod buffered_uarte;
86pub mod gpio; 29pub mod gpio;
87pub mod gpiote; 30pub mod gpiote;
88pub mod interrupt;
89pub mod ppi; 31pub mod ppi;
90#[cfg(feature = "52840")] 32#[cfg(feature = "nrf52840")]
91pub mod qspi; 33pub mod qspi;
92pub mod rtc; 34pub mod rtc;
35#[cfg(not(feature = "nrf52820"))]
93pub mod saadc; 36pub mod saadc;
94pub mod spim; 37pub mod spim;
95pub mod system; 38pub mod system;
96pub mod timer; 39pub mod timer;
97pub mod uarte; 40pub mod uarte;
98 41
99embassy_extras::peripherals! { 42// This mod MUST go last, so that it sees all the `impl_foo!` macros
100 // RTC 43#[cfg(feature = "nrf52805")]
101 RTC0, 44#[path = "chips/nrf52805.rs"]
102 RTC1, 45mod chip;
103 #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] 46#[cfg(feature = "nrf52810")]
104 RTC2, 47#[path = "chips/nrf52810.rs"]
105 48mod chip;
106 // QSPI 49#[cfg(feature = "nrf52811")]
107 #[cfg(feature = "52840")] 50#[path = "chips/nrf52811.rs"]
108 QSPI, 51mod chip;
109 52#[cfg(feature = "nrf52820")]
110 // UARTE 53#[path = "chips/nrf52820.rs"]
111 UARTE0, 54mod chip;
112 #[cfg(any(feature = "52833", feature = "52840", feature = "9160"))] 55#[cfg(feature = "nrf52832")]
113 UARTE1, 56#[path = "chips/nrf52832.rs"]
114 57mod chip;
115 // SPIM 58#[cfg(feature = "nrf52833")]
116 // TODO this is actually shared with SPI, SPIM, SPIS, TWI, TWIS, TWIS. 59#[path = "chips/nrf52833.rs"]
117 // When they're all implemented, they should be only one peripheral here. 60mod chip;
118 SPIM0, 61#[cfg(feature = "nrf52840")]
119 #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] 62#[path = "chips/nrf52840.rs"]
120 SPIM1, 63mod chip;
121 #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))] 64
122 SPIM2, 65pub(crate) use chip::pac;
123 #[cfg(any(feature = "52833", feature = "52840"))] 66pub use chip::{peripherals, Peripherals};
124 SPIM3, 67
125 68pub mod interrupt {
126 // SAADC 69 pub use crate::chip::irqs::*;
127 SAADC, 70 pub use cortex_m::interrupt::{CriticalSection, Mutex};
128 71 pub use embassy::interrupt::{declare, take, Interrupt};
129 // TIMER 72 pub use embassy_extras::interrupt::Priority3 as Priority;
130 TIMER0,
131 TIMER1,
132 TIMER2,
133 #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
134 TIMER3,
135 #[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
136 TIMER4,
137
138 // GPIOTE
139 GPIOTE,
140 GPIOTE_CH0,
141 GPIOTE_CH1,
142 GPIOTE_CH2,
143 GPIOTE_CH3,
144 GPIOTE_CH4,
145 GPIOTE_CH5,
146 GPIOTE_CH6,
147 GPIOTE_CH7,
148
149 // PPI
150 PPI_CH0,
151 PPI_CH1,
152 PPI_CH2,
153 PPI_CH3,
154 PPI_CH4,
155 PPI_CH5,
156 PPI_CH6,
157 PPI_CH7,
158 PPI_CH8,
159 PPI_CH9,
160 PPI_CH10,
161 PPI_CH11,
162 PPI_CH12,
163 PPI_CH13,
164 PPI_CH14,
165 PPI_CH15,
166 #[cfg(not(feature = "51"))]
167 PPI_CH16,
168 #[cfg(not(feature = "51"))]
169 PPI_CH17,
170 #[cfg(not(feature = "51"))]
171 PPI_CH18,
172 #[cfg(not(feature = "51"))]
173 PPI_CH19,
174 PPI_CH20,
175 PPI_CH21,
176 PPI_CH22,
177 PPI_CH23,
178 PPI_CH24,
179 PPI_CH25,
180 PPI_CH26,
181 PPI_CH27,
182 PPI_CH28,
183 PPI_CH29,
184 PPI_CH30,
185 PPI_CH31,
186
187 PPI_GROUP0,
188 PPI_GROUP1,
189 PPI_GROUP2,
190 PPI_GROUP3,
191 #[cfg(not(feature = "51"))]
192 PPI_GROUP4,
193 #[cfg(not(feature = "51"))]
194 PPI_GROUP5,
195
196 // GPIO port 0
197 P0_00,
198 P0_01,
199 P0_02,
200 P0_03,
201 P0_04,
202 P0_05,
203 P0_06,
204 P0_07,
205 P0_08,
206 P0_09,
207 P0_10,
208 P0_11,
209 P0_12,
210 P0_13,
211 P0_14,
212 P0_15,
213 P0_16,
214 P0_17,
215 P0_18,
216 P0_19,
217 P0_20,
218 P0_21,
219 P0_22,
220 P0_23,
221 P0_24,
222 P0_25,
223 P0_26,
224 P0_27,
225 P0_28,
226 P0_29,
227 P0_30,
228 P0_31,
229
230 // GPIO port 1
231 #[cfg(any(feature = "52833", feature = "52840"))]
232 P1_00,
233 #[cfg(any(feature = "52833", feature = "52840"))]
234 P1_01,
235 #[cfg(any(feature = "52833", feature = "52840"))]
236 P1_02,
237 #[cfg(any(feature = "52833", feature = "52840"))]
238 P1_03,
239 #[cfg(any(feature = "52833", feature = "52840"))]
240 P1_04,
241 #[cfg(any(feature = "52833", feature = "52840"))]
242 P1_05,
243 #[cfg(any(feature = "52833", feature = "52840"))]
244 P1_06,
245 #[cfg(any(feature = "52833", feature = "52840"))]
246 P1_07,
247 #[cfg(any(feature = "52833", feature = "52840"))]
248 P1_08,
249 #[cfg(any(feature = "52833", feature = "52840"))]
250 P1_09,
251 #[cfg(any(feature = "52833", feature = "52840"))]
252 P1_10,
253 #[cfg(any(feature = "52833", feature = "52840"))]
254 P1_11,
255 #[cfg(any(feature = "52833", feature = "52840"))]
256 P1_12,
257 #[cfg(any(feature = "52833", feature = "52840"))]
258 P1_13,
259 #[cfg(any(feature = "52833", feature = "52840"))]
260 P1_14,
261 #[cfg(any(feature = "52833", feature = "52840"))]
262 P1_15,
263} 73}
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index f683138d6..d75070220 100644
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -1,3 +1,5 @@
1#![macro_use]
2
1use core::future::Future; 3use core::future::Future;
2use core::marker::PhantomData; 4use core::marker::PhantomData;
3use core::task::Poll; 5use core::task::Poll;
@@ -361,7 +363,7 @@ impl<'d, T: Instance> Flash for Qspi<'d, T> {
361 } 363 }
362} 364}
363 365
364mod sealed { 366pub(crate) mod sealed {
365 use super::*; 367 use super::*;
366 368
367 pub struct State { 369 pub struct State {
@@ -385,21 +387,19 @@ pub trait Instance: sealed::Instance + 'static {
385 type Interrupt: Interrupt; 387 type Interrupt: Interrupt;
386} 388}
387 389
388macro_rules! impl_instance { 390macro_rules! impl_qspi {
389 ($type:ident, $irq:ident) => { 391 ($type:ident, $pac_type:ident, $irq:ident) => {
390 impl sealed::Instance for peripherals::$type { 392 impl crate::qspi::sealed::Instance for peripherals::$type {
391 fn regs() -> &'static pac::qspi::RegisterBlock { 393 fn regs() -> &'static pac::qspi::RegisterBlock {
392 unsafe { &*pac::$type::ptr() } 394 unsafe { &*pac::$pac_type::ptr() }
393 } 395 }
394 fn state() -> &'static sealed::State { 396 fn state() -> &'static crate::qspi::sealed::State {
395 static STATE: sealed::State = sealed::State::new(); 397 static STATE: crate::qspi::sealed::State = crate::qspi::sealed::State::new();
396 &STATE 398 &STATE
397 } 399 }
398 } 400 }
399 impl Instance for peripherals::$type { 401 impl crate::qspi::Instance for peripherals::$type {
400 type Interrupt = interrupt::$irq; 402 type Interrupt = crate::interrupt::$irq;
401 } 403 }
402 }; 404 };
403} 405}
404
405impl_instance!(QSPI, QSPI);
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index 3370e1243..1fb3d441b 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -1,3 +1,5 @@
1#![macro_use]
2
1use core::future::Future; 3use core::future::Future;
2use core::marker::PhantomData; 4use core::marker::PhantomData;
3use core::sync::atomic::{compiler_fence, Ordering}; 5use core::sync::atomic::{compiler_fence, Ordering};
@@ -12,7 +14,7 @@ use traits::spi::FullDuplex;
12use crate::gpio::sealed::Pin as _; 14use crate::gpio::sealed::Pin as _;
13use crate::gpio::{OptionalPin, Pin as GpioPin}; 15use crate::gpio::{OptionalPin, Pin as GpioPin};
14use crate::interrupt::{self, Interrupt}; 16use crate::interrupt::{self, Interrupt};
15use crate::{pac, peripherals, slice_in_ram_or}; 17use crate::{pac, peripherals, util::slice_in_ram_or};
16 18
17pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; 19pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
18pub use pac::spim0::frequency::FREQUENCY_A as Frequency; 20pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
@@ -33,12 +35,23 @@ pub struct Spim<'d, T: Instance> {
33 phantom: PhantomData<&'d mut T>, 35 phantom: PhantomData<&'d mut T>,
34} 36}
35 37
38#[non_exhaustive]
36pub struct Config { 39pub struct Config {
37 pub frequency: Frequency, 40 pub frequency: Frequency,
38 pub mode: Mode, 41 pub mode: Mode,
39 pub orc: u8, 42 pub orc: u8,
40} 43}
41 44
45impl Default for Config {
46 fn default() -> Self {
47 Self {
48 frequency: Frequency::M1,
49 mode: MODE_0,
50 orc: 0x00,
51 }
52 }
53}
54
42impl<'d, T: Instance> Spim<'d, T> { 55impl<'d, T: Instance> Spim<'d, T> {
43 pub fn new( 56 pub fn new(
44 spim: impl Unborrow<Target = T> + 'd, 57 spim: impl Unborrow<Target = T> + 'd,
@@ -315,7 +328,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spim<'d, T> {
315 } 328 }
316} 329}
317 330
318mod sealed { 331pub(crate) mod sealed {
319 use super::*; 332 use super::*;
320 333
321 pub struct State { 334 pub struct State {
@@ -340,33 +353,19 @@ pub trait Instance: sealed::Instance + 'static {
340 type Interrupt: Interrupt; 353 type Interrupt: Interrupt;
341} 354}
342 355
343macro_rules! impl_instance { 356macro_rules! impl_spim {
344 ($type:ident, $irq:ident) => { 357 ($type:ident, $pac_type:ident, $irq:ident) => {
345 impl sealed::Instance for peripherals::$type { 358 impl crate::spim::sealed::Instance for peripherals::$type {
346 fn regs() -> &'static pac::spim0::RegisterBlock { 359 fn regs() -> &'static pac::spim0::RegisterBlock {
347 unsafe { &*pac::$type::ptr() } 360 unsafe { &*pac::$pac_type::ptr() }
348 } 361 }
349 fn state() -> &'static sealed::State { 362 fn state() -> &'static crate::spim::sealed::State {
350 static STATE: sealed::State = sealed::State::new(); 363 static STATE: crate::spim::sealed::State = crate::spim::sealed::State::new();
351 &STATE 364 &STATE
352 } 365 }
353 } 366 }
354 impl Instance for peripherals::$type { 367 impl crate::spim::Instance for peripherals::$type {
355 type Interrupt = interrupt::$irq; 368 type Interrupt = crate::interrupt::$irq;
356 } 369 }
357 }; 370 };
358} 371}
359
360#[cfg(feature = "52810")]
361impl_instance!(SPIM0, SPIM0_SPIS0_SPI0);
362#[cfg(not(feature = "52810"))]
363impl_instance!(SPIM0, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
364
365#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
366impl_instance!(SPIM1, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1);
367
368#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
369impl_instance!(SPIM2, SPIM2_SPIS2_SPI2);
370
371#[cfg(any(feature = "52833", feature = "52840"))]
372impl_instance!(SPIM3, SPIM3);
diff --git a/embassy-nrf/src/timer.rs b/embassy-nrf/src/timer.rs
index d74e3cfad..69d620b48 100644
--- a/embassy-nrf/src/timer.rs
+++ b/embassy-nrf/src/timer.rs
@@ -1,8 +1,10 @@
1#![macro_use]
2
1use embassy::interrupt::Interrupt; 3use embassy::interrupt::Interrupt;
2 4
3use crate::{interrupt, pac, peripherals}; 5use crate::pac;
4 6
5mod sealed { 7pub(crate) mod sealed {
6 use super::*; 8 use super::*;
7 9
8 pub trait Instance { 10 pub trait Instance {
@@ -16,28 +18,20 @@ pub trait Instance: sealed::Instance + 'static {
16} 18}
17pub trait ExtendedInstance: Instance + sealed::ExtendedInstance {} 19pub trait ExtendedInstance: Instance + sealed::ExtendedInstance {}
18 20
19macro_rules! impl_instance { 21macro_rules! impl_timer {
20 ($type:ident, $irq:ident) => { 22 ($type:ident, $pac_type:ident, $irq:ident) => {
21 impl sealed::Instance for peripherals::$type { 23 impl crate::timer::sealed::Instance for peripherals::$type {
22 fn regs(&self) -> &pac::timer0::RegisterBlock { 24 fn regs(&self) -> &pac::timer0::RegisterBlock {
23 unsafe { &*(pac::$type::ptr() as *const pac::timer0::RegisterBlock) } 25 unsafe { &*(pac::$pac_type::ptr() as *const pac::timer0::RegisterBlock) }
24 } 26 }
25 } 27 }
26 impl Instance for peripherals::$type { 28 impl crate::timer::Instance for peripherals::$type {
27 type Interrupt = interrupt::$irq; 29 type Interrupt = crate::interrupt::$irq;
28 } 30 }
29 }; 31 };
30 ($type:ident, $irq:ident, extended) => { 32 ($type:ident, $pac_type:ident, $irq:ident, extended) => {
31 impl_instance!($type, $irq); 33 impl_timer!($type, $pac_type, $irq);
32 impl sealed::ExtendedInstance for peripherals::$type {} 34 impl crate::timer::sealed::ExtendedInstance for peripherals::$type {}
33 impl ExtendedInstance for peripherals::$type {} 35 impl crate::timer::ExtendedInstance for peripherals::$type {}
34 }; 36 };
35} 37}
36
37impl_instance!(TIMER0, TIMER0);
38impl_instance!(TIMER1, TIMER1);
39impl_instance!(TIMER2, TIMER2);
40#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
41impl_instance!(TIMER3, TIMER3, extended);
42#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
43impl_instance!(TIMER4, TIMER4, extended);
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index 04907fb56..7581f7a8b 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -1,3 +1,5 @@
1#![macro_use]
2
1//! Async UART 3//! Async UART
2 4
3use core::future::Future; 5use core::future::Future;
@@ -10,6 +12,7 @@ use embassy::util::{AtomicWaker, OnDrop, Unborrow};
10use embassy_extras::unborrow; 12use embassy_extras::unborrow;
11use futures::future::poll_fn; 13use futures::future::poll_fn;
12 14
15use crate::chip::EASY_DMA_SIZE;
13use crate::fmt::{assert, panic, *}; 16use crate::fmt::{assert, panic, *};
14use crate::gpio::sealed::Pin as _; 17use crate::gpio::sealed::Pin as _;
15use crate::gpio::{OptionalPin as GpioOptionalPin, Pin as GpioPin}; 18use crate::gpio::{OptionalPin as GpioOptionalPin, Pin as GpioPin};
@@ -18,7 +21,6 @@ use crate::interrupt::Interrupt;
18use crate::pac; 21use crate::pac;
19use crate::peripherals; 22use crate::peripherals;
20use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task}; 23use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
21use crate::target_constants::EASY_DMA_SIZE;
22use crate::timer::Instance as TimerInstance; 24use crate::timer::Instance as TimerInstance;
23 25
24// Re-export SVD variants to allow user to directly set values. 26// Re-export SVD variants to allow user to directly set values.
@@ -445,7 +447,7 @@ impl<'d, U: Instance, T: TimerInstance> Write for UarteWithIdle<'d, U, T> {
445 } 447 }
446} 448}
447 449
448mod sealed { 450pub(crate) mod sealed {
449 use super::*; 451 use super::*;
450 452
451 pub struct State { 453 pub struct State {
@@ -471,23 +473,19 @@ pub trait Instance: sealed::Instance + 'static {
471 type Interrupt: Interrupt; 473 type Interrupt: Interrupt;
472} 474}
473 475
474macro_rules! impl_instance { 476macro_rules! impl_uarte {
475 ($type:ident, $irq:ident) => { 477 ($type:ident, $pac_type:ident, $irq:ident) => {
476 impl sealed::Instance for peripherals::$type { 478 impl crate::uarte::sealed::Instance for peripherals::$type {
477 fn regs() -> &'static pac::uarte0::RegisterBlock { 479 fn regs() -> &'static pac::uarte0::RegisterBlock {
478 unsafe { &*pac::$type::ptr() } 480 unsafe { &*pac::$pac_type::ptr() }
479 } 481 }
480 fn state() -> &'static sealed::State { 482 fn state() -> &'static crate::uarte::sealed::State {
481 static STATE: sealed::State = sealed::State::new(); 483 static STATE: crate::uarte::sealed::State = crate::uarte::sealed::State::new();
482 &STATE 484 &STATE
483 } 485 }
484 } 486 }
485 impl Instance for peripherals::$type { 487 impl crate::uarte::Instance for peripherals::$type {
486 type Interrupt = interrupt::$irq; 488 type Interrupt = crate::interrupt::$irq;
487 } 489 }
488 }; 490 };
489} 491}
490
491impl_instance!(UARTE0, UARTE0_UART0);
492#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
493impl_instance!(UARTE1, UARTE1);
diff --git a/embassy-nrf/src/util.rs b/embassy-nrf/src/util.rs
new file mode 100644
index 000000000..7c3974eeb
--- /dev/null
+++ b/embassy-nrf/src/util.rs
@@ -0,0 +1,18 @@
1const SRAM_LOWER: usize = 0x2000_0000;
2const SRAM_UPPER: usize = 0x3000_0000;
3
4/// Does this slice reside entirely within RAM?
5pub(crate) fn slice_in_ram(slice: &[u8]) -> bool {
6 let ptr = slice.as_ptr() as usize;
7 ptr >= SRAM_LOWER && (ptr + slice.len()) < SRAM_UPPER
8}
9
10/// Return an error if slice is not in RAM.
11#[cfg(not(feature = "51"))]
12pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> {
13 if slice.len() == 0 || slice_in_ram(slice) {
14 Ok(())
15 } else {
16 Err(err)
17 }
18}
generated by cgit (git 2.34.1) at 2026-04-05 22:43:42 +0000