stm32/i2c_v1: Remove redundant timing config abstractions for DutyCycle and I2C mode

1 files changed, 24 insertions, 55 deletions

diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index 081eb1191..a1ad9caef 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -14,7 +14,7 @@ use embedded_hal_1::i2c::Operation;
 use mode::Master;
 
 use super::*;
-use crate::mode::Mode as PeriMode;
+use crate::mode::Mode;
 use crate::pac::i2c;
 
 // /!\                      /!\
@@ -42,7 +42,7 @@ pub unsafe fn on_interrupt<T: Instance>() {
     });
 }
 
-impl<'d, M: PeriMode, IM: MasterMode> I2c<'d, M, IM> {
+impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM> {
     pub(crate) fn init(&mut self, config: Config) {
         self.info.regs.cr1().modify(|reg| {
             reg.set_pe(false);
@@ -81,8 +81,8 @@ impl<'d, M: PeriMode, IM: MasterMode> I2c<'d, M, IM> {
             reg.set_freq(timings.freq);
         });
         self.info.regs.ccr().modify(|reg| {
-            reg.set_f_s(timings.mode.f_s());
-            reg.set_duty(timings.duty.duty());
+            reg.set_f_s(timings.f_s);
+            reg.set_duty(timings.duty);
             reg.set_ccr(timings.ccr);
         });
         self.info.regs.trise().modify(|reg| {
@@ -701,40 +701,18 @@ impl<'d, IM: MasterMode> I2c<'d, Async, IM> {
     }
 }
 
-enum Mode {
-    Fast,
-    Standard,
-}
-
-impl Mode {
-    fn f_s(&self) -> i2c::vals::FS {
-        match self {
-            Mode::Fast => i2c::vals::FS::FAST,
-            Mode::Standard => i2c::vals::FS::STANDARD,
-        }
-    }
-}
-
-enum Duty {
-    Duty2_1,
-    Duty16_9,
-}
-
-impl Duty {
-    fn duty(&self) -> i2c::vals::Duty {
-        match self {
-            Duty::Duty2_1 => i2c::vals::Duty::DUTY2_1,
-            Duty::Duty16_9 => i2c::vals::Duty::DUTY16_9,
-        }
-    }
-}
 
+/// Timing configuration for I2C v1 hardware
+/// 
+/// This struct encapsulates the complex timing calculations required for STM32 I2C v1 
+/// peripherals, which use three separate registers (CR2.FREQ, CCR, TRISE) instead of 
+/// the unified TIMINGR register found in v2 hardware.
 struct Timings {
-    freq: u8,
-    mode: Mode,
-    trise: u8,
-    ccr: u16,
-    duty: Duty,
+    freq: u8,                   // APB frequency in MHz for CR2.FREQ register
+    f_s: i2c::vals::FS,         // Standard or Fast mode selection  
+    trise: u8,                  // Rise time compensation value
+    ccr: u16,                   // Clock control register value
+    duty: i2c::vals::Duty,      // Fast mode duty cycle selection
 }
 
 impl Timings {
@@ -754,12 +732,12 @@ impl Timings {
 
         let mut ccr;
         let duty;
-        let mode;
+        let f_s;
 
         // I2C clock control calculation
         if frequency <= 100_000 {
-            duty = Duty::Duty2_1;
-            mode = Mode::Standard;
+            duty = i2c::vals::Duty::DUTY2_1;
+            f_s = i2c::vals::FS::STANDARD;
             ccr = {
                 let ccr = clock / (frequency * 2);
                 if ccr < 4 {
@@ -770,38 +748,29 @@ impl Timings {
             };
         } else {
             const DUTYCYCLE: u8 = 0;
-            mode = Mode::Fast;
+            f_s = i2c::vals::FS::FAST;
             if DUTYCYCLE == 0 {
-                duty = Duty::Duty2_1;
+                duty = i2c::vals::Duty::DUTY2_1;
                 ccr = clock / (frequency * 3);
                 ccr = if ccr < 1 { 1 } else { ccr };
-
-                // Set clock to fast mode with appropriate parameters for selected speed (2:1 duty cycle)
             } else {
-                duty = Duty::Duty16_9;
+                duty = i2c::vals::Duty::DUTY16_9;
                 ccr = clock / (frequency * 25);
                 ccr = if ccr < 1 { 1 } else { ccr };
-
-                // Set clock to fast mode with appropriate parameters for selected speed (16:9 duty cycle)
             }
         }
 
         Self {
             freq: freq as u8,
+            f_s,
             trise: trise as u8,
             ccr: ccr as u16,
             duty,
-            mode,
-            //prescale: presc_reg,
-            //scll,
-            //sclh,
-            //sdadel,
-            //scldel,
         }
     }
 }
 
-impl<'d, M: PeriMode> SetConfig for I2c<'d, M, Master> {
+impl<'d, M: Mode> SetConfig for I2c<'d, M, Master> {
     type Config = Hertz;
     type ConfigError = ();
     fn set_config(&mut self, config: &Self::Config) -> Result<(), ()> {
@@ -810,8 +779,8 @@ impl<'d, M: PeriMode> SetConfig for I2c<'d, M, Master> {
             reg.set_freq(timings.freq);
         });
         self.info.regs.ccr().modify(|reg| {
-            reg.set_f_s(timings.mode.f_s());
-            reg.set_duty(timings.duty.duty());
+            reg.set_f_s(timings.f_s);
+            reg.set_duty(timings.duty);
             reg.set_ccr(timings.ccr);
         });
         self.info.regs.trise().modify(|reg| {