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authorelagil <[email protected]>2024-12-22 15:06:42 +0100
committerelagil <[email protected]>2024-12-22 15:07:58 +0100
commitc08411f32ffd075b33dcab36e4612df30d08b2fa (patch)
tree0036336c3afa4a1ea1deeb5d12b93cdcf10b1af7
parentc9cd46bdf5eef502f35deadd606aa154207c1d33 (diff)
fix: docstrings
-rw-r--r--embassy-stm32/src/ucpd.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs
index 2cfdcb415..403d54f4b 100644
--- a/embassy-stm32/src/ucpd.rs
+++ b/embassy-stm32/src/ucpd.rs
@@ -180,7 +180,7 @@ impl<'d, T: Instance> Ucpd<'d, T> {
180 w.set_rxafilten(true); 180 w.set_rxafilten(true);
181 }); 181 });
182 182
183 // Software trim according to RM0481, p. 2650 183 // Software trim according to RM0481, p. 2650/2668
184 #[cfg(stm32h5)] 184 #[cfg(stm32h5)]
185 { 185 {
186 let trim_rd_cc1 = unsafe { *(0x4002_242C as *const u32) & 0xF }; 186 let trim_rd_cc1 = unsafe { *(0x4002_242C as *const u32) & 0xF };
@@ -295,7 +295,7 @@ impl<'d, T: Instance> CcPhy<'d, T> {
295 }); 295 });
296 }); 296 });
297 297
298 // Software trim according to RM0481, p. 2668 298 // Software trim according to RM0481, p. 2650/2668
299 #[cfg(stm32h5)] 299 #[cfg(stm32h5)]
300 T::REGS.cfgr3().modify(|w| match cc_pull { 300 T::REGS.cfgr3().modify(|w| match cc_pull {
301 CcPull::Source1_5A => { 301 CcPull::Source1_5A => {