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authorBob McWhirter <[email protected]>2021-07-12 13:48:12 -0400
committerBob McWhirter <[email protected]>2021-07-13 10:09:35 -0400
commitc28bc5a8da4f4f197468c81a1149944f74fc57a2 (patch)
tree9aa324a335ceeb9020decbc94a7114ac4244e27c
parenta9b2ed52ee34cbd5b94ab9fabdbe1af3ba27fd7b (diff)
Adapt for DMAEN for DMA1 if DMA1EN is not found (for all peripherals FOO1) for EN/RST rcc table.
-rw-r--r--stm32-metapac-gen/src/lib.rs9
1 files changed, 7 insertions, 2 deletions
diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs
index 640d746e1..4e0aaf013 100644
--- a/stm32-metapac-gen/src/lib.rs
+++ b/stm32-metapac-gen/src/lib.rs
@@ -390,8 +390,13 @@ pub fn gen(options: Options) {
390 if let Some(clock_prefix) = clock_prefix { 390 if let Some(clock_prefix) = clock_prefix {
391 // Workaround for clock registers being split on some chip families. Assume fields are 391 // Workaround for clock registers being split on some chip families. Assume fields are
392 // named after peripheral and look for first field matching and use that register. 392 // named after peripheral and look for first field matching and use that register.
393 let en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name)); 393 let mut en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name));
394 let rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name)); 394 let mut rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name));
395
396 if en.is_none() && rst.is_none() && name.ends_with("1") {
397 en = find_reg_for_field(&rcc, clock_prefix, &format!("{}EN", name.strip_suffix("1").unwrap()));
398 rst = find_reg_for_field(&rcc, clock_prefix, &format!("{}RST", name.strip_suffix("1").unwrap()));
399 }
395 400
396 match (en, rst) { 401 match (en, rst) {
397 (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => { 402 (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => {