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authorxoviat <[email protected]>2023-07-15 09:37:25 -0500
committerxoviat <[email protected]>2023-07-15 09:37:25 -0500
commitc3774607a55141ce55d8ba462a2ebe18f80056de (patch)
tree5586cbacda55becf192b5341c9b70533f5a7bd38
parentbb24cfd1e8d359332acbc3c659cb9041d993483f (diff)
stm32/eth: convert static metho
-rw-r--r--embassy-stm32/src/eth/generic_smi.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/embassy-stm32/src/eth/generic_smi.rs b/embassy-stm32/src/eth/generic_smi.rs
index 1d83cec35..5c7856437 100644
--- a/embassy-stm32/src/eth/generic_smi.rs
+++ b/embassy-stm32/src/eth/generic_smi.rs
@@ -50,7 +50,7 @@ unsafe impl PHY for GenericSMI {
50 /// PHY initialisation. 50 /// PHY initialisation.
51 fn phy_init<S: StationManagement>(&mut self, sm: &mut S) { 51 fn phy_init<S: StationManagement>(&mut self, sm: &mut S) {
52 // Clear WU CSR 52 // Clear WU CSR
53 Self::smi_write_ext(sm, PHY_REG_WUCSR, 0); 53 self.smi_write_ext(sm, PHY_REG_WUCSR, 0);
54 54
55 // Enable auto-negotiation 55 // Enable auto-negotiation
56 sm.smi_write(PHY_REG_BCR, PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M); 56 sm.smi_write(PHY_REG_BCR, PHY_REG_BCR_AN | PHY_REG_BCR_ANRST | PHY_REG_BCR_100M);
@@ -78,7 +78,7 @@ unsafe impl PHY for GenericSMI {
78/// Public functions for the PHY 78/// Public functions for the PHY
79impl GenericSMI { 79impl GenericSMI {
80 // Writes a value to an extended PHY register in MMD address space 80 // Writes a value to an extended PHY register in MMD address space
81 fn smi_write_ext<S: StationManagement>(sm: &mut S, reg_addr: u16, reg_data: u16) { 81 fn smi_write_ext<S: StationManagement>(&mut self, sm: &mut S, reg_addr: u16, reg_data: u16) {
82 sm.smi_write(PHY_REG_CTL, 0x0003); // set address 82 sm.smi_write(PHY_REG_CTL, 0x0003); // set address
83 sm.smi_write(PHY_REG_ADDAR, reg_addr); 83 sm.smi_write(PHY_REG_ADDAR, reg_addr);
84 sm.smi_write(PHY_REG_CTL, 0x4003); // set data 84 sm.smi_write(PHY_REG_CTL, 0x4003); // set data