diff options
| author | Ulf Lilleengen <[email protected]> | 2021-06-02 15:23:10 +0200 |
|---|---|---|
| committer | Ulf Lilleengen <[email protected]> | 2021-06-02 15:23:10 +0200 |
| commit | c3a521066d64888475d777241ec1dd04e3578558 (patch) | |
| tree | abf3189566bbeffdc0ed089187507fa65e01ce50 | |
| parent | 4863d5e01eb80d8e825a6d879ecbfdf429f40d14 (diff) | |
Add utility to enable debug
| -rw-r--r-- | embassy-stm32/src/rcc/l0/mod.rs | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/embassy-stm32/src/rcc/l0/mod.rs b/embassy-stm32/src/rcc/l0/mod.rs index fdfb1b921..a8be72033 100644 --- a/embassy-stm32/src/rcc/l0/mod.rs +++ b/embassy-stm32/src/rcc/l0/mod.rs | |||
| @@ -6,8 +6,10 @@ use crate::time::U32Ext; | |||
| 6 | use core::marker::PhantomData; | 6 | use core::marker::PhantomData; |
| 7 | use embassy::util::Unborrow; | 7 | use embassy::util::Unborrow; |
| 8 | use embassy_extras::unborrow; | 8 | use embassy_extras::unborrow; |
| 9 | use pac::rcc::vals; | 9 | use pac::dbg::vals::{DbgSleep, DbgStandby, DbgStop}; |
| 10 | use vals::{Dbgen, Hpre, Lptimen, Msirange, Plldiv, Pllmul, Pllon, Pllsrc, Ppre, Sw}; | 10 | use pac::rcc::vals::{ |
| 11 | Crypen, Dbgen, Hpre, Iophen, Lptimen, Msirange, Plldiv, Pllmul, Pllon, Pllsrc, Ppre, Sw, | ||
| 12 | }; | ||
| 11 | 13 | ||
| 12 | /// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC, | 14 | /// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC, |
| 13 | /// and with the addition of the init function to configure a system clock. | 15 | /// and with the addition of the init function to configure a system clock. |
| @@ -258,9 +260,23 @@ impl<'d> Rcc<'d> { | |||
| 258 | LSE(()) | 260 | LSE(()) |
| 259 | } | 261 | } |
| 260 | } | 262 | } |
| 263 | */ | ||
| 264 | |||
| 265 | pub fn enable_debug_wfe(&mut self, _dbg: &mut peripherals::DBGMCU, enable_dma: bool) { | ||
| 266 | // NOTE(unsafe) We have exclusive access to the RCC and DBGMCU | ||
| 267 | unsafe { | ||
| 268 | if enable_dma { | ||
| 269 | pac::RCC.ahbenr().modify(|w| w.set_dmaen(Crypen::ENABLED)); | ||
| 270 | } | ||
| 271 | |||
| 272 | pac::DBGMCU.cr().modify(|w| { | ||
| 273 | w.set_dbg_sleep(DbgSleep::ENABLED); | ||
| 274 | w.set_dbg_standby(DbgStandby::ENABLED); | ||
| 275 | w.set_dbg_stop(DbgStop::ENABLED); | ||
| 276 | }); | ||
| 277 | } | ||
| 278 | } | ||
| 261 | 279 | ||
| 262 | impl Rcc { | ||
| 263 | */ | ||
| 264 | pub fn enable_hsi48(&mut self, _syscfg: &mut SYSCFG, _crs: CRS) -> HSI48 { | 280 | pub fn enable_hsi48(&mut self, _syscfg: &mut SYSCFG, _crs: CRS) -> HSI48 { |
| 265 | let rcc = pac::RCC; | 281 | let rcc = pac::RCC; |
| 266 | unsafe { | 282 | unsafe { |
| @@ -510,7 +526,7 @@ pub struct LSE(()); | |||
| 510 | 526 | ||
| 511 | pub unsafe fn init(config: Config) { | 527 | pub unsafe fn init(config: Config) { |
| 512 | let rcc = pac::RCC; | 528 | let rcc = pac::RCC; |
| 513 | let enabled = vals::Iophen::ENABLED; | 529 | let enabled = Iophen::ENABLED; |
| 514 | rcc.iopenr().write(|w| { | 530 | rcc.iopenr().write(|w| { |
| 515 | w.set_iopaen(enabled); | 531 | w.set_iopaen(enabled); |
| 516 | w.set_iopben(enabled); | 532 | w.set_iopben(enabled); |
