diff options
| author | pennae <[email protected]> | 2023-05-03 12:49:55 +0200 |
|---|---|---|
| committer | pennae <[email protected]> | 2023-05-03 13:00:52 +0200 |
| commit | c44c108db57cbe34e21411054840f61c61efa8a8 (patch) | |
| tree | 5548c3f911d5b807c63e22501fe1f8a3cb102fa0 | |
| parent | 77f7830da396b8666600a39e860c46ddde395f04 (diff) | |
rp/pio: wrap sm rx, tx in structs and allow splitting
this *finally* allows sound implementions of bidirectional transfers
without blocking. the futures previously allowed only a single direction
to be active at any given time, and the dma transfers didn't take a
mutable reference and were thus unsound.
| -rw-r--r-- | embassy-rp/src/pio.rs | 320 | ||||
| -rw-r--r-- | embassy-rp/src/pio_instr_util.rs | 12 | ||||
| -rw-r--r-- | examples/rp/src/bin/pio_async.rs | 4 | ||||
| -rw-r--r-- | examples/rp/src/bin/pio_dma.rs | 5 | ||||
| -rw-r--r-- | examples/rp/src/bin/pio_hd44780.rs | 16 | ||||
| -rw-r--r-- | examples/rp/src/bin/ws2812-pio.rs | 2 |
6 files changed, 197 insertions, 162 deletions
diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs index 3c5969dbd..2cf4761a5 100644 --- a/embassy-rp/src/pio.rs +++ b/embassy-rp/src/pio.rs | |||
| @@ -97,13 +97,13 @@ pub(crate) unsafe fn init() { | |||
| 97 | /// Future that waits for TX-FIFO to become writable | 97 | /// Future that waits for TX-FIFO to become writable |
| 98 | #[must_use = "futures do nothing unless you `.await` or poll them"] | 98 | #[must_use = "futures do nothing unless you `.await` or poll them"] |
| 99 | pub struct FifoOutFuture<'a, 'd, PIO: PioInstance, const SM: usize> { | 99 | pub struct FifoOutFuture<'a, 'd, PIO: PioInstance, const SM: usize> { |
| 100 | sm: &'a mut PioStateMachine<'d, PIO, SM>, | 100 | sm_tx: &'a mut PioStateMachineTx<'d, PIO, SM>, |
| 101 | value: u32, | 101 | value: u32, |
| 102 | } | 102 | } |
| 103 | 103 | ||
| 104 | impl<'a, 'd, PIO: PioInstance, const SM: usize> FifoOutFuture<'a, 'd, PIO, SM> { | 104 | impl<'a, 'd, PIO: PioInstance, const SM: usize> FifoOutFuture<'a, 'd, PIO, SM> { |
| 105 | pub fn new(sm: &'a mut PioStateMachine<'d, PIO, SM>, value: u32) -> Self { | 105 | pub fn new(sm: &'a mut PioStateMachineTx<'d, PIO, SM>, value: u32) -> Self { |
| 106 | FifoOutFuture { sm, value } | 106 | FifoOutFuture { sm_tx: sm, value } |
| 107 | } | 107 | } |
| 108 | } | 108 | } |
| 109 | 109 | ||
| @@ -112,7 +112,7 @@ impl<'a, 'd, PIO: PioInstance, const SM: usize> Future for FifoOutFuture<'a, 'd, | |||
| 112 | fn poll(self: FuturePin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> { | 112 | fn poll(self: FuturePin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> { |
| 113 | //debug!("Poll {},{}", PIO::PIO_NO, SM); | 113 | //debug!("Poll {},{}", PIO::PIO_NO, SM); |
| 114 | let value = self.value; | 114 | let value = self.value; |
| 115 | if self.get_mut().sm.try_push_tx(value) { | 115 | if self.get_mut().sm_tx.try_push(value) { |
| 116 | Poll::Ready(()) | 116 | Poll::Ready(()) |
| 117 | } else { | 117 | } else { |
| 118 | WAKERS[PIO::PIO_NO as usize].fifo_out()[SM].register(cx.waker()); | 118 | WAKERS[PIO::PIO_NO as usize].fifo_out()[SM].register(cx.waker()); |
| @@ -140,12 +140,12 @@ impl<'a, 'd, PIO: PioInstance, const SM: usize> Drop for FifoOutFuture<'a, 'd, P | |||
| 140 | /// Future that waits for RX-FIFO to become readable | 140 | /// Future that waits for RX-FIFO to become readable |
| 141 | #[must_use = "futures do nothing unless you `.await` or poll them"] | 141 | #[must_use = "futures do nothing unless you `.await` or poll them"] |
| 142 | pub struct FifoInFuture<'a, 'd, PIO: PioInstance, const SM: usize> { | 142 | pub struct FifoInFuture<'a, 'd, PIO: PioInstance, const SM: usize> { |
| 143 | sm: &'a mut PioStateMachine<'d, PIO, SM>, | 143 | sm_rx: &'a mut PioStateMachineRx<'d, PIO, SM>, |
| 144 | } | 144 | } |
| 145 | 145 | ||
| 146 | impl<'a, 'd, PIO: PioInstance, const SM: usize> FifoInFuture<'a, 'd, PIO, SM> { | 146 | impl<'a, 'd, PIO: PioInstance, const SM: usize> FifoInFuture<'a, 'd, PIO, SM> { |
| 147 | pub fn new(sm: &'a mut PioStateMachine<'d, PIO, SM>) -> Self { | 147 | pub fn new(sm: &'a mut PioStateMachineRx<'d, PIO, SM>) -> Self { |
| 148 | FifoInFuture { sm } | 148 | FifoInFuture { sm_rx: sm } |
| 149 | } | 149 | } |
| 150 | } | 150 | } |
| 151 | 151 | ||
| @@ -153,7 +153,7 @@ impl<'a, 'd, PIO: PioInstance, const SM: usize> Future for FifoInFuture<'a, 'd, | |||
| 153 | type Output = u32; | 153 | type Output = u32; |
| 154 | fn poll(mut self: FuturePin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> { | 154 | fn poll(mut self: FuturePin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> { |
| 155 | //debug!("Poll {},{}", PIO::PIO_NO, SM); | 155 | //debug!("Poll {},{}", PIO::PIO_NO, SM); |
| 156 | if let Some(v) = self.sm.try_pull_rx() { | 156 | if let Some(v) = self.sm_rx.try_pull() { |
| 157 | Poll::Ready(v) | 157 | Poll::Ready(v) |
| 158 | } else { | 158 | } else { |
| 159 | WAKERS[PIO::PIO_NO as usize].fifo_in()[SM].register(cx.waker()); | 159 | WAKERS[PIO::PIO_NO as usize].fifo_in()[SM].register(cx.waker()); |
| @@ -293,97 +293,197 @@ impl<'l, PIO: PioInstance> Pin<'l, PIO> { | |||
| 293 | } | 293 | } |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | pub struct PioStateMachine<'d, PIO: PioInstance, const SM: usize> { | 296 | pub struct PioStateMachineRx<'d, PIO: PioInstance, const SM: usize> { |
| 297 | pio: PhantomData<&'d PIO>, | 297 | pio: PhantomData<&'d PIO>, |
| 298 | } | 298 | } |
| 299 | 299 | ||
| 300 | impl<'d, PIO: PioInstance, const SM: usize> Drop for PioStateMachine<'d, PIO, SM> { | 300 | impl<'d, PIO: PioInstance, const SM: usize> PioStateMachineRx<'d, PIO, SM> { |
| 301 | fn drop(&mut self) { | 301 | pub fn empty(&self) -> bool { |
| 302 | unsafe { | 302 | unsafe { PIO::PIO.fstat().read().rxempty() & (1u8 << SM) != 0 } |
| 303 | PIO::PIO.ctrl().write_clear(|w| w.set_sm_enable(1 << SM)); | ||
| 304 | } | ||
| 305 | on_pio_drop::<PIO>(); | ||
| 306 | } | 303 | } |
| 307 | } | ||
| 308 | 304 | ||
| 309 | impl<'d, PIO: PioInstance + 'd, const SM: usize> PioStateMachine<'d, PIO, SM> { | 305 | pub fn full(&self) -> bool { |
| 310 | #[inline(always)] | 306 | unsafe { PIO::PIO.fstat().read().rxfull() & (1u8 << SM) != 0 } |
| 311 | fn this_sm() -> crate::pac::pio::StateMachine { | ||
| 312 | PIO::PIO.sm(SM) | ||
| 313 | } | 307 | } |
| 314 | 308 | ||
| 315 | pub fn restart(&mut self) { | 309 | pub fn level(&self) -> u8 { |
| 316 | let mask = 1u8 << SM; | 310 | unsafe { (PIO::PIO.flevel().read().0 >> (SM * 8 + 4)) as u8 & 0x0f } |
| 311 | } | ||
| 312 | |||
| 313 | pub fn stalled(&self) -> bool { | ||
| 317 | unsafe { | 314 | unsafe { |
| 318 | PIO::PIO.ctrl().write_set(|w| w.set_sm_restart(mask)); | 315 | let fdebug = PIO::PIO.fdebug(); |
| 316 | let ret = fdebug.read().rxstall() & (1 << SM) != 0; | ||
| 317 | fdebug.write(|w| w.set_rxstall(1 << SM)); | ||
| 318 | ret | ||
| 319 | } | 319 | } |
| 320 | } | 320 | } |
| 321 | pub fn set_enable(&mut self, enable: bool) { | 321 | |
| 322 | let mask = 1u8 << SM; | 322 | pub fn underflowed(&self) -> bool { |
| 323 | unsafe { | 323 | unsafe { |
| 324 | if enable { | 324 | let fdebug = PIO::PIO.fdebug(); |
| 325 | PIO::PIO.ctrl().write_set(|w| w.set_sm_enable(mask)); | 325 | let ret = fdebug.read().rxunder() & (1 << SM) != 0; |
| 326 | } else { | 326 | fdebug.write(|w| w.set_rxunder(1 << SM)); |
| 327 | PIO::PIO.ctrl().write_clear(|w| w.set_sm_enable(mask)); | 327 | ret |
| 328 | } | ||
| 329 | } | 328 | } |
| 330 | } | 329 | } |
| 331 | 330 | ||
| 332 | pub fn is_enabled(&self) -> bool { | 331 | pub fn pull(&mut self) -> u32 { |
| 333 | unsafe { PIO::PIO.ctrl().read().sm_enable() & (1u8 << SM) != 0 } | 332 | unsafe { PIO::PIO.rxf(SM).read() } |
| 333 | } | ||
| 334 | |||
| 335 | pub fn try_pull(&mut self) -> Option<u32> { | ||
| 336 | if self.empty() { | ||
| 337 | return None; | ||
| 338 | } | ||
| 339 | Some(self.pull()) | ||
| 340 | } | ||
| 341 | |||
| 342 | pub fn wait_pull<'a>(&'a mut self) -> FifoInFuture<'a, 'd, PIO, SM> { | ||
| 343 | FifoInFuture::new(self) | ||
| 334 | } | 344 | } |
| 335 | 345 | ||
| 336 | pub fn is_tx_empty(&self) -> bool { | 346 | pub fn dma_pull<'a, C: Channel, W: Word>( |
| 347 | &'a mut self, | ||
| 348 | ch: PeripheralRef<'a, C>, | ||
| 349 | data: &'a mut [W], | ||
| 350 | ) -> Transfer<'a, C> { | ||
| 351 | unsafe { | ||
| 352 | let pio_no = PIO::PIO_NO; | ||
| 353 | let p = ch.regs(); | ||
| 354 | p.write_addr().write_value(data.as_ptr() as u32); | ||
| 355 | p.read_addr().write_value(PIO::PIO.rxf(SM).ptr() as u32); | ||
| 356 | p.trans_count().write_value(data.len() as u32); | ||
| 357 | compiler_fence(Ordering::SeqCst); | ||
| 358 | p.ctrl_trig().write(|w| { | ||
| 359 | // Set RX DREQ for this statemachine | ||
| 360 | w.set_treq_sel(TreqSel(pio_no * 8 + SM as u8 + 4)); | ||
| 361 | w.set_data_size(W::size()); | ||
| 362 | w.set_chain_to(ch.number()); | ||
| 363 | w.set_incr_read(false); | ||
| 364 | w.set_incr_write(true); | ||
| 365 | w.set_en(true); | ||
| 366 | }); | ||
| 367 | compiler_fence(Ordering::SeqCst); | ||
| 368 | } | ||
| 369 | Transfer::new(ch) | ||
| 370 | } | ||
| 371 | } | ||
| 372 | |||
| 373 | pub struct PioStateMachineTx<'d, PIO: PioInstance, const SM: usize> { | ||
| 374 | pio: PhantomData<&'d PIO>, | ||
| 375 | } | ||
| 376 | |||
| 377 | impl<'d, PIO: PioInstance, const SM: usize> PioStateMachineTx<'d, PIO, SM> { | ||
| 378 | pub fn empty(&self) -> bool { | ||
| 337 | unsafe { PIO::PIO.fstat().read().txempty() & (1u8 << SM) != 0 } | 379 | unsafe { PIO::PIO.fstat().read().txempty() & (1u8 << SM) != 0 } |
| 338 | } | 380 | } |
| 339 | pub fn is_tx_full(&self) -> bool { | 381 | pub fn full(&self) -> bool { |
| 340 | unsafe { PIO::PIO.fstat().read().txfull() & (1u8 << SM) != 0 } | 382 | unsafe { PIO::PIO.fstat().read().txfull() & (1u8 << SM) != 0 } |
| 341 | } | 383 | } |
| 342 | 384 | ||
| 343 | pub fn is_rx_empty(&self) -> bool { | 385 | pub fn level(&self) -> u8 { |
| 344 | unsafe { PIO::PIO.fstat().read().rxempty() & (1u8 << SM) != 0 } | 386 | unsafe { (PIO::PIO.flevel().read().0 >> (SM * 8)) as u8 & 0x0f } |
| 345 | } | ||
| 346 | pub fn is_rx_full(&self) -> bool { | ||
| 347 | unsafe { PIO::PIO.fstat().read().rxfull() & (1u8 << SM) != 0 } | ||
| 348 | } | 387 | } |
| 349 | 388 | ||
| 350 | pub fn tx_level(&self) -> u8 { | 389 | pub fn stalled(&self) -> bool { |
| 351 | unsafe { | 390 | unsafe { |
| 352 | let flevel = PIO::PIO.flevel().read().0; | 391 | let fdebug = PIO::PIO.fdebug(); |
| 353 | (flevel >> (SM * 8)) as u8 & 0x0f | 392 | let ret = fdebug.read().txstall() & (1 << SM) != 0; |
| 393 | fdebug.write(|w| w.set_txstall(1 << SM)); | ||
| 394 | ret | ||
| 354 | } | 395 | } |
| 355 | } | 396 | } |
| 356 | 397 | ||
| 357 | pub fn rx_level(&self) -> u8 { | 398 | pub fn overflowed(&self) -> bool { |
| 358 | unsafe { | 399 | unsafe { |
| 359 | let flevel = PIO::PIO.flevel().read().0; | 400 | let fdebug = PIO::PIO.fdebug(); |
| 360 | (flevel >> (SM * 8 + 4)) as u8 & 0x0f | 401 | let ret = fdebug.read().txover() & (1 << SM) != 0; |
| 402 | fdebug.write(|w| w.set_txover(1 << SM)); | ||
| 403 | ret | ||
| 361 | } | 404 | } |
| 362 | } | 405 | } |
| 363 | 406 | ||
| 364 | pub fn push_tx(&mut self, v: u32) { | 407 | pub fn push(&mut self, v: u32) { |
| 365 | unsafe { | 408 | unsafe { |
| 366 | PIO::PIO.txf(SM).write_value(v); | 409 | PIO::PIO.txf(SM).write_value(v); |
| 367 | } | 410 | } |
| 368 | } | 411 | } |
| 369 | 412 | ||
| 370 | pub fn try_push_tx(&mut self, v: u32) -> bool { | 413 | pub fn try_push(&mut self, v: u32) -> bool { |
| 371 | if self.is_tx_full() { | 414 | if self.full() { |
| 372 | return false; | 415 | return false; |
| 373 | } | 416 | } |
| 374 | self.push_tx(v); | 417 | self.push(v); |
| 375 | true | 418 | true |
| 376 | } | 419 | } |
| 377 | 420 | ||
| 378 | pub fn pull_rx(&mut self) -> u32 { | 421 | pub fn wait_push<'a>(&'a mut self, value: u32) -> FifoOutFuture<'a, 'd, PIO, SM> { |
| 379 | unsafe { PIO::PIO.rxf(SM).read() } | 422 | FifoOutFuture::new(self, value) |
| 380 | } | 423 | } |
| 381 | 424 | ||
| 382 | pub fn try_pull_rx(&mut self) -> Option<u32> { | 425 | pub fn dma_push<'a, C: Channel, W: Word>(&'a mut self, ch: PeripheralRef<'a, C>, data: &'a [W]) -> Transfer<'a, C> { |
| 383 | if self.is_rx_empty() { | 426 | unsafe { |
| 384 | return None; | 427 | let pio_no = PIO::PIO_NO; |
| 428 | let p = ch.regs(); | ||
| 429 | p.read_addr().write_value(data.as_ptr() as u32); | ||
| 430 | p.write_addr().write_value(PIO::PIO.txf(SM).ptr() as u32); | ||
| 431 | p.trans_count().write_value(data.len() as u32); | ||
| 432 | compiler_fence(Ordering::SeqCst); | ||
| 433 | p.ctrl_trig().write(|w| { | ||
| 434 | // Set TX DREQ for this statemachine | ||
| 435 | w.set_treq_sel(TreqSel(pio_no * 8 + SM as u8)); | ||
| 436 | w.set_data_size(W::size()); | ||
| 437 | w.set_chain_to(ch.number()); | ||
| 438 | w.set_incr_read(true); | ||
| 439 | w.set_incr_write(false); | ||
| 440 | w.set_en(true); | ||
| 441 | }); | ||
| 442 | compiler_fence(Ordering::SeqCst); | ||
| 443 | } | ||
| 444 | Transfer::new(ch) | ||
| 445 | } | ||
| 446 | } | ||
| 447 | |||
| 448 | pub struct PioStateMachine<'d, PIO: PioInstance, const SM: usize> { | ||
| 449 | rx: PioStateMachineRx<'d, PIO, SM>, | ||
| 450 | tx: PioStateMachineTx<'d, PIO, SM>, | ||
| 451 | } | ||
| 452 | |||
| 453 | impl<'d, PIO: PioInstance, const SM: usize> Drop for PioStateMachine<'d, PIO, SM> { | ||
| 454 | fn drop(&mut self) { | ||
| 455 | unsafe { | ||
| 456 | PIO::PIO.ctrl().write_clear(|w| w.set_sm_enable(1 << SM)); | ||
| 385 | } | 457 | } |
| 386 | Some(self.pull_rx()) | 458 | on_pio_drop::<PIO>(); |
| 459 | } | ||
| 460 | } | ||
| 461 | |||
| 462 | impl<'d, PIO: PioInstance + 'd, const SM: usize> PioStateMachine<'d, PIO, SM> { | ||
| 463 | #[inline(always)] | ||
| 464 | fn this_sm() -> crate::pac::pio::StateMachine { | ||
| 465 | PIO::PIO.sm(SM) | ||
| 466 | } | ||
| 467 | |||
| 468 | pub fn restart(&mut self) { | ||
| 469 | let mask = 1u8 << SM; | ||
| 470 | unsafe { | ||
| 471 | PIO::PIO.ctrl().write_set(|w| w.set_sm_restart(mask)); | ||
| 472 | } | ||
| 473 | } | ||
| 474 | pub fn set_enable(&mut self, enable: bool) { | ||
| 475 | let mask = 1u8 << SM; | ||
| 476 | unsafe { | ||
| 477 | if enable { | ||
| 478 | PIO::PIO.ctrl().write_set(|w| w.set_sm_enable(mask)); | ||
| 479 | } else { | ||
| 480 | PIO::PIO.ctrl().write_clear(|w| w.set_sm_enable(mask)); | ||
| 481 | } | ||
| 482 | } | ||
| 483 | } | ||
| 484 | |||
| 485 | pub fn is_enabled(&self) -> bool { | ||
| 486 | unsafe { PIO::PIO.ctrl().read().sm_enable() & (1u8 << SM) != 0 } | ||
| 387 | } | 487 | } |
| 388 | 488 | ||
| 389 | pub fn set_clkdiv(&mut self, div_x_256: u32) { | 489 | pub fn set_clkdiv(&mut self, div_x_256: u32) { |
| @@ -671,92 +771,14 @@ impl<'d, PIO: PioInstance + 'd, const SM: usize> PioStateMachine<'d, PIO, SM> { | |||
| 671 | } | 771 | } |
| 672 | } | 772 | } |
| 673 | 773 | ||
| 674 | pub fn wait_push<'a>(&'a mut self, value: u32) -> FifoOutFuture<'a, 'd, PIO, SM> { | 774 | pub fn rx(&mut self) -> &mut PioStateMachineRx<'d, PIO, SM> { |
| 675 | FifoOutFuture::new(self, value) | 775 | &mut self.rx |
| 676 | } | ||
| 677 | |||
| 678 | pub fn wait_pull<'a>(&'a mut self) -> FifoInFuture<'a, 'd, PIO, SM> { | ||
| 679 | FifoInFuture::new(self) | ||
| 680 | } | 776 | } |
| 681 | 777 | pub fn tx(&mut self) -> &mut PioStateMachineTx<'d, PIO, SM> { | |
| 682 | pub fn has_tx_stalled(&self) -> bool { | 778 | &mut self.tx |
| 683 | unsafe { | ||
| 684 | let fdebug = PIO::PIO.fdebug(); | ||
| 685 | let ret = fdebug.read().txstall() & (1 << SM) != 0; | ||
| 686 | fdebug.write(|w| w.set_txstall(1 << SM)); | ||
| 687 | ret | ||
| 688 | } | ||
| 689 | } | 779 | } |
| 690 | 780 | pub fn rx_tx(&mut self) -> (&mut PioStateMachineRx<'d, PIO, SM>, &mut PioStateMachineTx<'d, PIO, SM>) { | |
| 691 | pub fn has_tx_overflowed(&self) -> bool { | 781 | (&mut self.rx, &mut self.tx) |
| 692 | unsafe { | ||
| 693 | let fdebug = PIO::PIO.fdebug(); | ||
| 694 | let ret = fdebug.read().txover() & (1 << SM) != 0; | ||
| 695 | fdebug.write(|w| w.set_txover(1 << SM)); | ||
| 696 | ret | ||
| 697 | } | ||
| 698 | } | ||
| 699 | |||
| 700 | pub fn has_rx_stalled(&self) -> bool { | ||
| 701 | unsafe { | ||
| 702 | let fdebug = PIO::PIO.fdebug(); | ||
| 703 | let ret = fdebug.read().rxstall() & (1 << SM) != 0; | ||
| 704 | fdebug.write(|w| w.set_rxstall(1 << SM)); | ||
| 705 | ret | ||
| 706 | } | ||
| 707 | } | ||
| 708 | |||
| 709 | pub fn has_rx_underflowed(&self) -> bool { | ||
| 710 | unsafe { | ||
| 711 | let fdebug = PIO::PIO.fdebug(); | ||
| 712 | let ret = fdebug.read().rxunder() & (1 << SM) != 0; | ||
| 713 | fdebug.write(|w| w.set_rxunder(1 << SM)); | ||
| 714 | ret | ||
| 715 | } | ||
| 716 | } | ||
| 717 | |||
| 718 | pub fn dma_push<'a, C: Channel, W: Word>(&'a self, ch: PeripheralRef<'a, C>, data: &'a [W]) -> Transfer<'a, C> { | ||
| 719 | unsafe { | ||
| 720 | let pio_no = PIO::PIO_NO; | ||
| 721 | let p = ch.regs(); | ||
| 722 | p.read_addr().write_value(data.as_ptr() as u32); | ||
| 723 | p.write_addr().write_value(PIO::PIO.txf(SM).ptr() as u32); | ||
| 724 | p.trans_count().write_value(data.len() as u32); | ||
| 725 | compiler_fence(Ordering::SeqCst); | ||
| 726 | p.ctrl_trig().write(|w| { | ||
| 727 | // Set TX DREQ for this statemachine | ||
| 728 | w.set_treq_sel(TreqSel(pio_no * 8 + SM as u8)); | ||
| 729 | w.set_data_size(W::size()); | ||
| 730 | w.set_chain_to(ch.number()); | ||
| 731 | w.set_incr_read(true); | ||
| 732 | w.set_incr_write(false); | ||
| 733 | w.set_en(true); | ||
| 734 | }); | ||
| 735 | compiler_fence(Ordering::SeqCst); | ||
| 736 | } | ||
| 737 | Transfer::new(ch) | ||
| 738 | } | ||
| 739 | |||
| 740 | pub fn dma_pull<'a, C: Channel, W: Word>(&'a self, ch: PeripheralRef<'a, C>, data: &'a mut [W]) -> Transfer<'a, C> { | ||
| 741 | unsafe { | ||
| 742 | let pio_no = PIO::PIO_NO; | ||
| 743 | let p = ch.regs(); | ||
| 744 | p.write_addr().write_value(data.as_ptr() as u32); | ||
| 745 | p.read_addr().write_value(PIO::PIO.rxf(SM).ptr() as u32); | ||
| 746 | p.trans_count().write_value(data.len() as u32); | ||
| 747 | compiler_fence(Ordering::SeqCst); | ||
| 748 | p.ctrl_trig().write(|w| { | ||
| 749 | // Set RX DREQ for this statemachine | ||
| 750 | w.set_treq_sel(TreqSel(pio_no * 8 + SM as u8 + 4)); | ||
| 751 | w.set_data_size(W::size()); | ||
| 752 | w.set_chain_to(ch.number()); | ||
| 753 | w.set_incr_read(false); | ||
| 754 | w.set_incr_write(true); | ||
| 755 | w.set_en(true); | ||
| 756 | }); | ||
| 757 | compiler_fence(Ordering::SeqCst); | ||
| 758 | } | ||
| 759 | Transfer::new(ch) | ||
| 760 | } | 782 | } |
| 761 | } | 783 | } |
| 762 | 784 | ||
| @@ -921,10 +943,22 @@ impl<'d, PIO: PioInstance> Pio<'d, PIO> { | |||
| 921 | irq1: PioIrq { pio: PhantomData }, | 943 | irq1: PioIrq { pio: PhantomData }, |
| 922 | irq2: PioIrq { pio: PhantomData }, | 944 | irq2: PioIrq { pio: PhantomData }, |
| 923 | irq3: PioIrq { pio: PhantomData }, | 945 | irq3: PioIrq { pio: PhantomData }, |
| 924 | sm0: PioStateMachine { pio: PhantomData }, | 946 | sm0: PioStateMachine { |
| 925 | sm1: PioStateMachine { pio: PhantomData }, | 947 | rx: PioStateMachineRx { pio: PhantomData }, |
| 926 | sm2: PioStateMachine { pio: PhantomData }, | 948 | tx: PioStateMachineTx { pio: PhantomData }, |
| 927 | sm3: PioStateMachine { pio: PhantomData }, | 949 | }, |
| 950 | sm1: PioStateMachine { | ||
| 951 | rx: PioStateMachineRx { pio: PhantomData }, | ||
| 952 | tx: PioStateMachineTx { pio: PhantomData }, | ||
| 953 | }, | ||
| 954 | sm2: PioStateMachine { | ||
| 955 | rx: PioStateMachineRx { pio: PhantomData }, | ||
| 956 | tx: PioStateMachineTx { pio: PhantomData }, | ||
| 957 | }, | ||
| 958 | sm3: PioStateMachine { | ||
| 959 | rx: PioStateMachineRx { pio: PhantomData }, | ||
| 960 | tx: PioStateMachineTx { pio: PhantomData }, | ||
| 961 | }, | ||
| 928 | } | 962 | } |
| 929 | } | 963 | } |
| 930 | } | 964 | } |
diff --git a/embassy-rp/src/pio_instr_util.rs b/embassy-rp/src/pio_instr_util.rs index ffe160246..81abdb666 100644 --- a/embassy-rp/src/pio_instr_util.rs +++ b/embassy-rp/src/pio_instr_util.rs | |||
| @@ -8,7 +8,7 @@ pub fn set_x<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM | |||
| 8 | bit_count: 32, | 8 | bit_count: 32, |
| 9 | } | 9 | } |
| 10 | .encode(); | 10 | .encode(); |
| 11 | sm.push_tx(value); | 11 | sm.tx().push(value); |
| 12 | sm.exec_instr(OUT); | 12 | sm.exec_instr(OUT); |
| 13 | } | 13 | } |
| 14 | 14 | ||
| @@ -19,7 +19,7 @@ pub fn get_x<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM | |||
| 19 | } | 19 | } |
| 20 | .encode(); | 20 | .encode(); |
| 21 | sm.exec_instr(IN); | 21 | sm.exec_instr(IN); |
| 22 | sm.pull_rx() | 22 | sm.rx().pull() |
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | pub fn set_y<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, value: u32) { | 25 | pub fn set_y<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, value: u32) { |
| @@ -28,7 +28,7 @@ pub fn set_y<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM | |||
| 28 | bit_count: 32, | 28 | bit_count: 32, |
| 29 | } | 29 | } |
| 30 | .encode(); | 30 | .encode(); |
| 31 | sm.push_tx(value); | 31 | sm.tx().push(value); |
| 32 | sm.exec_instr(OUT); | 32 | sm.exec_instr(OUT); |
| 33 | } | 33 | } |
| 34 | 34 | ||
| @@ -40,7 +40,7 @@ pub fn get_y<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM | |||
| 40 | .encode(); | 40 | .encode(); |
| 41 | sm.exec_instr(IN); | 41 | sm.exec_instr(IN); |
| 42 | 42 | ||
| 43 | sm.pull_rx() | 43 | sm.rx().pull() |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | pub fn set_pindir<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, data: u8) { | 46 | pub fn set_pindir<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, data: u8) { |
| @@ -67,7 +67,7 @@ pub fn set_out_pin<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<P | |||
| 67 | bit_count: 32, | 67 | bit_count: 32, |
| 68 | } | 68 | } |
| 69 | .encode(); | 69 | .encode(); |
| 70 | sm.push_tx(data); | 70 | sm.tx().push(data); |
| 71 | sm.exec_instr(OUT); | 71 | sm.exec_instr(OUT); |
| 72 | } | 72 | } |
| 73 | pub fn set_out_pindir<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, data: u32) { | 73 | pub fn set_out_pindir<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachine<PIO, SM>, data: u32) { |
| @@ -76,7 +76,7 @@ pub fn set_out_pindir<PIO: PioInstance, const SM: usize>(sm: &mut PioStateMachin | |||
| 76 | bit_count: 32, | 76 | bit_count: 32, |
| 77 | } | 77 | } |
| 78 | .encode(); | 78 | .encode(); |
| 79 | sm.push_tx(data); | 79 | sm.tx().push(data); |
| 80 | sm.exec_instr(OUT); | 80 | sm.exec_instr(OUT); |
| 81 | } | 81 | } |
| 82 | 82 | ||
diff --git a/examples/rp/src/bin/pio_async.rs b/examples/rp/src/bin/pio_async.rs index 3d76a7d7b..4e0ab5e3c 100644 --- a/examples/rp/src/bin/pio_async.rs +++ b/examples/rp/src/bin/pio_async.rs | |||
| @@ -42,7 +42,7 @@ async fn pio_task_sm0(mut sm: PioStateMachine<'static, PIO0, 0>) { | |||
| 42 | 42 | ||
| 43 | let mut v = 0x0f0caffa; | 43 | let mut v = 0x0f0caffa; |
| 44 | loop { | 44 | loop { |
| 45 | sm.wait_push(v).await; | 45 | sm.tx().wait_push(v).await; |
| 46 | v ^= 0xffff; | 46 | v ^= 0xffff; |
| 47 | info!("Pushed {:032b} to FIFO", v); | 47 | info!("Pushed {:032b} to FIFO", v); |
| 48 | } | 48 | } |
| @@ -70,7 +70,7 @@ fn setup_pio_task_sm1(pio: &mut PioCommon<PIO0>, sm: &mut PioStateMachine<PIO0, | |||
| 70 | async fn pio_task_sm1(mut sm: PioStateMachine<'static, PIO0, 1>) { | 70 | async fn pio_task_sm1(mut sm: PioStateMachine<'static, PIO0, 1>) { |
| 71 | sm.set_enable(true); | 71 | sm.set_enable(true); |
| 72 | loop { | 72 | loop { |
| 73 | let rx = sm.wait_pull().await; | 73 | let rx = sm.rx().wait_pull().await; |
| 74 | info!("Pulled {:032b} from FIFO", rx); | 74 | info!("Pulled {:032b} from FIFO", rx); |
| 75 | } | 75 | } |
| 76 | } | 76 | } |
diff --git a/examples/rp/src/bin/pio_dma.rs b/examples/rp/src/bin/pio_dma.rs index a2a2ee39a..c664482e5 100644 --- a/examples/rp/src/bin/pio_dma.rs +++ b/examples/rp/src/bin/pio_dma.rs | |||
| @@ -60,9 +60,10 @@ async fn main(_spawner: Spawner) { | |||
| 60 | } | 60 | } |
| 61 | let mut din = [0u32; 29]; | 61 | let mut din = [0u32; 29]; |
| 62 | loop { | 62 | loop { |
| 63 | let (rx, tx) = sm.rx_tx(); | ||
| 63 | join( | 64 | join( |
| 64 | sm.dma_push(dma_out_ref.reborrow(), &dout), | 65 | tx.dma_push(dma_out_ref.reborrow(), &dout), |
| 65 | sm.dma_pull(dma_in_ref.reborrow(), &mut din), | 66 | rx.dma_pull(dma_in_ref.reborrow(), &mut din), |
| 66 | ) | 67 | ) |
| 67 | .await; | 68 | .await; |
| 68 | for i in 0..din.len() { | 69 | for i in 0..din.len() { |
diff --git a/examples/rp/src/bin/pio_hd44780.rs b/examples/rp/src/bin/pio_hd44780.rs index 7c1d7acfe..f76d334e7 100644 --- a/examples/rp/src/bin/pio_hd44780.rs +++ b/examples/rp/src/bin/pio_hd44780.rs | |||
| @@ -139,14 +139,14 @@ impl<'l> HD44780<'l> { | |||
| 139 | 139 | ||
| 140 | sm0.set_enable(true); | 140 | sm0.set_enable(true); |
| 141 | // init to 8 bit thrice | 141 | // init to 8 bit thrice |
| 142 | sm0.push_tx((50000 << 8) | 0x30); | 142 | sm0.tx().push((50000 << 8) | 0x30); |
| 143 | sm0.push_tx((5000 << 8) | 0x30); | 143 | sm0.tx().push((5000 << 8) | 0x30); |
| 144 | sm0.push_tx((200 << 8) | 0x30); | 144 | sm0.tx().push((200 << 8) | 0x30); |
| 145 | // init 4 bit | 145 | // init 4 bit |
| 146 | sm0.push_tx((200 << 8) | 0x20); | 146 | sm0.tx().push((200 << 8) | 0x20); |
| 147 | // set font and lines | 147 | // set font and lines |
| 148 | sm0.push_tx((50 << 8) | 0x20); | 148 | sm0.tx().push((50 << 8) | 0x20); |
| 149 | sm0.push_tx(0b1100_0000); | 149 | sm0.tx().push(0b1100_0000); |
| 150 | 150 | ||
| 151 | irq0.wait().await; | 151 | irq0.wait().await; |
| 152 | sm0.set_enable(false); | 152 | sm0.set_enable(false); |
| @@ -216,7 +216,7 @@ impl<'l> HD44780<'l> { | |||
| 216 | sm0.set_enable(true); | 216 | sm0.set_enable(true); |
| 217 | 217 | ||
| 218 | // display on and cursor on and blinking, reset display | 218 | // display on and cursor on and blinking, reset display |
| 219 | sm0.dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1]).await; | 219 | sm0.tx().dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1]).await; |
| 220 | 220 | ||
| 221 | Self { | 221 | Self { |
| 222 | dma: dma.map_into(), | 222 | dma: dma.map_into(), |
| @@ -240,6 +240,6 @@ impl<'l> HD44780<'l> { | |||
| 240 | // set cursor to 1:15 | 240 | // set cursor to 1:15 |
| 241 | self.buf[38..].copy_from_slice(&[0x80, 0xcf]); | 241 | self.buf[38..].copy_from_slice(&[0x80, 0xcf]); |
| 242 | 242 | ||
| 243 | self.sm.dma_push(self.dma.reborrow(), &self.buf).await; | 243 | self.sm.tx().dma_push(self.dma.reborrow(), &self.buf).await; |
| 244 | } | 244 | } |
| 245 | } | 245 | } |
diff --git a/examples/rp/src/bin/ws2812-pio.rs b/examples/rp/src/bin/ws2812-pio.rs index 713e01b44..c9c701a70 100644 --- a/examples/rp/src/bin/ws2812-pio.rs +++ b/examples/rp/src/bin/ws2812-pio.rs | |||
| @@ -87,7 +87,7 @@ impl<'d, P: PioInstance, const S: usize> Ws2812<'d, P, S> { | |||
| 87 | pub async fn write(&mut self, colors: &[RGB8]) { | 87 | pub async fn write(&mut self, colors: &[RGB8]) { |
| 88 | for color in colors { | 88 | for color in colors { |
| 89 | let word = (u32::from(color.g) << 24) | (u32::from(color.r) << 16) | (u32::from(color.b) << 8); | 89 | let word = (u32::from(color.g) << 24) | (u32::from(color.r) << 16) | (u32::from(color.b) << 8); |
| 90 | self.sm.wait_push(word).await; | 90 | self.sm.tx().wait_push(word).await; |
| 91 | } | 91 | } |
| 92 | } | 92 | } |
| 93 | } | 93 | } |
