diff options
| author | Torin Cooper-Bennun <[email protected]> | 2024-04-05 13:00:33 +0100 |
|---|---|---|
| committer | Torin Cooper-Bennun <[email protected]> | 2024-04-05 13:00:33 +0100 |
| commit | c953b9045b40fd3ece546ef94714fa2f108e0c25 (patch) | |
| tree | 35876e87ff2c6317fece544f2ee6c46fd4aa50c7 | |
| parent | 20110ce6c7039de5f4b138fb6baff501b91751ae (diff) | |
stm32: adc: v3: [h5] set OR.OP0 to 1 when ADCx_INP0 is selected, per RM
| -rw-r--r-- | embassy-stm32/src/adc/v3.rs | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index 8c9b47197..e25630be2 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs | |||
| @@ -222,6 +222,13 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 222 | // spin | 222 | // spin |
| 223 | } | 223 | } |
| 224 | 224 | ||
| 225 | // RM0492, RM0481, etc. | ||
| 226 | // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." | ||
| 227 | #[cfg(adc_h5)] | ||
| 228 | if pin.channel() == 0 { | ||
| 229 | T::regs().or().modify(|reg| reg.set_op0(true)); | ||
| 230 | } | ||
| 231 | |||
| 225 | // Configure channel | 232 | // Configure channel |
| 226 | Self::set_channel_sample_time(pin.channel(), self.sample_time); | 233 | Self::set_channel_sample_time(pin.channel(), self.sample_time); |
| 227 | 234 | ||
| @@ -244,6 +251,13 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 244 | 251 | ||
| 245 | T::regs().cr().modify(|reg| reg.set_addis(true)); | 252 | T::regs().cr().modify(|reg| reg.set_addis(true)); |
| 246 | 253 | ||
| 254 | // RM0492, RM0481, etc. | ||
| 255 | // "This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected." | ||
| 256 | #[cfg(adc_h5)] | ||
| 257 | if pin.channel() == 0 { | ||
| 258 | T::regs().or().modify(|reg| reg.set_op0(false)); | ||
| 259 | } | ||
| 260 | |||
| 247 | val | 261 | val |
| 248 | } | 262 | } |
| 249 | 263 | ||
