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authorAlexandru RADOVICI <[email protected]>2024-04-02 19:50:13 +0300
committerAlexandru RADOVICI <[email protected]>2024-04-02 19:50:30 +0300
commitd35572c11f11980bebfda4d8738f46202c3384c3 (patch)
tree94af26335d1af1e446c53e0db8dae53850615944
parent7b9546c9c8206147d1d79ba34ac19e97bb735c57 (diff)
rename pwm channels to pwm slices, including in documentation
-rw-r--r--embassy-rp/src/pwm.rs16
1 files changed, 8 insertions, 8 deletions
diff --git a/embassy-rp/src/pwm.rs b/embassy-rp/src/pwm.rs
index 2a6772043..d0e89f250 100644
--- a/embassy-rp/src/pwm.rs
+++ b/embassy-rp/src/pwm.rs
@@ -82,13 +82,13 @@ impl From<InputMode> for Divmode {
82} 82}
83 83
84/// PWM driver. 84/// PWM driver.
85pub struct Pwm<'d, T: Channel> { 85pub struct Pwm<'d, T: Slice> {
86 inner: PeripheralRef<'d, T>, 86 inner: PeripheralRef<'d, T>,
87 pin_a: Option<PeripheralRef<'d, AnyPin>>, 87 pin_a: Option<PeripheralRef<'d, AnyPin>>,
88 pin_b: Option<PeripheralRef<'d, AnyPin>>, 88 pin_b: Option<PeripheralRef<'d, AnyPin>>,
89} 89}
90 90
91impl<'d, T: Channel> Pwm<'d, T> { 91impl<'d, T: Slice> Pwm<'d, T> {
92 fn new_inner( 92 fn new_inner(
93 inner: impl Peripheral<P = T> + 'd, 93 inner: impl Peripheral<P = T> + 'd,
94 a: Option<PeripheralRef<'d, AnyPin>>, 94 a: Option<PeripheralRef<'d, AnyPin>>,
@@ -265,18 +265,18 @@ impl<'d, T: Channel> Pwm<'d, T> {
265 } 265 }
266} 266}
267 267
268/// Batch representation of PWM channels. 268/// Batch representation of PWM slices.
269pub struct PwmBatch(u32); 269pub struct PwmBatch(u32);
270 270
271impl PwmBatch { 271impl PwmBatch {
272 #[inline] 272 #[inline]
273 /// Enable a PWM channel in this batch. 273 /// Enable a PWM slice in this batch.
274 pub fn enable(&mut self, pwm: &Pwm<'_, impl Channel>) { 274 pub fn enable(&mut self, pwm: &Pwm<'_, impl Slice>) {
275 self.0 |= pwm.bit(); 275 self.0 |= pwm.bit();
276 } 276 }
277 277
278 #[inline] 278 #[inline]
279 /// Enable channels in this batch in a PWM. 279 /// Enable slices in this batch in a PWM.
280 pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) { 280 pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) {
281 let mut en = PwmBatch(0); 281 let mut en = PwmBatch(0);
282 batch(&mut en); 282 batch(&mut en);
@@ -288,7 +288,7 @@ impl PwmBatch {
288 } 288 }
289} 289}
290 290
291impl<'d, T: Channel> Drop for Pwm<'d, T> { 291impl<'d, T: Slice> Drop for Pwm<'d, T> {
292 fn drop(&mut self) { 292 fn drop(&mut self) {
293 self.inner.regs().csr().write_clear(|w| w.set_en(false)); 293 self.inner.regs().csr().write_clear(|w| w.set_en(false));
294 if let Some(pin) = &self.pin_a { 294 if let Some(pin) = &self.pin_a {
@@ -305,7 +305,7 @@ mod sealed {
305} 305}
306 306
307/// PWM Slice. 307/// PWM Slice.
308pub trait Slice: Peripheral<P = Self> + sealed::Channel + Sized + 'static { 308pub trait Slice: Peripheral<P = Self> + sealed::Slice + Sized + 'static {
309 /// Slice number. 309 /// Slice number.
310 fn number(&self) -> u8; 310 fn number(&self) -> u8;
311 311