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authorMariusz Ryndzionek <[email protected]>2021-09-24 18:39:07 +0200
committerMariusz Ryndzionek <[email protected]>2021-09-24 18:39:07 +0200
commitd371298a27b37c3f79adf24d375fd7a1171bf8e1 (patch)
treee5ca32676b4593c9c5c39c9e939b03e6a15f71b1
parentb6fc19182b4ae02ea1e9107ca28b88f4a3b0b60a (diff)
Small adjustment to 'set_as_af' interface
Small adjustment to 'set_as_af' interface - v2
-rw-r--r--embassy-stm32/src/can/bxcan.rs9
-rw-r--r--embassy-stm32/src/eth/v2/mod.rs4
-rw-r--r--embassy-stm32/src/gpio.rs21
-rw-r--r--embassy-stm32/src/i2c/v1.rs14
-rw-r--r--embassy-stm32/src/spi/v1.rs12
-rw-r--r--embassy-stm32/src/usart/v1.rs5
-rw-r--r--embassy-stm32/src/usart/v2.rs5
7 files changed, 45 insertions, 25 deletions
diff --git a/embassy-stm32/src/can/bxcan.rs b/embassy-stm32/src/can/bxcan.rs
index 906978e8b..c9ed196e1 100644
--- a/embassy-stm32/src/can/bxcan.rs
+++ b/embassy-stm32/src/can/bxcan.rs
@@ -4,7 +4,10 @@ use core::ops::{Deref, DerefMut};
4use embassy::util::Unborrow; 4use embassy::util::Unborrow;
5use embassy_hal_common::unborrow; 5use embassy_hal_common::unborrow;
6 6
7use crate::gpio::Pin; 7use crate::gpio::{
8 OutputType::{OpenDrain, PushPull},
9 Pin,
10};
8use crate::{peripherals, rcc::RccPeripheral}; 11use crate::{peripherals, rcc::RccPeripheral};
9 12
10pub use bxcan::*; 13pub use bxcan::*;
@@ -23,8 +26,8 @@ impl<'d, T: Instance + bxcan::Instance> Can<'d, T> {
23 unborrow!(peri, rx, tx); 26 unborrow!(peri, rx, tx);
24 27
25 unsafe { 28 unsafe {
26 rx.set_as_af(rx.af_num()); 29 rx.set_as_af(rx.af_num(), OpenDrain);
27 tx.set_as_af(tx.af_num()); 30 tx.set_as_af(tx.af_num(), PushPull);
28 } 31 }
29 32
30 T::enable(); 33 T::enable();
diff --git a/embassy-stm32/src/eth/v2/mod.rs b/embassy-stm32/src/eth/v2/mod.rs
index ff734f78c..5d4151ecd 100644
--- a/embassy-stm32/src/eth/v2/mod.rs
+++ b/embassy-stm32/src/eth/v2/mod.rs
@@ -9,8 +9,8 @@ use embassy_hal_common::unborrow;
9use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU}; 9use embassy_net::{Device, DeviceCapabilities, LinkState, PacketBuf, MTU};
10 10
11use crate::gpio::sealed::Pin as __GpioPin; 11use crate::gpio::sealed::Pin as __GpioPin;
12use crate::gpio::AnyPin;
13use crate::gpio::Pin as GpioPin; 12use crate::gpio::Pin as GpioPin;
13use crate::gpio::{AnyPin, OutputType::PushPull};
14use crate::pac::gpio::vals::Ospeedr; 14use crate::pac::gpio::vals::Ospeedr;
15use crate::pac::{ETH, RCC, SYSCFG}; 15use crate::pac::{ETH, RCC, SYSCFG};
16use crate::peripherals; 16use crate::peripherals;
@@ -416,7 +416,7 @@ macro_rules! impl_pin {
416 fn configure(&mut self) { 416 fn configure(&mut self) {
417 // NOTE(unsafe) Exclusive access to the registers 417 // NOTE(unsafe) Exclusive access to the registers
418 critical_section::with(|_| unsafe { 418 critical_section::with(|_| unsafe {
419 self.set_as_af($af); 419 self.set_as_af($af, PushPull);
420 self.block() 420 self.block()
421 .ospeedr() 421 .ospeedr()
422 .modify(|w| w.set_ospeedr(self.pin() as usize, Ospeedr::VERYHIGHSPEED)); 422 .modify(|w| w.set_ospeedr(self.pin() as usize, Ospeedr::VERYHIGHSPEED));
diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs
index 7812709ce..d5792d6f7 100644
--- a/embassy-stm32/src/gpio.rs
+++ b/embassy-stm32/src/gpio.rs
@@ -55,6 +55,14 @@ impl From<Speed> for vals::Ospeedr {
55 } 55 }
56} 56}
57 57
58/// Type settings
59#[derive(Debug)]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61pub enum OutputType {
62 PushPull,
63 OpenDrain,
64}
65
58/// GPIO input driver. 66/// GPIO input driver.
59pub struct Input<'d, T: Pin> { 67pub struct Input<'d, T: Pin> {
60 pub(crate) pin: T, 68 pub(crate) pin: T,
@@ -299,7 +307,7 @@ pub(crate) mod sealed {
299 } 307 }
300 } 308 }
301 309
302 unsafe fn set_as_af(&self, af_num: u8) { 310 unsafe fn set_as_af(&self, af_num: u8, af_type: OutputType) {
303 let pin = self._pin() as usize; 311 let pin = self._pin() as usize;
304 let block = self.block(); 312 let block = self.block();
305 block 313 block
@@ -308,6 +316,17 @@ pub(crate) mod sealed {
308 block 316 block
309 .afr(pin / 8) 317 .afr(pin / 8)
310 .modify(|w| w.set_afr(pin % 8, vals::Afr(af_num))); 318 .modify(|w| w.set_afr(pin % 8, vals::Afr(af_num)));
319 match af_type {
320 OutputType::PushPull => {
321 block.otyper().modify(|w| w.set_ot(pin, vals::Ot::PUSHPULL))
322 }
323 OutputType::OpenDrain => block
324 .otyper()
325 .modify(|w| w.set_ot(pin, vals::Ot::OPENDRAIN)),
326 }
327 block
328 .pupdr()
329 .modify(|w| w.set_pupdr(pin, vals::Pupdr::FLOATING));
311 } 330 }
312 331
313 unsafe fn set_as_analog(&self) { 332 unsafe fn set_as_analog(&self) {
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index 578536855..c7b7c81fd 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -9,8 +9,7 @@ use embedded_hal::blocking::i2c::WriteRead;
9 9
10use crate::pac::i2c; 10use crate::pac::i2c;
11 11
12use crate::pac::gpio::vals::{Afr, Moder, Ot}; 12use crate::gpio::OutputType::OpenDrain;
13use crate::pac::gpio::Gpio;
14 13
15pub struct I2c<'d, T: Instance> { 14pub struct I2c<'d, T: Instance> {
16 phantom: PhantomData<&'d mut T>, 15 phantom: PhantomData<&'d mut T>,
@@ -31,8 +30,8 @@ impl<'d, T: Instance> I2c<'d, T> {
31 T::enable(); 30 T::enable();
32 31
33 unsafe { 32 unsafe {
34 Self::configure_pin(scl.block(), scl.pin() as _, scl.af_num()); 33 scl.set_as_af(scl.af_num(), OpenDrain);
35 Self::configure_pin(sda.block(), sda.pin() as _, sda.af_num()); 34 sda.set_as_af(sda.af_num(), OpenDrain);
36 } 35 }
37 36
38 unsafe { 37 unsafe {
@@ -69,13 +68,6 @@ impl<'d, T: Instance> I2c<'d, T> {
69 } 68 }
70 } 69 }
71 70
72 unsafe fn configure_pin(block: Gpio, pin: usize, af_num: u8) {
73 let (afr, n_af) = if pin < 8 { (0, pin) } else { (1, pin - 8) };
74 block.moder().modify(|w| w.set_moder(pin, Moder::ALTERNATE));
75 block.afr(afr).modify(|w| w.set_afr(n_af, Afr(af_num)));
76 block.otyper().modify(|w| w.set_ot(pin, Ot::OPENDRAIN));
77 }
78
79 unsafe fn check_and_clear_error_flags(&self) -> Result<i2c::regs::Sr1, Error> { 71 unsafe fn check_and_clear_error_flags(&self) -> Result<i2c::regs::Sr1, Error> {
80 // Note that flags should only be cleared once they have been registered. If flags are 72 // Note that flags should only be cleared once they have been registered. If flags are
81 // cleared otherwise, there may be an inherent race condition and flags may be missed. 73 // cleared otherwise, there may be an inherent race condition and flags may be missed.
diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs
index 302b7a2a1..297d232bc 100644
--- a/embassy-stm32/src/spi/v1.rs
+++ b/embassy-stm32/src/spi/v1.rs
@@ -1,7 +1,11 @@
1#![macro_use] 1#![macro_use]
2 2
3use crate::dma::NoDma; 3use crate::dma::NoDma;
4use crate::gpio::{sealed::Pin, AnyPin}; 4use crate::gpio::{
5 sealed::Pin,
6 AnyPin,
7 OutputType::{OpenDrain, PushPull},
8};
5use crate::pac::spi; 9use crate::pac::spi;
6use crate::spi::{ 10use crate::spi::{
7 ByteOrder, Config, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, TxDmaChannel, 11 ByteOrder, Config, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, TxDmaChannel,
@@ -53,9 +57,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
53 unborrow!(sck, mosi, miso, txdma, rxdma); 57 unborrow!(sck, mosi, miso, txdma, rxdma);
54 58
55 unsafe { 59 unsafe {
56 sck.set_as_af(sck.af_num()); 60 sck.set_as_af(sck.af_num(), PushPull);
57 mosi.set_as_af(mosi.af_num()); 61 mosi.set_as_af(mosi.af_num(), PushPull);
58 miso.set_as_af(miso.af_num()); 62 miso.set_as_af(miso.af_num(), OpenDrain);
59 } 63 }
60 64
61 let sck = sck.degrade(); 65 let sck = sck.degrade();
diff --git a/embassy-stm32/src/usart/v1.rs b/embassy-stm32/src/usart/v1.rs
index ec6677699..16c1af387 100644
--- a/embassy-stm32/src/usart/v1.rs
+++ b/embassy-stm32/src/usart/v1.rs
@@ -1,3 +1,4 @@
1use crate::gpio::OutputType::{OpenDrain, PushPull};
1use core::future::Future; 2use core::future::Future;
2use core::marker::PhantomData; 3use core::marker::PhantomData;
3use embassy::util::Unborrow; 4use embassy::util::Unborrow;
@@ -36,8 +37,8 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
36 let r = inner.regs(); 37 let r = inner.regs();
37 38
38 unsafe { 39 unsafe {
39 rx.set_as_af(rx.af_num()); 40 rx.set_as_af(rx.af_num(), OpenDrain);
40 tx.set_as_af(tx.af_num()); 41 tx.set_as_af(tx.af_num(), PushPull);
41 42
42 r.brr().write_value(regs::Brr(div)); 43 r.brr().write_value(regs::Brr(div));
43 r.cr1().write(|w| { 44 r.cr1().write(|w| {
diff --git a/embassy-stm32/src/usart/v2.rs b/embassy-stm32/src/usart/v2.rs
index fc3036404..e3f88c0aa 100644
--- a/embassy-stm32/src/usart/v2.rs
+++ b/embassy-stm32/src/usart/v2.rs
@@ -13,6 +13,7 @@ use futures::TryFutureExt;
13 13
14use super::*; 14use super::*;
15use crate::dma::NoDma; 15use crate::dma::NoDma;
16use crate::gpio::OutputType::{OpenDrain, PushPull};
16use crate::pac::usart::{regs, vals}; 17use crate::pac::usart::{regs, vals};
17 18
18pub struct Uart<'d, T: Instance, TxDma = NoDma, RxDma = NoDma> { 19pub struct Uart<'d, T: Instance, TxDma = NoDma, RxDma = NoDma> {
@@ -42,8 +43,8 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
42 let r = inner.regs(); 43 let r = inner.regs();
43 44
44 unsafe { 45 unsafe {
45 rx.set_as_af(rx.af_num()); 46 rx.set_as_af(rx.af_num(), OpenDrain);
46 tx.set_as_af(tx.af_num()); 47 tx.set_as_af(tx.af_num(), PushPull);
47 48
48 r.cr2().write(|_w| {}); 49 r.cr2().write(|_w| {});
49 r.cr3().write(|_w| {}); 50 r.cr3().write(|_w| {});