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authorDario Nieuwenhuis <[email protected]>2024-04-05 00:48:19 +0200
committerDario Nieuwenhuis <[email protected]>2024-04-05 00:48:46 +0200
commitd597815c9aed3c2d6b8729db1b78fd0e843181f6 (patch)
tree384ac6a0c4702a34d068af3308453ca870d6996f
parenta84b33995eacc32e0e13d70293fa9bd7b2bd75f8 (diff)
stm32: remove last few mod sealed's.
Diffstat
-rw-r--r--embassy-stm32/src/cordic/mod.rs118
-rw-r--r--embassy-stm32/src/cordic/sealed.rs116
-rw-r--r--embassy-stm32/src/usart/buffered.rs38
3 files changed, 132 insertions, 140 deletions
diff --git a/embassy-stm32/src/cordic/mod.rs b/embassy-stm32/src/cordic/mod.rs
index 6bbc48f2b..9ac10e714 100644
--- a/embassy-stm32/src/cordic/mod.rs
+++ b/embassy-stm32/src/cordic/mod.rs
@@ -3,6 +3,7 @@
3use embassy_hal_internal::drop::OnDrop; 3use embassy_hal_internal::drop::OnDrop;
4use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; 4use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
5 5
6use crate::pac::cordic::vals;
6use crate::{dma, peripherals}; 7use crate::{dma, peripherals};
7 8
8mod enums; 9mod enums;
@@ -11,9 +12,6 @@ pub use enums::*;
11mod errors; 12mod errors;
12pub use errors::*; 13pub use errors::*;
13 14
14mod sealed;
15use self::sealed::SealedInstance;
16
17pub mod utils; 15pub mod utils;
18 16
19/// CORDIC driver 17/// CORDIC driver
@@ -22,6 +20,120 @@ pub struct Cordic<'d, T: Instance> {
22 config: Config, 20 config: Config,
23} 21}
24 22
23/// Cordic instance
24trait SealedInstance {
25 /// Get access to CORDIC registers
26 fn regs() -> crate::pac::cordic::Cordic;
27
28 /// Set Function value
29 fn set_func(&self, func: Function) {
30 Self::regs()
31 .csr()
32 .modify(|v| v.set_func(vals::Func::from_bits(func as u8)));
33 }
34
35 /// Set Precision value
36 fn set_precision(&self, precision: Precision) {
37 Self::regs()
38 .csr()
39 .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8)))
40 }
41
42 /// Set Scale value
43 fn set_scale(&self, scale: Scale) {
44 Self::regs()
45 .csr()
46 .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8)))
47 }
48
49 /// Enable global interrupt
50 fn enable_irq(&self) {
51 Self::regs().csr().modify(|v| v.set_ien(true))
52 }
53
54 /// Disable global interrupt
55 fn disable_irq(&self) {
56 Self::regs().csr().modify(|v| v.set_ien(false))
57 }
58
59 /// Enable Read DMA
60 fn enable_read_dma(&self) {
61 Self::regs().csr().modify(|v| {
62 v.set_dmaren(true);
63 })
64 }
65
66 /// Disable Read DMA
67 fn disable_read_dma(&self) {
68 Self::regs().csr().modify(|v| {
69 v.set_dmaren(false);
70 })
71 }
72
73 /// Enable Write DMA
74 fn enable_write_dma(&self) {
75 Self::regs().csr().modify(|v| {
76 v.set_dmawen(true);
77 })
78 }
79
80 /// Disable Write DMA
81 fn disable_write_dma(&self) {
82 Self::regs().csr().modify(|v| {
83 v.set_dmawen(false);
84 })
85 }
86
87 /// Set NARGS value
88 fn set_argument_count(&self, n: AccessCount) {
89 Self::regs().csr().modify(|v| {
90 v.set_nargs(match n {
91 AccessCount::One => vals::Num::NUM1,
92 AccessCount::Two => vals::Num::NUM2,
93 })
94 })
95 }
96
97 /// Set NRES value
98 fn set_result_count(&self, n: AccessCount) {
99 Self::regs().csr().modify(|v| {
100 v.set_nres(match n {
101 AccessCount::One => vals::Num::NUM1,
102 AccessCount::Two => vals::Num::NUM2,
103 });
104 })
105 }
106
107 /// Set ARGSIZE and RESSIZE value
108 fn set_data_width(&self, arg: Width, res: Width) {
109 Self::regs().csr().modify(|v| {
110 v.set_argsize(match arg {
111 Width::Bits32 => vals::Size::BITS32,
112 Width::Bits16 => vals::Size::BITS16,
113 });
114 v.set_ressize(match res {
115 Width::Bits32 => vals::Size::BITS32,
116 Width::Bits16 => vals::Size::BITS16,
117 })
118 })
119 }
120
121 /// Read RRDY flag
122 fn ready_to_read(&self) -> bool {
123 Self::regs().csr().read().rrdy()
124 }
125
126 /// Write value to WDATA
127 fn write_argument(&self, arg: u32) {
128 Self::regs().wdata().write_value(arg)
129 }
130
131 /// Read value from RDATA
132 fn read_result(&self) -> u32 {
133 Self::regs().rdata().read()
134 }
135}
136
25/// CORDIC instance trait 137/// CORDIC instance trait
26#[allow(private_bounds)] 138#[allow(private_bounds)]
27pub trait Instance: SealedInstance + Peripheral<P = Self> + crate::rcc::RccPeripheral {} 139pub trait Instance: SealedInstance + Peripheral<P = Self> + crate::rcc::RccPeripheral {}
diff --git a/embassy-stm32/src/cordic/sealed.rs b/embassy-stm32/src/cordic/sealed.rs
deleted file mode 100644
index 8f0bd1830..000000000
--- a/embassy-stm32/src/cordic/sealed.rs
+++ /dev/null
@@ -1,116 +0,0 @@
1use super::*;
2use crate::pac::cordic::vals;
3
4/// Cordic instance
5pub(super) trait SealedInstance {
6 /// Get access to CORDIC registers
7 fn regs() -> crate::pac::cordic::Cordic;
8
9 /// Set Function value
10 fn set_func(&self, func: Function) {
11 Self::regs()
12 .csr()
13 .modify(|v| v.set_func(vals::Func::from_bits(func as u8)));
14 }
15
16 /// Set Precision value
17 fn set_precision(&self, precision: Precision) {
18 Self::regs()
19 .csr()
20 .modify(|v| v.set_precision(vals::Precision::from_bits(precision as u8)))
21 }
22
23 /// Set Scale value
24 fn set_scale(&self, scale: Scale) {
25 Self::regs()
26 .csr()
27 .modify(|v| v.set_scale(vals::Scale::from_bits(scale as u8)))
28 }
29
30 /// Enable global interrupt
31 fn enable_irq(&self) {
32 Self::regs().csr().modify(|v| v.set_ien(true))
33 }
34
35 /// Disable global interrupt
36 fn disable_irq(&self) {
37 Self::regs().csr().modify(|v| v.set_ien(false))
38 }
39
40 /// Enable Read DMA
41 fn enable_read_dma(&self) {
42 Self::regs().csr().modify(|v| {
43 v.set_dmaren(true);
44 })
45 }
46
47 /// Disable Read DMA
48 fn disable_read_dma(&self) {
49 Self::regs().csr().modify(|v| {
50 v.set_dmaren(false);
51 })
52 }
53
54 /// Enable Write DMA
55 fn enable_write_dma(&self) {
56 Self::regs().csr().modify(|v| {
57 v.set_dmawen(true);
58 })
59 }
60
61 /// Disable Write DMA
62 fn disable_write_dma(&self) {
63 Self::regs().csr().modify(|v| {
64 v.set_dmawen(false);
65 })
66 }
67
68 /// Set NARGS value
69 fn set_argument_count(&self, n: AccessCount) {
70 Self::regs().csr().modify(|v| {
71 v.set_nargs(match n {
72 AccessCount::One => vals::Num::NUM1,
73 AccessCount::Two => vals::Num::NUM2,
74 })
75 })
76 }
77
78 /// Set NRES value
79 fn set_result_count(&self, n: AccessCount) {
80 Self::regs().csr().modify(|v| {
81 v.set_nres(match n {
82 AccessCount::One => vals::Num::NUM1,
83 AccessCount::Two => vals::Num::NUM2,
84 });
85 })
86 }
87
88 /// Set ARGSIZE and RESSIZE value
89 fn set_data_width(&self, arg: Width, res: Width) {
90 Self::regs().csr().modify(|v| {
91 v.set_argsize(match arg {
92 Width::Bits32 => vals::Size::BITS32,
93 Width::Bits16 => vals::Size::BITS16,
94 });
95 v.set_ressize(match res {
96 Width::Bits32 => vals::Size::BITS32,
97 Width::Bits16 => vals::Size::BITS16,
98 })
99 })
100 }
101
102 /// Read RRDY flag
103 fn ready_to_read(&self) -> bool {
104 Self::regs().csr().read().rrdy()
105 }
106
107 /// Write value to WDATA
108 fn write_argument(&self, arg: u32) {
109 Self::regs().wdata().write_value(arg)
110 }
111
112 /// Read value from RDATA
113 fn read_result(&self) -> u32 {
114 Self::regs().rdata().read()
115 }
116}
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 51862e185..949ac1b13 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -105,27 +105,23 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt
105 } 105 }
106} 106}
107 107
108pub(crate) use sealed::State; 108pub(crate) struct State {
109pub(crate) mod sealed { 109 pub(crate) rx_waker: AtomicWaker,
110 use super::*; 110 pub(crate) rx_buf: RingBuffer,
111 pub struct State { 111 pub(crate) tx_waker: AtomicWaker,
112 pub(crate) rx_waker: AtomicWaker, 112 pub(crate) tx_buf: RingBuffer,
113 pub(crate) rx_buf: RingBuffer, 113 pub(crate) tx_done: AtomicBool,
114 pub(crate) tx_waker: AtomicWaker, 114}
115 pub(crate) tx_buf: RingBuffer, 115
116 pub(crate) tx_done: AtomicBool, 116impl State {
117 } 117 /// Create new state
118 118 pub(crate) const fn new() -> Self {
119 impl State { 119 Self {
120 /// Create new state 120 rx_buf: RingBuffer::new(),
121 pub const fn new() -> Self { 121 tx_buf: RingBuffer::new(),
122 Self { 122 rx_waker: AtomicWaker::new(),
123 rx_buf: RingBuffer::new(), 123 tx_waker: AtomicWaker::new(),
124 tx_buf: RingBuffer::new(), 124 tx_done: AtomicBool::new(true),
125 rx_waker: AtomicWaker::new(),
126 tx_waker: AtomicWaker::new(),
127 tx_done: AtomicBool::new(true),
128 }
129 } 125 }
130 } 126 }
131} 127}
generated by cgit (git 2.34.1) at 2026-04-07 14:37:56 +0000