diff options
| author | elagil <[email protected]> | 2025-01-03 17:54:59 +0100 |
|---|---|---|
| committer | elagil <[email protected]> | 2025-01-03 17:54:59 +0100 |
| commit | d9ef2c94d70adb94d77bee184c852e0e3d186f97 (patch) | |
| tree | 72d666016e807d6d93ff1f70c43d36a46dd298cd | |
| parent | b127ca9844a7e4e9079800be81d173e2725066c6 (diff) | |
chore: clean up stm32h5 ucpd
| -rw-r--r-- | embassy-stm32/src/ucpd.rs | 22 | ||||
| -rw-r--r-- | examples/stm32h5/src/bin/usb_c_pd.rs | 7 |
2 files changed, 12 insertions, 17 deletions
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs index 403d54f4b..fd5b952ef 100644 --- a/embassy-stm32/src/ucpd.rs +++ b/embassy-stm32/src/ucpd.rs | |||
| @@ -299,24 +299,18 @@ impl<'d, T: Instance> CcPhy<'d, T> { | |||
| 299 | #[cfg(stm32h5)] | 299 | #[cfg(stm32h5)] |
| 300 | T::REGS.cfgr3().modify(|w| match cc_pull { | 300 | T::REGS.cfgr3().modify(|w| match cc_pull { |
| 301 | CcPull::Source1_5A => { | 301 | CcPull::Source1_5A => { |
| 302 | #[cfg(stm32h5)] | 302 | let trim_1a5_cc1 = unsafe { *(0x08FF_F844 as *const u32) & 0xF }; |
| 303 | { | 303 | let trim_1a5_cc2 = unsafe { ((*(0x08FF_F844 as *const u32)) >> 16) & 0xF }; |
| 304 | let trim_1a5_cc1 = unsafe { *(0x08FF_F844 as *const u32) & 0xF }; | ||
| 305 | let trim_1a5_cc2 = unsafe { ((*(0x08FF_F844 as *const u32)) >> 16) & 0xF }; | ||
| 306 | 304 | ||
| 307 | w.set_trim_cc1_rp(trim_1a5_cc1 as u8); | 305 | w.set_trim_cc1_rp(trim_1a5_cc1 as u8); |
| 308 | w.set_trim_cc2_rp(trim_1a5_cc2 as u8); | 306 | w.set_trim_cc2_rp(trim_1a5_cc2 as u8); |
| 309 | }; | ||
| 310 | } | 307 | } |
| 311 | _ => { | 308 | _ => { |
| 312 | #[cfg(stm32h5)] | 309 | let trim_3a0_cc1 = unsafe { (*(0x4002_242C as *const u32) >> 4) & 0xF }; |
| 313 | { | 310 | let trim_3a0_cc2 = unsafe { ((*(0x4002_242C as *const u32)) >> 12) & 0xF }; |
| 314 | let trim_3a0_cc1 = unsafe { (*(0x4002_242C as *const u32) >> 4) & 0xF }; | ||
| 315 | let trim_3a0_cc2 = unsafe { ((*(0x4002_242C as *const u32)) >> 12) & 0xF }; | ||
| 316 | 311 | ||
| 317 | w.set_trim_cc1_rp(trim_3a0_cc1 as u8); | 312 | w.set_trim_cc1_rp(trim_3a0_cc1 as u8); |
| 318 | w.set_trim_cc2_rp(trim_3a0_cc2 as u8); | 313 | w.set_trim_cc2_rp(trim_3a0_cc2 as u8); |
| 319 | }; | ||
| 320 | } | 314 | } |
| 321 | }); | 315 | }); |
| 322 | 316 | ||
diff --git a/examples/stm32h5/src/bin/usb_c_pd.rs b/examples/stm32h5/src/bin/usb_c_pd.rs index 00cb3b3da..acb03e498 100644 --- a/examples/stm32h5/src/bin/usb_c_pd.rs +++ b/examples/stm32h5/src/bin/usb_c_pd.rs | |||
| @@ -57,13 +57,14 @@ async fn main(_spawner: Spawner) { | |||
| 57 | 57 | ||
| 58 | info!("Hello World!"); | 58 | info!("Hello World!"); |
| 59 | 59 | ||
| 60 | let mut ucpd = Ucpd::new(p.UCPD1, Irqs {}, p.PB13, p.PB14, Default::default()); | ||
| 61 | ucpd.cc_phy().set_pull(CcPull::Sink); | ||
| 62 | |||
| 60 | // This pin controls the dead-battery mode on the attached TCPP01-M12. | 63 | // This pin controls the dead-battery mode on the attached TCPP01-M12. |
| 61 | // If low, TCPP01-M12 disconnects CC lines and presents dead-battery resistance on CC lines, thus set high. | 64 | // If low, TCPP01-M12 disconnects CC lines and presents dead-battery resistance on CC lines, thus set high. |
| 65 | // Must only be set after the CC pull is established. | ||
| 62 | let _tcpp01_m12_ndb = Output::new(p.PA9, embassy_stm32::gpio::Level::High, embassy_stm32::gpio::Speed::Low); | 66 | let _tcpp01_m12_ndb = Output::new(p.PA9, embassy_stm32::gpio::Level::High, embassy_stm32::gpio::Speed::Low); |
| 63 | 67 | ||
| 64 | let mut ucpd = Ucpd::new(p.UCPD1, Irqs {}, p.PB13, p.PB14, Default::default()); | ||
| 65 | ucpd.cc_phy().set_pull(CcPull::Sink); | ||
| 66 | |||
| 67 | info!("Waiting for USB connection..."); | 68 | info!("Waiting for USB connection..."); |
| 68 | let cable_orientation = wait_attached(ucpd.cc_phy()).await; | 69 | let cable_orientation = wait_attached(ucpd.cc_phy()).await; |
| 69 | info!("USB cable connected, orientation: {}", cable_orientation); | 70 | info!("USB cable connected, orientation: {}", cable_orientation); |
