diff options
| author | Lucas Granberg <[email protected]> | 2023-02-08 17:52:49 +0200 |
|---|---|---|
| committer | Lucas Granberg <[email protected]> | 2023-02-08 17:52:49 +0200 |
| commit | da6b1e8399cf977698e4a630f0862f698cba2b83 (patch) | |
| tree | f573205ccc851b78fbc939f6c361e1d5abf288fb | |
| parent | 9d637070a516a9ed24c3e12a20082ffdf54f72fb (diff) | |
Reset rng in case of clock or seed error
| -rw-r--r-- | embassy-stm32/src/rng.rs | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs index 10fc4a75e..c487b759f 100644 --- a/embassy-stm32/src/rng.rs +++ b/embassy-stm32/src/rng.rs | |||
| @@ -90,8 +90,10 @@ impl<'d, T: Instance> Rng<'d, T> { | |||
| 90 | impl<'d, T: Instance> RngCore for Rng<'d, T> { | 90 | impl<'d, T: Instance> RngCore for Rng<'d, T> { |
| 91 | fn next_u32(&mut self) -> u32 { | 91 | fn next_u32(&mut self) -> u32 { |
| 92 | loop { | 92 | loop { |
| 93 | let bits = unsafe { T::regs().sr().read() }; | 93 | let sr = unsafe { T::regs().sr().read() }; |
| 94 | if bits.drdy() { | 94 | if sr.seis() | sr.ceis() { |
| 95 | self.reset(); | ||
| 96 | } else if sr.drdy() { | ||
| 95 | return unsafe { T::regs().dr().read() }; | 97 | return unsafe { T::regs().dr().read() }; |
| 96 | } | 98 | } |
| 97 | } | 99 | } |
