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authorDario Nieuwenhuis <[email protected]>2023-08-16 12:17:38 +0000
committerGitHub <[email protected]>2023-08-16 12:17:38 +0000
commitdd5a8868306d2657ba2fd899cceb412e1679dd88 (patch)
treed2a929b0b417ff9deeeca0bf0653f95163d217ec
parentf26dd54f6378be87a71f0c9f351b56851df96014 (diff)
parentdf6952648e15c56d2d8b3224a69641296a780eed (diff)
Merge pull request #1784 from sgoll/check-rcc-before-apply
stm32f2: Check RCC settings before applying
-rw-r--r--embassy-stm32/src/rcc/f2.rs32
1 files changed, 16 insertions, 16 deletions
diff --git a/embassy-stm32/src/rcc/f2.rs b/embassy-stm32/src/rcc/f2.rs
index d016d1dea..ec4ed99b8 100644
--- a/embassy-stm32/src/rcc/f2.rs
+++ b/embassy-stm32/src/rcc/f2.rs
@@ -378,22 +378,6 @@ pub(crate) unsafe fn init(config: Config) {
378 // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions 378 // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
379 assert!(ahb_freq <= Hertz(120_000_000)); 379 assert!(ahb_freq <= Hertz(120_000_000));
380 380
381 let flash_ws = unwrap!(config.voltage.wait_states(ahb_freq));
382 FLASH.acr().modify(|w| w.set_latency(flash_ws));
383
384 RCC.cfgr().modify(|w| {
385 w.set_sw(sw.into());
386 w.set_hpre(config.ahb_pre.into());
387 w.set_ppre1(config.apb1_pre.into());
388 w.set_ppre2(config.apb2_pre.into());
389 });
390 while RCC.cfgr().read().sws().to_bits() != sw.to_bits() {}
391
392 // Turn off HSI to save power if we don't need it
393 if !config.hsi {
394 RCC.cr().modify(|w| w.set_hsion(false));
395 }
396
397 let (apb1_freq, apb1_tim_freq) = match config.apb1_pre { 381 let (apb1_freq, apb1_tim_freq) = match config.apb1_pre {
398 APBPrescaler::NotDivided => (ahb_freq, ahb_freq), 382 APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
399 pre => { 383 pre => {
@@ -414,6 +398,22 @@ pub(crate) unsafe fn init(config: Config) {
414 // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions 398 // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
415 assert!(apb2_freq <= Hertz(60_000_000)); 399 assert!(apb2_freq <= Hertz(60_000_000));
416 400
401 let flash_ws = unwrap!(config.voltage.wait_states(ahb_freq));
402 FLASH.acr().modify(|w| w.set_latency(flash_ws));
403
404 RCC.cfgr().modify(|w| {
405 w.set_sw(sw.into());
406 w.set_hpre(config.ahb_pre.into());
407 w.set_ppre1(config.apb1_pre.into());
408 w.set_ppre2(config.apb2_pre.into());
409 });
410 while RCC.cfgr().read().sws().to_bits() != sw.to_bits() {}
411
412 // Turn off HSI to save power if we don't need it
413 if !config.hsi {
414 RCC.cr().modify(|w| w.set_hsion(false));
415 }
416
417 set_freqs(Clocks { 417 set_freqs(Clocks {
418 sys: sys_clk, 418 sys: sys_clk,
419 ahb1: ahb_freq, 419 ahb1: ahb_freq,