diff options
| author | Guillaume MICHEL <[email protected]> | 2022-11-30 09:26:16 +0100 |
|---|---|---|
| committer | Guillaume MICHEL <[email protected]> | 2022-11-30 09:26:16 +0100 |
| commit | e0ea5dfdb2f32974ea4d278402dbdd42d1530bbd (patch) | |
| tree | 6ff1fec844dfffe8e529c13487f881ce5b8aa3cc | |
| parent | 8436c6180f80454f0634e521e89942ff8d7c5d58 (diff) | |
embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits
| -rw-r--r-- | embassy-stm32/src/spi/mod.rs | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 17198fc23..ab4352a5c 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs | |||
| @@ -8,7 +8,7 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 8 | pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; | 8 | pub use embedded_hal_02::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; |
| 9 | 9 | ||
| 10 | use self::sealed::WordSize; | 10 | use self::sealed::WordSize; |
| 11 | use crate::dma::{slice_ptr_parts, NoDma, Transfer}; | 11 | use crate::dma::{slice_ptr_parts, Transfer}; |
| 12 | use crate::gpio::sealed::{AFType, Pin as _}; | 12 | use crate::gpio::sealed::{AFType, Pin as _}; |
| 13 | use crate::gpio::AnyPin; | 13 | use crate::gpio::AnyPin; |
| 14 | use crate::pac::spi::{regs, vals, Spi as Regs}; | 14 | use crate::pac::spi::{regs, vals, Spi as Regs}; |
| @@ -812,7 +812,7 @@ mod eh02 { | |||
| 812 | // some marker traits. For details, see https://github.com/rust-embedded/embedded-hal/pull/289 | 812 | // some marker traits. For details, see https://github.com/rust-embedded/embedded-hal/pull/289 |
| 813 | macro_rules! impl_blocking { | 813 | macro_rules! impl_blocking { |
| 814 | ($w:ident) => { | 814 | ($w:ident) => { |
| 815 | impl<'d, T: Instance> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, T, NoDma, NoDma> { | 815 | impl<'d, T: Instance, Tx, Rx> embedded_hal_02::blocking::spi::Write<$w> for Spi<'d, T, Tx, Rx> { |
| 816 | type Error = Error; | 816 | type Error = Error; |
| 817 | 817 | ||
| 818 | fn write(&mut self, words: &[$w]) -> Result<(), Self::Error> { | 818 | fn write(&mut self, words: &[$w]) -> Result<(), Self::Error> { |
| @@ -820,7 +820,7 @@ mod eh02 { | |||
| 820 | } | 820 | } |
| 821 | } | 821 | } |
| 822 | 822 | ||
| 823 | impl<'d, T: Instance> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, T, NoDma, NoDma> { | 823 | impl<'d, T: Instance, Tx, Rx> embedded_hal_02::blocking::spi::Transfer<$w> for Spi<'d, T, Tx, Rx> { |
| 824 | type Error = Error; | 824 | type Error = Error; |
| 825 | 825 | ||
| 826 | fn transfer<'w>(&mut self, words: &'w mut [$w]) -> Result<&'w [$w], Self::Error> { | 826 | fn transfer<'w>(&mut self, words: &'w mut [$w]) -> Result<&'w [$w], Self::Error> { |
| @@ -849,19 +849,19 @@ mod eh1 { | |||
| 849 | } | 849 | } |
| 850 | } | 850 | } |
| 851 | 851 | ||
| 852 | impl<'d, T: Instance, W: Word> embedded_hal_1::spi::SpiBusRead<W> for Spi<'d, T, NoDma, NoDma> { | 852 | impl<'d, T: Instance, W: Word, Tx, Rx> embedded_hal_1::spi::SpiBusRead<W> for Spi<'d, T, Tx, Rx> { |
| 853 | fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error> { | 853 | fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error> { |
| 854 | self.blocking_read(words) | 854 | self.blocking_read(words) |
| 855 | } | 855 | } |
| 856 | } | 856 | } |
| 857 | 857 | ||
| 858 | impl<'d, T: Instance, W: Word> embedded_hal_1::spi::SpiBusWrite<W> for Spi<'d, T, NoDma, NoDma> { | 858 | impl<'d, T: Instance, W: Word, Tx, Rx> embedded_hal_1::spi::SpiBusWrite<W> for Spi<'d, T, Tx, Rx> { |
| 859 | fn write(&mut self, words: &[W]) -> Result<(), Self::Error> { | 859 | fn write(&mut self, words: &[W]) -> Result<(), Self::Error> { |
| 860 | self.blocking_write(words) | 860 | self.blocking_write(words) |
| 861 | } | 861 | } |
| 862 | } | 862 | } |
| 863 | 863 | ||
| 864 | impl<'d, T: Instance, W: Word> embedded_hal_1::spi::SpiBus<W> for Spi<'d, T, NoDma, NoDma> { | 864 | impl<'d, T: Instance, W: Word, Tx, Rx> embedded_hal_1::spi::SpiBus<W> for Spi<'d, T, Tx, Rx> { |
| 865 | fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Self::Error> { | 865 | fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Self::Error> { |
| 866 | self.blocking_transfer(read, write) | 866 | self.blocking_transfer(read, write) |
| 867 | } | 867 | } |
