aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorclubby789 <[email protected]>2025-07-19 21:23:40 +0100
committerclubby789 <[email protected]>2025-07-20 22:05:28 +0100
commite1407f80c00f3749235c0827c14a50a64d87dfb7 (patch)
tree42ffb88e1e35768230f9a8dddc758c91e9e888b2
parent3e1b0e4aec11888d6ea41ef5c62d6d2912d81eae (diff)
Control RFWKPSEL with ClockMux
-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/build.rs7
-rw-r--r--embassy-stm32/src/ipcc.rs3
3 files changed, 9 insertions, 5 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index d9c5d1dd9..1a73d84b6 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -81,7 +81,7 @@ futures-util = { version = "0.3.30", default-features = false }
81sdio-host = "0.9.0" 81sdio-host = "0.9.0"
82critical-section = "1.1" 82critical-section = "1.1"
83#stm32-metapac = { version = "16" } 83#stm32-metapac = { version = "16" }
84stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6e47f105286c0de07f641e22f27db060f1395e86" } 84stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b" }
85 85
86vcell = "0.1.3" 86vcell = "0.1.3"
87nb = "1.0.0" 87nb = "1.0.0"
@@ -110,7 +110,7 @@ proc-macro2 = "1.0.36"
110quote = "1.0.15" 110quote = "1.0.15"
111 111
112#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]} 112#stm32-metapac = { version = "16", default-features = false, features = ["metadata"]}
113stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6e47f105286c0de07f641e22f27db060f1395e86", default-features = false, features = ["metadata"] } 113stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b", default-features = false, features = ["metadata"] }
114 114
115[features] 115[features]
116default = ["rt"] 116default = ["rt"]
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index ad07b0269..f4781380c 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -505,6 +505,13 @@ fn main() {
505 field: "CLK48SEL", 505 field: "CLK48SEL",
506 }, 506 },
507 ); 507 );
508 clock_gen.chained_muxes.insert(
509 "RFWKP",
510 &PeripheralRccRegister {
511 register: "CSR",
512 field: "RFWKPSEL",
513 },
514 );
508 } 515 }
509 if chip_name.starts_with("stm32f7") { 516 if chip_name.starts_with("stm32f7") {
510 clock_gen.chained_muxes.insert( 517 clock_gen.chained_muxes.insert(
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs
index 20cd20dca..670d8332c 100644
--- a/embassy-stm32/src/ipcc.rs
+++ b/embassy-stm32/src/ipcc.rs
@@ -104,9 +104,6 @@ impl Ipcc {
104 rcc::enable_and_reset::<IPCC>(); 104 rcc::enable_and_reset::<IPCC>();
105 IPCC::set_cpu2(true); 105 IPCC::set_cpu2(true);
106 106
107 // set RF wake-up clock = LSE
108 crate::pac::RCC.csr().modify(|w| w.set_rfwkpsel(0b01));
109
110 let regs = IPCC::regs(); 107 let regs = IPCC::regs();
111 108
112 regs.cpu(0).cr().modify(|w| { 109 regs.cpu(0).cr().modify(|w| {