diff options
| author | Dario Nieuwenhuis <[email protected]> | 2025-02-09 23:23:35 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2025-02-18 18:14:35 +0100 |
| commit | e3edd671b6653325f9425886e008f6f37860f1b4 (patch) | |
| tree | 23a8c2f29f555946f279fff852b428a111fde666 | |
| parent | 1780f8479e8c8b5145e56861eb3cb4d57dd80185 (diff) | |
rp/pio: move instructions to methods of the SM.
| -rw-r--r-- | cyw43-pio/src/lib.rs | 18 | ||||
| -rw-r--r-- | embassy-rp/src/pio/instr.rs | 158 | ||||
| -rw-r--r-- | embassy-rp/src/pio/mod.rs | 4 |
3 files changed, 91 insertions, 89 deletions
diff --git a/cyw43-pio/src/lib.rs b/cyw43-pio/src/lib.rs index 5fe7af95d..b08e68307 100644 --- a/cyw43-pio/src/lib.rs +++ b/cyw43-pio/src/lib.rs | |||
| @@ -8,7 +8,7 @@ use core::slice; | |||
| 8 | use cyw43::SpiBusCyw43; | 8 | use cyw43::SpiBusCyw43; |
| 9 | use embassy_rp::dma::Channel; | 9 | use embassy_rp::dma::Channel; |
| 10 | use embassy_rp::gpio::{Drive, Level, Output, Pull, SlewRate}; | 10 | use embassy_rp::gpio::{Drive, Level, Output, Pull, SlewRate}; |
| 11 | use embassy_rp::pio::{instr, Common, Config, Direction, Instance, Irq, PioPin, ShiftDirection, StateMachine}; | 11 | use embassy_rp::pio::{Common, Config, Direction, Instance, Irq, PioPin, ShiftDirection, StateMachine}; |
| 12 | use embassy_rp::{Peripheral, PeripheralRef}; | 12 | use embassy_rp::{Peripheral, PeripheralRef}; |
| 13 | use fixed::types::extra::U8; | 13 | use fixed::types::extra::U8; |
| 14 | use fixed::FixedU32; | 14 | use fixed::FixedU32; |
| @@ -161,10 +161,10 @@ where | |||
| 161 | defmt::trace!("write={} read={}", write_bits, read_bits); | 161 | defmt::trace!("write={} read={}", write_bits, read_bits); |
| 162 | 162 | ||
| 163 | unsafe { | 163 | unsafe { |
| 164 | instr::set_x(&mut self.sm, write_bits as u32); | 164 | self.sm.set_x(write_bits as u32); |
| 165 | instr::set_y(&mut self.sm, read_bits as u32); | 165 | self.sm.set_y(read_bits as u32); |
| 166 | instr::set_pindir(&mut self.sm, 0b1); | 166 | self.sm.set_pindir(0b1); |
| 167 | instr::exec_jmp(&mut self.sm, self.wrap_target); | 167 | self.sm.exec_jmp(self.wrap_target); |
| 168 | } | 168 | } |
| 169 | 169 | ||
| 170 | self.sm.set_enable(true); | 170 | self.sm.set_enable(true); |
| @@ -192,10 +192,10 @@ where | |||
| 192 | defmt::trace!("cmd_read cmd = {:02x} len = {}", cmd, read.len()); | 192 | defmt::trace!("cmd_read cmd = {:02x} len = {}", cmd, read.len()); |
| 193 | 193 | ||
| 194 | unsafe { | 194 | unsafe { |
| 195 | instr::set_y(&mut self.sm, read_bits as u32); | 195 | self.sm.set_y(read_bits as u32); |
| 196 | instr::set_x(&mut self.sm, write_bits as u32); | 196 | self.sm.set_x(write_bits as u32); |
| 197 | instr::set_pindir(&mut self.sm, 0b1); | 197 | self.sm.set_pindir(0b1); |
| 198 | instr::exec_jmp(&mut self.sm, self.wrap_target); | 198 | self.sm.exec_jmp(self.wrap_target); |
| 199 | } | 199 | } |
| 200 | 200 | ||
| 201 | // self.cs.set_low(); | 201 | // self.cs.set_low(); |
diff --git a/embassy-rp/src/pio/instr.rs b/embassy-rp/src/pio/instr.rs index 9a44088c6..b15d507de 100644 --- a/embassy-rp/src/pio/instr.rs +++ b/embassy-rp/src/pio/instr.rs | |||
| @@ -3,99 +3,101 @@ use pio::{InSource, InstructionOperands, JmpCondition, OutDestination, SetDestin | |||
| 3 | 3 | ||
| 4 | use crate::pio::{Instance, StateMachine}; | 4 | use crate::pio::{Instance, StateMachine}; |
| 5 | 5 | ||
| 6 | /// Set value of scratch register X. | 6 | impl<'d, PIO: Instance, const SM: usize> StateMachine<'d, PIO, SM> { |
| 7 | pub unsafe fn set_x<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, value: u32) { | 7 | /// Set value of scratch register X. |
| 8 | const OUT: u16 = InstructionOperands::OUT { | 8 | pub unsafe fn set_x(&mut self, value: u32) { |
| 9 | destination: OutDestination::X, | 9 | const OUT: u16 = InstructionOperands::OUT { |
| 10 | bit_count: 32, | 10 | destination: OutDestination::X, |
| 11 | bit_count: 32, | ||
| 12 | } | ||
| 13 | .encode(); | ||
| 14 | self.tx().push(value); | ||
| 15 | self.exec_instr(OUT); | ||
| 11 | } | 16 | } |
| 12 | .encode(); | ||
| 13 | sm.tx().push(value); | ||
| 14 | sm.exec_instr(OUT); | ||
| 15 | } | ||
| 16 | 17 | ||
| 17 | /// Get value of scratch register X. | 18 | /// Get value of scratch register X. |
| 18 | pub unsafe fn get_x<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>) -> u32 { | 19 | pub unsafe fn get_x(&mut self) -> u32 { |
| 19 | const IN: u16 = InstructionOperands::IN { | 20 | const IN: u16 = InstructionOperands::IN { |
| 20 | source: InSource::X, | 21 | source: InSource::X, |
| 21 | bit_count: 32, | 22 | bit_count: 32, |
| 23 | } | ||
| 24 | .encode(); | ||
| 25 | self.exec_instr(IN); | ||
| 26 | self.rx().pull() | ||
| 22 | } | 27 | } |
| 23 | .encode(); | ||
| 24 | sm.exec_instr(IN); | ||
| 25 | sm.rx().pull() | ||
| 26 | } | ||
| 27 | 28 | ||
| 28 | /// Set value of scratch register Y. | 29 | /// Set value of scratch register Y. |
| 29 | pub unsafe fn set_y<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, value: u32) { | 30 | pub unsafe fn set_y(&mut self, value: u32) { |
| 30 | const OUT: u16 = InstructionOperands::OUT { | 31 | const OUT: u16 = InstructionOperands::OUT { |
| 31 | destination: OutDestination::Y, | 32 | destination: OutDestination::Y, |
| 32 | bit_count: 32, | 33 | bit_count: 32, |
| 34 | } | ||
| 35 | .encode(); | ||
| 36 | self.tx().push(value); | ||
| 37 | self.exec_instr(OUT); | ||
| 33 | } | 38 | } |
| 34 | .encode(); | ||
| 35 | sm.tx().push(value); | ||
| 36 | sm.exec_instr(OUT); | ||
| 37 | } | ||
| 38 | 39 | ||
| 39 | /// Get value of scratch register Y. | 40 | /// Get value of scratch register Y. |
| 40 | pub unsafe fn get_y<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>) -> u32 { | 41 | pub unsafe fn get_y(&mut self) -> u32 { |
| 41 | const IN: u16 = InstructionOperands::IN { | 42 | const IN: u16 = InstructionOperands::IN { |
| 42 | source: InSource::Y, | 43 | source: InSource::Y, |
| 43 | bit_count: 32, | 44 | bit_count: 32, |
| 44 | } | 45 | } |
| 45 | .encode(); | 46 | .encode(); |
| 46 | sm.exec_instr(IN); | 47 | self.exec_instr(IN); |
| 47 | 48 | ||
| 48 | sm.rx().pull() | 49 | self.rx().pull() |
| 49 | } | 50 | } |
| 50 | 51 | ||
| 51 | /// Set instruction for pindir destination. | 52 | /// Set instruction for pindir destination. |
| 52 | pub unsafe fn set_pindir<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, data: u8) { | 53 | pub unsafe fn set_pindir(&mut self, data: u8) { |
| 53 | let set: u16 = InstructionOperands::SET { | 54 | let set: u16 = InstructionOperands::SET { |
| 54 | destination: SetDestination::PINDIRS, | 55 | destination: SetDestination::PINDIRS, |
| 55 | data, | 56 | data, |
| 57 | } | ||
| 58 | .encode(); | ||
| 59 | self.exec_instr(set); | ||
| 56 | } | 60 | } |
| 57 | .encode(); | ||
| 58 | sm.exec_instr(set); | ||
| 59 | } | ||
| 60 | 61 | ||
| 61 | /// Set instruction for pin destination. | 62 | /// Set instruction for pin destination. |
| 62 | pub unsafe fn set_pin<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, data: u8) { | 63 | pub unsafe fn set_pin(&mut self, data: u8) { |
| 63 | let set: u16 = InstructionOperands::SET { | 64 | let set: u16 = InstructionOperands::SET { |
| 64 | destination: SetDestination::PINS, | 65 | destination: SetDestination::PINS, |
| 65 | data, | 66 | data, |
| 67 | } | ||
| 68 | .encode(); | ||
| 69 | self.exec_instr(set); | ||
| 66 | } | 70 | } |
| 67 | .encode(); | ||
| 68 | sm.exec_instr(set); | ||
| 69 | } | ||
| 70 | 71 | ||
| 71 | /// Out instruction for pin destination. | 72 | /// Out instruction for pin destination. |
| 72 | pub unsafe fn set_out_pin<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, data: u32) { | 73 | pub unsafe fn set_out_pin(&mut self, data: u32) { |
| 73 | const OUT: u16 = InstructionOperands::OUT { | 74 | const OUT: u16 = InstructionOperands::OUT { |
| 74 | destination: OutDestination::PINS, | 75 | destination: OutDestination::PINS, |
| 75 | bit_count: 32, | 76 | bit_count: 32, |
| 77 | } | ||
| 78 | .encode(); | ||
| 79 | self.tx().push(data); | ||
| 80 | self.exec_instr(OUT); | ||
| 76 | } | 81 | } |
| 77 | .encode(); | ||
| 78 | sm.tx().push(data); | ||
| 79 | sm.exec_instr(OUT); | ||
| 80 | } | ||
| 81 | 82 | ||
| 82 | /// Out instruction for pindir destination. | 83 | /// Out instruction for pindir destination. |
| 83 | pub unsafe fn set_out_pindir<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, data: u32) { | 84 | pub unsafe fn set_out_pindir(&mut self, data: u32) { |
| 84 | const OUT: u16 = InstructionOperands::OUT { | 85 | const OUT: u16 = InstructionOperands::OUT { |
| 85 | destination: OutDestination::PINDIRS, | 86 | destination: OutDestination::PINDIRS, |
| 86 | bit_count: 32, | 87 | bit_count: 32, |
| 88 | } | ||
| 89 | .encode(); | ||
| 90 | self.tx().push(data); | ||
| 91 | self.exec_instr(OUT); | ||
| 87 | } | 92 | } |
| 88 | .encode(); | ||
| 89 | sm.tx().push(data); | ||
| 90 | sm.exec_instr(OUT); | ||
| 91 | } | ||
| 92 | 93 | ||
| 93 | /// Jump instruction to address. | 94 | /// Jump instruction to address. |
| 94 | pub unsafe fn exec_jmp<PIO: Instance, const SM: usize>(sm: &mut StateMachine<PIO, SM>, to_addr: u8) { | 95 | pub unsafe fn exec_jmp(&mut self, to_addr: u8) { |
| 95 | let jmp: u16 = InstructionOperands::JMP { | 96 | let jmp: u16 = InstructionOperands::JMP { |
| 96 | address: to_addr, | 97 | address: to_addr, |
| 97 | condition: JmpCondition::Always, | 98 | condition: JmpCondition::Always, |
| 99 | } | ||
| 100 | .encode(); | ||
| 101 | self.exec_instr(jmp); | ||
| 98 | } | 102 | } |
| 99 | .encode(); | ||
| 100 | sm.exec_instr(jmp); | ||
| 101 | } | 103 | } |
diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs index 2776f9e3c..d4c0af55e 100644 --- a/embassy-rp/src/pio/mod.rs +++ b/embassy-rp/src/pio/mod.rs | |||
| @@ -18,7 +18,7 @@ use crate::interrupt::typelevel::{Binding, Handler, Interrupt}; | |||
| 18 | use crate::relocate::RelocatedProgram; | 18 | use crate::relocate::RelocatedProgram; |
| 19 | use crate::{pac, peripherals, RegExt}; | 19 | use crate::{pac, peripherals, RegExt}; |
| 20 | 20 | ||
| 21 | pub mod instr; | 21 | mod instr; |
| 22 | 22 | ||
| 23 | /// Wakers for interrupts and FIFOs. | 23 | /// Wakers for interrupts and FIFOs. |
| 24 | pub struct Wakers([AtomicWaker; 12]); | 24 | pub struct Wakers([AtomicWaker; 12]); |
| @@ -812,7 +812,7 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> { | |||
| 812 | } | 812 | } |
| 813 | 813 | ||
| 814 | if let Some(origin) = config.origin { | 814 | if let Some(origin) = config.origin { |
| 815 | unsafe { instr::exec_jmp(self, origin) } | 815 | unsafe { self.exec_jmp(origin) } |
| 816 | } | 816 | } |
| 817 | } | 817 | } |
| 818 | 818 | ||
