diff options
| author | elagil <[email protected]> | 2024-11-06 19:46:55 +0100 |
|---|---|---|
| committer | elagil <[email protected]> | 2024-11-06 19:46:55 +0100 |
| commit | e69be0a23bc182a78f2647cc1a739910a1a8e985 (patch) | |
| tree | 6e567afef4343c7a460713037bf4b5ceb6f90ae4 | |
| parent | 555231aeb510ed17996c2446ad412aefd4258cb3 (diff) | |
fix: STM32U5 RCC fields
| -rw-r--r-- | embassy-stm32/src/rcc/u5.rs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs index 28545ca51..1e2bfe62d 100644 --- a/embassy-stm32/src/rcc/u5.rs +++ b/embassy-stm32/src/rcc/u5.rs | |||
| @@ -279,8 +279,10 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 279 | hsi48: hsi48, | 279 | hsi48: hsi48, |
| 280 | rtc: rtc, | 280 | rtc: rtc, |
| 281 | hse: hse, | 281 | hse: hse, |
| 282 | hse_div_2: hse.map(|clk| clk / 2u32), | ||
| 282 | hsi: hsi, | 283 | hsi: hsi, |
| 283 | pll1_p: pll1.p, | 284 | pll1_p: pll1.p, |
| 285 | pll1_p_div_2: pll1.p.map(|clk| clk / 2u32), | ||
| 284 | pll1_q: pll1.q, | 286 | pll1_q: pll1.q, |
| 285 | pll1_r: pll1.r, | 287 | pll1_r: pll1.r, |
| 286 | pll2_p: pll2.p, | 288 | pll2_p: pll2.p, |
