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authorchemicstry <[email protected]>2022-03-16 20:30:57 +0200
committerchemicstry <[email protected]>2022-03-16 20:30:57 +0200
commitea467e0acb50421400083898cebd53e7b2ed967a (patch)
tree1ed87e20193b5ebf61ea95972739f59078f53fda
parent8a8e5c4b736adf1d83f6849d7f86c26dabf73675 (diff)
Rename DMA trait
-rw-r--r--embassy-stm32/build.rs2
-rw-r--r--embassy-stm32/src/sdmmc/mod.rs26
2 files changed, 14 insertions, 14 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index a8e89c840..d7792c1d7 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -483,7 +483,7 @@ fn main() {
483 (("i2c", "TX"), quote!(crate::i2c::TxDma)), 483 (("i2c", "TX"), quote!(crate::i2c::TxDma)),
484 (("dcmi", "DCMI"), quote!(crate::dcmi::FrameDma)), 484 (("dcmi", "DCMI"), quote!(crate::dcmi::FrameDma)),
485 (("dcmi", "PSSI"), quote!(crate::dcmi::FrameDma)), 485 (("dcmi", "PSSI"), quote!(crate::dcmi::FrameDma)),
486 (("sdmmc", "SDIO"), quote!(crate::sdmmc::SdioDma)), 486 (("sdmmc", "SDIO"), quote!(crate::sdmmc::SdmmcDma)),
487 ] 487 ]
488 .into(); 488 .into();
489 489
diff --git a/embassy-stm32/src/sdmmc/mod.rs b/embassy-stm32/src/sdmmc/mod.rs
index 60060c79e..b060eb93b 100644
--- a/embassy-stm32/src/sdmmc/mod.rs
+++ b/embassy-stm32/src/sdmmc/mod.rs
@@ -192,7 +192,7 @@ pub struct Sdmmc<'d, T: Instance, P: Pins<T>, Dma = NoDma> {
192} 192}
193 193
194#[cfg(sdmmc_v1)] 194#[cfg(sdmmc_v1)]
195impl<'d, T: Instance, P: Pins<T>, Dma: SdioDma<T>> Sdmmc<'d, T, P, Dma> { 195impl<'d, T: Instance, P: Pins<T>, Dma: SdmmcDma<T>> Sdmmc<'d, T, P, Dma> {
196 pub fn new( 196 pub fn new(
197 _peripheral: impl Unborrow<Target = T> + 'd, 197 _peripheral: impl Unborrow<Target = T> + 'd,
198 pins: impl Unborrow<Target = P> + 'd, 198 pins: impl Unborrow<Target = P> + 'd,
@@ -262,7 +262,7 @@ impl<'d, T: Instance, P: Pins<T>> Sdmmc<'d, T, P, NoDma> {
262 } 262 }
263} 263}
264 264
265impl<'d, T: Instance, P: Pins<T>, Dma: SdioDma<T>> Sdmmc<'d, T, P, Dma> { 265impl<'d, T: Instance, P: Pins<T>, Dma: SdmmcDma<T>> Sdmmc<'d, T, P, Dma> {
266 #[inline(always)] 266 #[inline(always)]
267 pub async fn init_card(&mut self, freq: impl Into<Hertz>) -> Result<(), Error> { 267 pub async fn init_card(&mut self, freq: impl Into<Hertz>) -> Result<(), Error> {
268 let inner = T::inner(); 268 let inner = T::inner();
@@ -390,7 +390,7 @@ impl SdmmcInner {
390 /// Initializes card (if present) and sets the bus at the 390 /// Initializes card (if present) and sets the bus at the
391 /// specified frequency. 391 /// specified frequency.
392 #[allow(clippy::too_many_arguments)] 392 #[allow(clippy::too_many_arguments)]
393 async fn init_card<T: Instance, Dma: SdioDma<T>>( 393 async fn init_card<T: Instance, Dma: SdmmcDma<T>>(
394 &self, 394 &self,
395 freq: Hertz, 395 freq: Hertz,
396 bus_width: BusWidth, 396 bus_width: BusWidth,
@@ -537,7 +537,7 @@ impl SdmmcInner {
537 Ok(()) 537 Ok(())
538 } 538 }
539 539
540 async fn read_block<T: Instance, Dma: SdioDma<T>>( 540 async fn read_block<T: Instance, Dma: SdmmcDma<T>>(
541 &self, 541 &self,
542 block_idx: u32, 542 block_idx: u32,
543 buffer: &mut [u32; 128], 543 buffer: &mut [u32; 128],
@@ -592,7 +592,7 @@ impl SdmmcInner {
592 res 592 res
593 } 593 }
594 594
595 async fn write_block<T: Instance, Dma: SdioDma<T>>( 595 async fn write_block<T: Instance, Dma: SdmmcDma<T>>(
596 &self, 596 &self,
597 block_idx: u32, 597 block_idx: u32,
598 buffer: &[u32; 128], 598 buffer: &[u32; 128],
@@ -716,7 +716,7 @@ impl SdmmcInner {
716 /// # Safety 716 /// # Safety
717 /// 717 ///
718 /// `buffer` must be valid for the whole transfer and word aligned 718 /// `buffer` must be valid for the whole transfer and word aligned
719 unsafe fn prepare_datapath_read<T: Instance, Dma: SdioDma<T>>( 719 unsafe fn prepare_datapath_read<T: Instance, Dma: SdmmcDma<T>>(
720 &self, 720 &self,
721 buffer: *mut [u32], 721 buffer: *mut [u32],
722 length_bytes: u32, 722 length_bytes: u32,
@@ -765,7 +765,7 @@ impl SdmmcInner {
765 /// # Safety 765 /// # Safety
766 /// 766 ///
767 /// `buffer` must be valid for the whole transfer and word aligned 767 /// `buffer` must be valid for the whole transfer and word aligned
768 unsafe fn prepare_datapath_write<T: Instance, Dma: SdioDma<T>>( 768 unsafe fn prepare_datapath_write<T: Instance, Dma: SdmmcDma<T>>(
769 &self, 769 &self,
770 buffer: *const [u32], 770 buffer: *const [u32],
771 length_bytes: u32, 771 length_bytes: u32,
@@ -855,7 +855,7 @@ impl SdmmcInner {
855 /// Attempt to set a new signalling mode. The selected 855 /// Attempt to set a new signalling mode. The selected
856 /// signalling mode is returned. Expects the current clock 856 /// signalling mode is returned. Expects the current clock
857 /// frequency to be > 12.5MHz. 857 /// frequency to be > 12.5MHz.
858 async fn switch_signalling_mode<T: Instance, Dma: SdioDma<T>>( 858 async fn switch_signalling_mode<T: Instance, Dma: SdmmcDma<T>>(
859 &self, 859 &self,
860 signalling: Signalling, 860 signalling: Signalling,
861 waker_reg: &AtomicWaker, 861 waker_reg: &AtomicWaker,
@@ -952,7 +952,7 @@ impl SdmmcInner {
952 } 952 }
953 953
954 /// Reads the SD Status (ACMD13) 954 /// Reads the SD Status (ACMD13)
955 async fn read_sd_status<T: Instance, Dma: SdioDma<T>>( 955 async fn read_sd_status<T: Instance, Dma: SdmmcDma<T>>(
956 &self, 956 &self,
957 card: &mut Card, 957 card: &mut Card,
958 waker_reg: &AtomicWaker, 958 waker_reg: &AtomicWaker,
@@ -1076,7 +1076,7 @@ impl SdmmcInner {
1076 } 1076 }
1077 } 1077 }
1078 1078
1079 async fn get_scr<T: Instance, Dma: SdioDma<T>>( 1079 async fn get_scr<T: Instance, Dma: SdmmcDma<T>>(
1080 &self, 1080 &self,
1081 card: &mut Card, 1081 card: &mut Card,
1082 waker_reg: &AtomicWaker, 1082 waker_reg: &AtomicWaker,
@@ -1336,11 +1336,11 @@ pin_trait!(D7Pin, Instance);
1336 1336
1337cfg_if::cfg_if! { 1337cfg_if::cfg_if! {
1338 if #[cfg(sdmmc_v1)] { 1338 if #[cfg(sdmmc_v1)] {
1339 dma_trait!(SdioDma, Instance); 1339 dma_trait!(SdmmcDma, Instance);
1340 } else if #[cfg(sdmmc_v2)] { 1340 } else if #[cfg(sdmmc_v2)] {
1341 // SDMMCv2 uses internal DMA 1341 // SDMMCv2 uses internal DMA
1342 pub trait SdioDma<T: Instance> {} 1342 pub trait SdmmcDma<T: Instance> {}
1343 impl<T: Instance> SdioDma<T> for NoDma {} 1343 impl<T: Instance> SdmmcDma<T> for NoDma {}
1344 } 1344 }
1345} 1345}
1346 1346