aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBrian Schwind <[email protected]>2025-10-04 13:18:10 +0900
committerBrian Schwind <[email protected]>2025-10-04 16:52:20 +0900
commited527e659e0e5d729f9d0ee2f6f15019a144b68a (patch)
treea5added84bb6a43512fa154a62832248f3f41d2f
parent5220a76e5f71c4e44c1e2f023df5ea7feb4d4370 (diff)
ospi: properly respect the max DMA transfer size when reading
-rw-r--r--embassy-stm32/src/ospi/mod.rs36
1 files changed, 20 insertions, 16 deletions
diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs
index 2e4943a1b..dbcf07469 100644
--- a/embassy-stm32/src/ospi/mod.rs
+++ b/embassy-stm32/src/ospi/mod.rs
@@ -1171,16 +1171,18 @@ impl<'d, T: Instance> Ospi<'d, T, Async> {
1171 T::REGS.ar().write(|v| v.set_address(current_address)); 1171 T::REGS.ar().write(|v| v.set_address(current_address));
1172 } 1172 }
1173 1173
1174 let transfer = unsafe { 1174 for chunk in buf.chunks_mut(0xFFFF / W::size().bytes()) {
1175 self.dma 1175 let transfer = unsafe {
1176 .as_mut() 1176 self.dma
1177 .unwrap() 1177 .as_mut()
1178 .read(T::REGS.dr().as_ptr() as *mut W, buf, Default::default()) 1178 .unwrap()
1179 }; 1179 .read(T::REGS.dr().as_ptr() as *mut W, chunk, Default::default())
1180 };
1180 1181
1181 T::REGS.cr().modify(|w| w.set_dmaen(true)); 1182 T::REGS.cr().modify(|w| w.set_dmaen(true));
1182 1183
1183 transfer.blocking_wait(); 1184 transfer.blocking_wait();
1185 }
1184 1186
1185 finish_dma(T::REGS); 1187 finish_dma(T::REGS);
1186 1188
@@ -1246,16 +1248,18 @@ impl<'d, T: Instance> Ospi<'d, T, Async> {
1246 T::REGS.ar().write(|v| v.set_address(current_address)); 1248 T::REGS.ar().write(|v| v.set_address(current_address));
1247 } 1249 }
1248 1250
1249 let transfer = unsafe { 1251 for chunk in buf.chunks_mut(0xFFFF / W::size().bytes()) {
1250 self.dma 1252 let transfer = unsafe {
1251 .as_mut() 1253 self.dma
1252 .unwrap() 1254 .as_mut()
1253 .read(T::REGS.dr().as_ptr() as *mut W, buf, Default::default()) 1255 .unwrap()
1254 }; 1256 .read(T::REGS.dr().as_ptr() as *mut W, chunk, Default::default())
1257 };
1255 1258
1256 T::REGS.cr().modify(|w| w.set_dmaen(true)); 1259 T::REGS.cr().modify(|w| w.set_dmaen(true));
1257 1260
1258 transfer.await; 1261 transfer.await;
1262 }
1259 1263
1260 finish_dma(T::REGS); 1264 finish_dma(T::REGS);
1261 1265