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authorCaleb Jamison <[email protected]>2024-09-12 11:37:17 -0400
committerCaleb Jamison <[email protected]>2024-09-12 11:37:17 -0400
commiteeda57a4245019ec1acd13afd9d826679d5ebb5e (patch)
tree261ca831d025cfbf35ea75987e39103cddbc9a47
parent3d6a270f30c45eaf394c8eb8bf182dd1a7ec2d7b (diff)
rp2350 pio pin fixes
Disable pad isolation on any used pin. Use GPIOBASE and offset pin bases if all pins are > 16, panic if some pins are < 16 and some are > 31
-rw-r--r--embassy-rp/src/pio/mod.rs120
1 files changed, 120 insertions, 0 deletions
diff --git a/embassy-rp/src/pio/mod.rs b/embassy-rp/src/pio/mod.rs
index 68b1d6849..0d489763c 100644
--- a/embassy-rp/src/pio/mod.rs
+++ b/embassy-rp/src/pio/mod.rs
@@ -655,6 +655,10 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
655 655
656 /// Set pin used to signal jump. 656 /// Set pin used to signal jump.
657 pub fn set_jmp_pin(&mut self, pin: &Pin<'d, PIO>) { 657 pub fn set_jmp_pin(&mut self, pin: &Pin<'d, PIO>) {
658 #[cfg(feature = "_rp235x")]
659 pin.pin.pad_ctrl().modify(|w| {
660 w.set_iso(false);
661 });
658 self.exec.jmp_pin = pin.pin(); 662 self.exec.jmp_pin = pin.pin();
659 } 663 }
660 664
@@ -664,6 +668,12 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
664 pub fn set_set_pins(&mut self, pins: &[&Pin<'d, PIO>]) { 668 pub fn set_set_pins(&mut self, pins: &[&Pin<'d, PIO>]) {
665 assert!(pins.len() <= 5); 669 assert!(pins.len() <= 5);
666 assert_consecutive(pins); 670 assert_consecutive(pins);
671 #[cfg(feature = "_rp235x")]
672 for pin in pins {
673 pin.pin.pad_ctrl().modify(|w| {
674 w.set_iso(false);
675 })
676 }
667 self.pins.set_base = pins.first().map_or(0, |p| p.pin()); 677 self.pins.set_base = pins.first().map_or(0, |p| p.pin());
668 self.pins.set_count = pins.len() as u8; 678 self.pins.set_count = pins.len() as u8;
669 } 679 }
@@ -673,6 +683,12 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
673 /// effective. 683 /// effective.
674 pub fn set_out_pins(&mut self, pins: &[&Pin<'d, PIO>]) { 684 pub fn set_out_pins(&mut self, pins: &[&Pin<'d, PIO>]) {
675 assert_consecutive(pins); 685 assert_consecutive(pins);
686 #[cfg(feature = "_rp235x")]
687 for pin in pins {
688 pin.pin.pad_ctrl().modify(|w| {
689 w.set_iso(false);
690 })
691 }
676 self.pins.out_base = pins.first().map_or(0, |p| p.pin()); 692 self.pins.out_base = pins.first().map_or(0, |p| p.pin());
677 self.pins.out_count = pins.len() as u8; 693 self.pins.out_count = pins.len() as u8;
678 } 694 }
@@ -682,6 +698,12 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
682 /// effective. 698 /// effective.
683 pub fn set_in_pins(&mut self, pins: &[&Pin<'d, PIO>]) { 699 pub fn set_in_pins(&mut self, pins: &[&Pin<'d, PIO>]) {
684 assert_consecutive(pins); 700 assert_consecutive(pins);
701 #[cfg(feature = "_rp235x")]
702 for pin in pins {
703 pin.pin.pad_ctrl().modify(|w| {
704 w.set_iso(false);
705 })
706 }
685 self.pins.in_base = pins.first().map_or(0, |p| p.pin()); 707 self.pins.in_base = pins.first().map_or(0, |p| p.pin());
686 self.in_count = pins.len() as u8; 708 self.in_count = pins.len() as u8;
687 } 709 }
@@ -731,6 +753,8 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
731 w.set_autopull(config.shift_out.auto_fill); 753 w.set_autopull(config.shift_out.auto_fill);
732 w.set_autopush(config.shift_in.auto_fill); 754 w.set_autopush(config.shift_in.auto_fill);
733 }); 755 });
756
757 #[cfg(feature = "rp2040")]
734 sm.pinctrl().write(|w| { 758 sm.pinctrl().write(|w| {
735 w.set_sideset_count(config.pins.sideset_count); 759 w.set_sideset_count(config.pins.sideset_count);
736 w.set_set_count(config.pins.set_count); 760 w.set_set_count(config.pins.set_count);
@@ -740,6 +764,102 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
740 w.set_set_base(config.pins.set_base); 764 w.set_set_base(config.pins.set_base);
741 w.set_out_base(config.pins.out_base); 765 w.set_out_base(config.pins.out_base);
742 }); 766 });
767
768 #[cfg(feature = "_rp235x")]
769 {
770 let shift_gpio_base = {
771 match (
772 if config.in_count > 0 {
773 Some(config.pins.in_base)
774 } else {
775 None
776 },
777 if config.pins.sideset_count > 0 {
778 Some(config.pins.sideset_base)
779 } else {
780 None
781 },
782 if config.pins.set_count > 0 {
783 Some(config.pins.set_base)
784 } else {
785 None
786 },
787 if config.pins.out_count > 0 {
788 Some(config.pins.out_base)
789 } else {
790 None
791 },
792 ) {
793 (None, None, None, None) => false,
794
795 (Some(0..31), None, None, None) => false,
796 (None, Some(0..31), None, None) => false,
797 (None, None, Some(0..31), None) => false,
798 (None, None, None, Some(0..31)) => false,
799
800 (Some(0..31), Some(0..31), None, None) => false,
801 (None, Some(0..31), Some(0..31), None) => false,
802 (None, None, Some(0..31), Some(0..31)) => false,
803 (Some(0..31), None, None, Some(0..31)) => false,
804
805 (None, Some(0..31), Some(0..31), Some(0..31)) => false,
806 (Some(0..31), None, Some(0..31), Some(0..31)) => false,
807 (Some(0..31), Some(0..31), None, Some(0..31)) => false,
808 (Some(0..31), Some(0..31), Some(0..31), None) => false,
809
810 (Some(0..31), Some(0..31), Some(0..31), Some(0..31)) => false,
811
812 (Some(16..48), None, None, None) => true,
813 (None, Some(16..48), None, None) => true,
814 (None, None, Some(16..48), None) => true,
815 (None, None, None, Some(16..48)) => true,
816
817 (Some(16..48), Some(16..48), None, None) => true,
818 (None, Some(16..48), Some(16..48), None) => true,
819 (None, None, Some(16..48), Some(16..48)) => true,
820 (Some(16..48), None, None, Some(16..48)) => true,
821
822 (None, Some(16..48), Some(16..48), Some(16..48)) => true,
823 (Some(16..48), None, Some(16..48), Some(16..48)) => true,
824 (Some(16..48), Some(16..48), None, Some(16..48)) => true,
825 (Some(16..48), Some(16..48), Some(16..48), None) => true,
826
827 (Some(16..48), Some(16..48), Some(16..48), Some(16..48)) => true,
828
829 (i, side, set, out) => panic!(
830 "All pins must either be < 31 or >16, in:{}, side:{}, set:{}, out:{}",
831 i, side, set, out
832 ),
833 }
834 };
835
836 info!("shift: {}", shift_gpio_base);
837
838 if shift_gpio_base {
839 sm.pinctrl().write(|w| {
840 w.set_sideset_count(config.pins.sideset_count);
841 w.set_set_count(config.pins.set_count);
842 w.set_out_count(config.pins.out_count);
843 w.set_in_base(config.pins.in_base - 16);
844 w.set_sideset_base(config.pins.sideset_base - 16);
845 w.set_set_base(config.pins.set_base - 16);
846 w.set_out_base(config.pins.out_base - 16);
847 });
848 } else {
849 sm.pinctrl().write(|w| {
850 w.set_sideset_count(config.pins.sideset_count);
851 w.set_set_count(config.pins.set_count);
852 w.set_out_count(config.pins.out_count);
853 w.set_in_base(config.pins.in_base);
854 w.set_sideset_base(config.pins.sideset_base);
855 w.set_set_base(config.pins.set_base);
856 w.set_out_base(config.pins.out_base);
857 });
858 }
859
860 PIO::PIO.gpiobase().write(|w| w.set_gpiobase(shift_gpio_base));
861 }
862
743 if let Some(origin) = config.origin { 863 if let Some(origin) = config.origin {
744 unsafe { instr::exec_jmp(self, origin) } 864 unsafe { instr::exec_jmp(self, origin) }
745 } 865 }