Merge pull request #4231 from ROMemories/feat/stm32-rcc-const-constructors

feat(stm32): provide a `const` constructor on `rcc::Config`

11 files changed, 115 insertions, 55 deletions

diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index 57aaba1c7..e2c704405 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -92,6 +92,17 @@ pub struct LsConfig {
 }
 
 impl LsConfig {
+    /// Creates an [`LsConfig`] using the LSI when possible.
+    pub const fn new() -> Self {
+        // on L5, just the fact that LSI is enabled makes things crash.
+        // TODO: investigate.
+
+        #[cfg(not(stm32l5))]
+        return Self::default_lsi();
+        #[cfg(stm32l5)]
+        return Self::off();
+    }
+
     pub const fn default_lse() -> Self {
         Self {
             rtc: RtcClockSource::LSE,
@@ -124,13 +135,7 @@ impl LsConfig {
 
 impl Default for LsConfig {
     fn default() -> Self {
-        // on L5, just the fact that LSI is enabled makes things crash.
-        // TODO: investigate.
-
-        #[cfg(not(stm32l5))]
-        return Self::default_lsi();
-        #[cfg(stm32l5)]
-        return Self::off();
+        Self::new()
     }
 }
 
diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs
index 0b749bcff..cac2a9149 100644
--- a/embassy-stm32/src/rcc/c0.rs
+++ b/embassy-stm32/src/rcc/c0.rs
@@ -59,9 +59,8 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    #[inline]
-    fn default() -> Config {
+impl Config {
+    pub const fn new() -> Self {
         Config {
             hsi: Some(Hsi {
                 sys_div: HsiSysDiv::DIV4,
@@ -71,12 +70,18 @@ impl Default for Config {
             sys: Sysclk::HSISYS,
             ahb_pre: AHBPrescaler::DIV1,
             apb1_pre: APBPrescaler::DIV1,
-            ls: Default::default(),
-            mux: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Config {
+        Self::new()
+    }
+}
+
 pub(crate) unsafe fn init(config: Config) {
     // Turn on the HSI
     match config.hsi {
diff --git a/embassy-stm32/src/rcc/f013.rs b/embassy-stm32/src/rcc/f013.rs
index cfa223d1f..1155b6acd 100644
--- a/embassy-stm32/src/rcc/f013.rs
+++ b/embassy-stm32/src/rcc/f013.rs
@@ -126,13 +126,13 @@ pub struct Config {
     pub ls: super::LsConfig,
 }
 
-impl Default for Config {
-    fn default() -> Self {
+impl Config {
+    pub const fn new() -> Self {
         Self {
             hsi: true,
             hse: None,
             #[cfg(crs)]
-            hsi48: Some(Default::default()),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
             sys: Sysclk::HSI,
             pll: None,
 
@@ -147,7 +147,7 @@ impl Default for Config {
             apb1_pre: APBPrescaler::DIV1,
             #[cfg(not(stm32f0))]
             apb2_pre: APBPrescaler::DIV1,
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
 
             #[cfg(stm32f1)]
             // ensure ADC is not out of range by default even if APB2 is maxxed out (36mhz)
@@ -163,11 +163,17 @@ impl Default for Config {
             #[cfg(stm32f107)]
             i2s3_src: I2s2src::SYS,
 
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
 /// Initialize and Set the clock frequencies
 pub(crate) unsafe fn init(config: Config) {
     // Turn on the HSI
diff --git a/embassy-stm32/src/rcc/f247.rs b/embassy-stm32/src/rcc/f247.rs
index ee67f1cc0..8f2e8db5f 100644
--- a/embassy-stm32/src/rcc/f247.rs
+++ b/embassy-stm32/src/rcc/f247.rs
@@ -108,8 +108,8 @@ pub struct Config {
     pub voltage: VoltageScale,
 }
 
-impl Default for Config {
-    fn default() -> Self {
+impl Config {
+    pub const fn new() -> Self {
         Self {
             hsi: true,
             hse: None,
@@ -127,15 +127,21 @@ impl Default for Config {
             apb1_pre: APBPrescaler::DIV1,
             apb2_pre: APBPrescaler::DIV1,
 
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
 
             #[cfg(stm32f2)]
             voltage: VoltageScale::Range3,
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
 pub(crate) unsafe fn init(config: Config) {
     // set VOS to SCALE1, if use PLL
     // TODO: check real clock speed before set VOS
diff --git a/embassy-stm32/src/rcc/g0.rs b/embassy-stm32/src/rcc/g0.rs
index e391b1210..ce6398afd 100644
--- a/embassy-stm32/src/rcc/g0.rs
+++ b/embassy-stm32/src/rcc/g0.rs
@@ -97,9 +97,8 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    #[inline]
-    fn default() -> Config {
+impl Config {
+    pub const fn new() -> Self {
         Config {
             hsi: Some(Hsi {
                 sys_div: HsiSysDiv::DIV1,
@@ -107,18 +106,24 @@ impl Default for Config {
             hse: None,
             sys: Sysclk::HSI,
             #[cfg(crs)]
-            hsi48: Some(Default::default()),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
             pll: None,
             ahb_pre: AHBPrescaler::DIV1,
             apb1_pre: APBPrescaler::DIV1,
             low_power_run: false,
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
             voltage_range: VoltageRange::RANGE1,
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Config {
+        Self::new()
+    }
+}
+
 #[derive(Default)]
 pub struct PllFreq {
     pub pll_p: Option<Hertz>,
diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs
index d7d5c7388..da13e16aa 100644
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@@ -91,26 +91,31 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    #[inline]
-    fn default() -> Config {
+impl Config {
+    pub const fn new() -> Self {
         Config {
             hsi: true,
             hse: None,
             sys: Sysclk::HSI,
-            hsi48: Some(Default::default()),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
             pll: None,
             ahb_pre: AHBPrescaler::DIV1,
             apb1_pre: APBPrescaler::DIV1,
             apb2_pre: APBPrescaler::DIV1,
             low_power_run: false,
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
             boost: false,
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Config {
+        Self::new()
+    }
+}
+
 #[derive(Default)]
 pub struct PllFreq {
     pub pll_p: Option<Hertz>,
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index eaba8cefb..383f48874 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -218,13 +218,13 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    fn default() -> Self {
+impl Config {
+    pub const fn new() -> Self {
         Self {
             hsi: Some(HSIPrescaler::DIV1),
             hse: None,
             csi: false,
-            hsi48: Some(Default::default()),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
             sys: Sysclk::HSI,
             pll1: None,
             pll2: None,
@@ -248,16 +248,22 @@ impl Default for Config {
             voltage_scale: VoltageScale::Scale0,
             #[cfg(rcc_h7rs)]
             voltage_scale: VoltageScale::HIGH,
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
 
             #[cfg(any(pwr_h7rm0399, pwr_h7rm0455, pwr_h7rm0468, pwr_h7rs))]
             supply_config: SupplyConfig::LDO,
 
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
 pub(crate) unsafe fn init(config: Config) {
     #[cfg(any(stm32h7))]
     let pwr_reg = PWR.cr3();
diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs
index efabd059f..3ea5c96c9 100644
--- a/embassy-stm32/src/rcc/hsi48.rs
+++ b/embassy-stm32/src/rcc/hsi48.rs
@@ -18,9 +18,15 @@ pub struct Hsi48Config {
     pub sync_from_usb: bool,
 }
 
+impl Hsi48Config {
+    pub const fn new() -> Self {
+        Self { sync_from_usb: false }
+    }
+}
+
 impl Default for Hsi48Config {
     fn default() -> Self {
-        Self { sync_from_usb: false }
+        Self::new()
     }
 }
 
diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs
index 863942f1a..81b89046e 100644
--- a/embassy-stm32/src/rcc/l.rs
+++ b/embassy-stm32/src/rcc/l.rs
@@ -68,9 +68,8 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    #[inline]
-    fn default() -> Config {
+impl Config {
+    pub const fn new() -> Self {
         Config {
             hse: None,
             hsi: false,
@@ -90,15 +89,21 @@ impl Default for Config {
             #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))]
             pllsai2: None,
             #[cfg(crs)]
-            hsi48: Some(Default::default()),
-            ls: Default::default(),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
+            ls: crate::rcc::LsConfig::new(),
             #[cfg(any(stm32l0, stm32l1))]
             voltage_scale: VoltageScale::RANGE1,
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Config {
+        Self::new()
+    }
+}
+
 #[cfg(stm32wb)]
 pub const WPAN_DEFAULT: Config = Config {
     hse: Some(Hse {
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index 93a327be7..ff70466b9 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -97,14 +97,14 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    fn default() -> Self {
+impl Config {
+    pub const fn new() -> Self {
         Self {
             msis: Some(Msirange::RANGE_4MHZ),
             msik: Some(Msirange::RANGE_4MHZ),
             hse: None,
             hsi: false,
-            hsi48: Some(Default::default()),
+            hsi48: Some(crate::rcc::Hsi48Config::new()),
             pll1: None,
             pll2: None,
             pll3: None,
@@ -114,12 +114,18 @@ impl Default for Config {
             apb2_pre: APBPrescaler::DIV1,
             apb3_pre: APBPrescaler::DIV1,
             voltage_range: VoltageScale::RANGE1,
-            ls: Default::default(),
-            mux: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Self {
+        Self::new()
+    }
+}
+
 pub(crate) unsafe fn init(config: Config) {
     // Set the requested power mode
     PWR.vosr().modify(|w| w.set_vos(config.voltage_range));
diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs
index 1fee648d4..b9fc4e423 100644
--- a/embassy-stm32/src/rcc/wba.rs
+++ b/embassy-stm32/src/rcc/wba.rs
@@ -37,9 +37,8 @@ pub struct Config {
     pub mux: super::mux::ClockMux,
 }
 
-impl Default for Config {
-    #[inline]
-    fn default() -> Config {
+impl Config {
+    pub const fn new() -> Self {
         Config {
             hse: None,
             hsi: true,
@@ -48,13 +47,19 @@ impl Default for Config {
             apb1_pre: APBPrescaler::DIV1,
             apb2_pre: APBPrescaler::DIV1,
             apb7_pre: APBPrescaler::DIV1,
-            ls: Default::default(),
+            ls: crate::rcc::LsConfig::new(),
             voltage_scale: VoltageScale::RANGE2,
-            mux: Default::default(),
+            mux: super::mux::ClockMux::default(),
         }
     }
 }
 
+impl Default for Config {
+    fn default() -> Config {
+        Self::new()
+    }
+}
+
 fn hsi_enable() {
     RCC.cr().modify(|w| w.set_hsion(true));
     while !RCC.cr().read().hsirdy() {}